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Author SHA1 Message Date
Ali Saidi
021421d663 Config: Remove some ini file code that no longer works 
--HG--
extra : convert_revision : cb01dc0abeabc97b03d7af10959d92ceb62ea936
 2007-09-04 13:12:58 -04:00
Gabe Black
9da070ce8a X86: Major rework of how regop microops are generated. 
The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.

--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
 2007-08-31 22:28:07 -07:00
Gabe Black
9277545ba6 Microassembler: Pass the actual mnemonic used to the macroop add_micro function 
--HG--
extra : convert_revision : acaee747ab30747d602c1f4ac5f0c2b2573a2a9b
 2007-08-31 22:26:02 -07:00
Gabe Black
941675690c X86: Get x86 to compile again after the simobject constructor change. 
--HG--
extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
 2007-08-31 13:02:58 -07:00
Miles Kaufmann
eddf6f1637 python: Write configuration file without reassigning sys.stdout. 
Using print >>ini_file syntax instead of reassigning sys.stdout
allows the python debugger to be used.

--HG--
extra : convert_revision : 63fc268f2e80f338ad1a7abe54b9e979e2239609
 2007-08-30 15:16:59 -04:00
Miles Kaufmann
e4eea9ee04 Fix miscellaneous small typos. 
--HG--
extra : convert_revision : bfc0ac8e1c8a5d01d9fa5203184bbf99c8361da3
 2007-08-30 15:16:59 -04:00
Miles Kaufmann
cd890576bb devices: Avoid using assert() to catch misconfiguration 
--HG--
extra : convert_revision : 2c6710e01a4402793a2e0eafcc829df19d03dda3
 2007-08-30 15:16:59 -04:00
Miles Kaufmann
54cc0053f0 params: Deprecate old-style constructors; update most SimObject constructors. 
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
 2007-08-30 15:16:59 -04:00
Miles Kaufmann
9cb49ab9e0 python: Eliminate the Python use of eval() and frame manipulation 
--HG--
extra : convert_revision : 04520bcfab510580a1c7fb341afbd2487287d1ab
 2007-08-30 15:16:58 -04:00
Gabe Black
f67cd04673 X86: Fix the sra microop to get the sign bit from the right operand. 
--HG--
extra : convert_revision : 71e58dd6dd6918ee403f2e332c47e29acdace464
 2007-08-29 20:39:41 -07:00
Gabe Black
c1a776de8a X86: Implement the movaps instruction. 
--HG--
extra : convert_revision : 2aeb1c05205f8ea8f7484e8bacf3fbbc581defd2
 2007-08-29 20:38:22 -07:00
Gabe Black
3da3190f07 X86: Implement the movsd instruction. 
--HG--
extra : convert_revision : a5a73e0ddd39144d2aeeb9cc6a299516752fd4c2
 2007-08-29 20:37:44 -07:00
Gabe Black
f0b20ff970 X86: Implement the movlpd instruction. 
--HG--
extra : convert_revision : dddb20fe48c0ae9de7cd0ba1a1467ecb690056c1
 2007-08-29 20:37:16 -07:00
Gabe Black
3b97b6e0e2 X86: Add an fp move microop. 
--HG--
extra : convert_revision : a9d6d3568cd2c6a65df91bf56ee1e43523f04630
 2007-08-29 20:36:44 -07:00
Gabe Black
22830c0747 X86: Add load and store microops that use the fp registers. 
--HG--
extra : convert_revision : 153a055e888d8c47d59758a599dbd38f63008137
 2007-08-29 20:36:12 -07:00
Gabe Black
34f3c9d196 X86: Add operands to handle floating point registers. 
--HG--
extra : convert_revision : 2e8289dbd3f5dda1221014d4ed0e9450f60de0cf
 2007-08-29 20:35:30 -07:00
Gabe Black
bc3635a110 X86: Flesh out register indexing constants. 
--HG--
extra : convert_revision : 56eedc076bbb7962c3976599a15ed93c7cb154c0
 2007-08-29 20:34:52 -07:00
Gabe Black
6204d00940 X86: Make the fp accessors not panic. 
--HG--
extra : convert_revision : c6d08863049a3f8755c53e1f49ce19ad6a2dedc7
 2007-08-29 20:34:00 -07:00
Gabe Black
61b1c53a2a X86: Make x86 syscall return just stuff the return value in eax. 
--HG--
extra : convert_revision : 800d8a2398d5750c03c642264577c9c772684266
 2007-08-29 20:29:18 -07:00
Gabe Black
c593cfbdeb X86: More two byte opcode decoding. I missed two groups in the last changeset. 
--HG--
extra : convert_revision : 1a2813b2e7d3e0e02c8f1474f372de5cf16e7d7b
 2007-08-28 19:36:51 -07:00
Gabe Black
fbab5c9bd3 X86: Hook in an implementation for lseek. 
--HG--
extra : convert_revision : d2424e73fa8ce56248c4edbda9db2714c4b0a92e
 2007-08-28 17:34:15 -07:00
Gabe Black
37f1ff95e0 X86: More fully decode two byte opcodes. 
This includes the most of the SSE stuff, but not some of the "groups" of
instructions.

--HG--
extra : convert_revision : 4725c34f3d73971ae1763611685c5877b6c51412
 2007-08-28 17:18:13 -07:00
Gabe Black
a3367adaff Address translation: De-templatize the GenericTLB class. 
--HG--
extra : convert_revision : b605a90a4a1071e39f49085a839fdcd175e09fdb
 2007-08-28 14:30:50 -07:00
Gabe Black
13b1f7231c Address Translation: Make the Generic TLB only compile in SE mode. 
--HG--
extra : convert_revision : 7eb9a78480174f754f51f75983ee5a1b31280bd3
 2007-08-27 18:30:58 -07:00
Gabe Black
703d10705c Alpha: Fixes to get alpha to compile again. 
--HG--
extra : convert_revision : 9541cf6dae1fb1a1c6025898692b2e04fcf55c6d
 2007-08-27 18:30:02 -07:00
Gabe Black
8253ff2ba9 MIPS: Fixes to get mips to compile. 
--HG--
extra : convert_revision : 23561eda853a51046ae56c23a88466230c3e83f2
 2007-08-27 18:29:15 -07:00
Gabe Black
25ad253643 SPARC: Fixes to get SPARC to compile again. 
--HG--
extra : convert_revision : dab20c49fec9c2d385ca59b9ab627c2d3dddfe76
 2007-08-27 18:26:36 -07:00
Gabe Black
7227ab5f22 Merge with head 
--HG--
extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
 2007-08-26 21:45:40 -07:00
Gabe Black
8d1c7a83d7 X86: Make the Ruflag microop work correctly, and make the code a little clearer. 
--HG--
extra : convert_revision : c551f51cdda46df99370363ed2d70916db8413eb
 2007-08-26 20:41:36 -07:00
Gabe Black
ac5ec1542e X86: Return values for some cpuid functions that match what my development machine returns. 
--HG--
extra : convert_revision : e6619da11f43bbe025ceabd06387dd24e1cd883b
 2007-08-26 20:40:42 -07:00
Gabe Black
8b738f7f12 X86: Make the microassembler accept lines which are just labels. 
The labels on these lines will be associated with whatever the next microop
is.

--HG--
extra : convert_revision : 80c260e48ec1c16e6325061608e37c95a0610cfa
 2007-08-26 20:39:55 -07:00
Gabe Black
03880cf828 X86: Make cpuid actually consider the eax parameter and return different values. 
--HG--
extra : convert_revision : 527c1cacdd20ab162859bba7f9a6bed33afa2d4f
 2007-08-26 20:38:42 -07:00
Gabe Black
9c99f5f825 X86: Fix the sign extension microop so it extends zeros correctly. 
--HG--
extra : convert_revision : 9d7ca286ba7709175fa75226320601acce4ced98
 2007-08-26 20:37:41 -07:00
Gabe Black
506bf83595 X86: Implement cmps (string compare) 
--HG--
extra : convert_revision : 0d6b783b2246b8ad8d91e4c63e407307ee11c651
 2007-08-26 20:36:46 -07:00
Gabe Black
00d9036c62 X86: Make shift instructions set some of the flags they're supposed to. 
The flag mechanism for microops needs to be fleshd out a little more to allow
for custom flag calculation methods for certain microops. Shift is an example
where the rules for calculating OF and CF are unique.

--HG--
extra : convert_revision : 91981a00c1efd05db702fffa9cea51f912583013
 2007-08-26 20:35:48 -07:00
Gabe Black
9b49a78cfd Address translation: Make the page table more flexible. 
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
 2007-08-26 20:33:57 -07:00
Gabe Black
80d51650c8 O3 CPU: Remove alignment check from dynamic instruction read/write functions. 
--HG--
extra : convert_revision : e5d415b4bf79353ef3c9f4dc5af09ab4102c55fb
 2007-08-26 20:31:30 -07:00
Gabe Black
fcd04f953c X86: Remove x86 code that attempted to fix misaligned accesses. 
--HG--
extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
 2007-08-26 20:30:36 -07:00
Gabe Black
24bfda0fdf Simple CPU: Don't trace instructions that fault. Otherwise they show up twice. 
--HG--
extra : convert_revision : 4446d9544d58bdadbd24d8322bb63016a32aa2b8
 2007-08-26 20:29:09 -07:00
Gabe Black
e7e2d5ce90 Simple CPU: Added code that will split requests that cross block boundaries into multiple memory access. 
--HG--
extra : convert_revision : 600f79f32ef30a6e1db951503bcfe8cd332858d1
 2007-08-26 20:27:11 -07:00
Gabe Black
e056e49c45 Simple CPU: Make sure only instructions which complete without faulting are counted. 
--HG--
extra : convert_revision : 01019c7129ed762d8826c3e6519989aa3fc3b5fd
 2007-08-26 20:25:42 -07:00
Gabe Black
537239b278 Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
 2007-08-26 20:24:18 -07:00
Gabe Black
f738afb865 SPARC: Make sure unaligned access are caught on cached translations as well. 
--HG--
extra : convert_revision : 5c1f3f585817a19a771164f809dfc2fdc1ab3fb2
 2007-08-26 20:15:29 -07:00
Gabe Black
20e0a3792a Merge with head. 
--HG--
extra : convert_revision : 9ef81afcfabd86c9c069204998c987344f03f33e
 2007-08-21 16:19:46 -07:00
Kevin Lim
e1054170b5 o3: Fix for retry ID bug. 
It should be cleared prior to the call to recvRetry.
Add extra DPRINTF statement for clearer debugging output.

--HG--
extra : convert_revision : e2332754743f42d60e159ac89f6fb0fd8b7f57f8
 2007-08-21 16:16:56 -07:00
Gabe Black
a874cb40ab Merge with head. 
--HG--
extra : convert_revision : 6ce77b5bd4f43ddecd51ea8c66759e4b70d4ad82
 2007-08-18 19:41:08 -07:00
Ali Saidi
464a51e29e Ports: Only try to do EthPort stuff in full system. 
--HG--
extra : convert_revision : 9ea093ea7c9ab22f8467c5cd5d55b66c71eb3427
 2007-08-17 04:20:02 -04:00
Ali Saidi
bba265ccd8 PCI: Move PCI Configuration data into devices now that we can inherit parameters. 
--HG--
extra : convert_revision : bd2214b28fb46a9a9e9e204e0539be33acb548ad
 2007-08-16 16:49:05 -04:00
Ali Saidi
773cb77656 Devices: Make EtherInts connect in the same way memory ports currently do. 
--HG--
extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
 2007-08-16 16:49:02 -04:00
Gabe Black
ca84d953b9 SPARC: Make nops have the IsNop flag set. 
In O3, a nop is used to carry faults down the pipeline that didn't originate
from an instruction. If the instruction doesn't do anything, that is just
returns NoFault, but doesn't have IsNop set, the NoFault will overwrite the
fault that's being sent down and nothing will happen.

--HG--
extra : convert_revision : 54d99002b550ca0e1cf14603f588dc1038e3e535
 2007-08-13 16:11:27 -07:00
Gabe Black
92a57edff1 O3: Set up the predicted npc and nnpc for a fault carrying noop so that it doesn't cause a false branch mispredict. 
--HG--
extra : convert_revision : 2820597cc966cd7b128cef0dab48fe05089533d7
 2007-08-13 16:08:58 -07:00
Gabe Black
e99c56f971 SPARC: Move tlb state into the tlb. 
Each "strand" may need to have a private copy of this state, but I couldn't
find anywhere in the spec that said that after looking briefly.
This prevents writes to the thread context in o3 which was causing the
pipeline to be flushed and stopping any forward progress. The other ASI
accessible state will probably need to be accessed differently if/when we get
O3 full system up and running.

--HG--
extra : convert_revision : fa7fba812d7f76564ef4a23818e60f536710d557
 2007-08-13 16:06:50 -07:00
Gabe Black
26853e11c0 SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault ASI accesses work. 
--HG--
extra : convert_revision : 3321bb91da02c1bec27fa34d0ba945cc976b6491
 2007-08-13 16:02:47 -07:00
Gabe Black
82f78ebd39 Move the "translate" member functions back into the base o3 class. 
--HG--
extra : convert_revision : 3c480537bf38f74f0f1d72e75c70aa46ba91b759
 2007-08-13 16:01:09 -07:00
Nathan Binkert
9b4be65327 python: make the DictImporter's unload() work in any context. 
import sys since sys may not be defined in whatever context the DictImporter
is used.  Also reset self.installed after an unload since the same DictImporter
could be used again

--HG--
extra : convert_revision : 988ed7ad8cd41b69e8fc583e618b1b4a146216da
 2007-08-13 13:39:22 -07:00
Ali Saidi
02353a60ee MemorySystem: Fix the use of ?: to produce correct results. 
--HG--
extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
 2007-08-12 19:43:54 -04:00
Vincentius Robby
ec4000e0e2 Added fastmem option. 
Lets CPU accesses to physical memory bypass Bus.

--HG--
extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
 2007-08-08 18:43:12 -04:00
Vincentius Robby
1caed14654 alpha: Quick fix for things related to TLB MRU cache. 
simple-timing test for ALPHA_FS breaks.

--HG--
extra : convert_revision : 5a1b05cddd480849913da81a3b3931fec16485a8
 2007-08-08 18:38:19 -04:00
Ali Saidi
06a9f58c68 DMA: Add IOCache and fix bus bridge to optionally only send requests one 
way so a cache can handle partial block requests for i/o devices.

--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
 2007-08-10 16:14:01 -04:00
Ali Saidi
5c38668ed6 Bus: Only call end() on an stl object once in a loop 
--HG--
extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
 2007-08-10 16:14:01 -04:00
Vincentius Robby
3d40cba8d4 Port, StaticInst: Revert unnecessary changes. 
--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
 2007-08-08 14:54:02 -04:00
Vincentius Robby
13d10e844c alpha: Make the TLB cache to actually work. 
Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
 2007-08-08 14:18:09 -04:00
Gabe Black
ef32494e72 Alpha: Fix an off by one error with the tlb caching mechanism. 
--HG--
extra : convert_revision : e17f7a0d58a2e59b2e270f0827db33d0a29365e0
 2007-08-07 21:51:12 -07:00
Gabe Black
0fd999ca40 Merge with head. 
--HG--
extra : convert_revision : ae7b3df573368c29a66d5b027ecad9ffb3a99104
 2007-08-07 15:31:36 -07:00
Gabe Black
cd3f0646ca X86: Added some missing parenthesis in the condition code calculation function. 
--HG--
extra : convert_revision : 663021070a4bcc795bb44e1839b8bcec686a42f0
 2007-08-07 15:26:50 -07:00
Gabe Black
24541780c6 X86: Implemented and hooked in SCAS (scan string) 
Fixed the asz assembler symbol.
Adjusted the condion checks to have appropriate options.
Implemented the SCAS microcode.
Attached SCAS into the decoder.

--HG--
extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
 2007-08-07 15:25:41 -07:00
Gabe Black
d79a591608 X86: Add a format to handle string instructions which can use the repe and repne prefixes. 
--HG--
extra : convert_revision : 205fbbb947258bc0ef2915e22d5b32a3df1a1ce2
 2007-08-07 15:23:01 -07:00
Gabe Black
60c61cb2b1 X86: Overhaul of ruflags to get it to work correctly. 
--HG--
extra : convert_revision : 00a36a80a1945806aac9fa7d9d6a3906465dcad2
 2007-08-07 15:21:13 -07:00
Gabe Black
fb6cdf09cb X86: Make a microcode branch microop. 
Also some touch up for ruflag.

--HG--
extra : convert_revision : 829947169af25ca6573f53b9430707101c75cc23
 2007-08-07 15:19:26 -07:00
Gabe Black
cae8d20633 Merge with head. 
--HG--
extra : convert_revision : 3edb9f03353b18b4c9f062bccf11e79cfb3c15f2
 2007-08-04 20:27:23 -07:00
Gabe Black
30e777a5d3 X86: Implement microops and instructions that manipulate the flags register. 
--HG--
extra : convert_revision : 566841577bf4a98cac0b65292fe0f7daf89a9203
 2007-08-04 20:24:18 -07:00
Gabe Black
802f13e6bd X86: Make 64 bit unaligned accesses work as well as the other sizes. 
There is a fundemental flaw in how unaligned accesses are supported, but this
is still an improvement.

--HG--
extra : convert_revision : 1c20b524ac24cd4a812c876b067495ee6a7ae29f
 2007-08-04 20:22:20 -07:00
Gabe Black
b9793c2506 X86: Make the open flags correct. 
--HG--
extra : convert_revision : 2dc81345176d1de247a567d1f748e2b2bd05f829
 2007-08-04 20:18:20 -07:00
Gabe Black
fc6b2cceb4 X86: Make fixed register operands ignore register index extensions from the REX prefix. 
The only cases where this was the correct behavior are now handled with the
"B" operand type, and doing things this way was breaking some instructions,
notably a shift.

--HG--
extra : convert_revision : 072346d4f541edaceba7aecc26ba8d2cd756e481
 2007-08-04 20:17:31 -07:00
Gabe Black
6f3bb03a3f X86: Implement the cmpxchg instruction. 
--HG--
extra : convert_revision : b9e172bcb9551edf65c63f26dfa07d771edf3e1e
 2007-08-04 20:15:27 -07:00
Gabe Black
e410a925df X86: Start implementing segmentation support. 
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.

--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
 2007-08-04 20:12:54 -07:00
Gabe Black
ced6cbcccf X86: Create a base enum value for indexing into a region of the miscregs. 
This lets you index into a group of registers without having to know
explicitly which one is the lowest in that group.

--HG--
extra : convert_revision : e3cad25a1c5910955204c37177b049ca9834cfd9
 2007-08-04 20:07:42 -07:00
Gabe Black
0e6be2a9b1 X86: Add the arch_prctl system call and fix up some microcoding. 
The arch_prctl system call is used to set and get the FS and GS segment
bases. The FS segment is use for TLS, so glibc needs to be able to set it
up.

--HG--
extra : convert_revision : 79501491a15967a7a862add846ff88a934fb1b37
 2007-08-04 20:02:41 -07:00
Nathan Binkert
df015f17a4 switching: turn on profiling after a switch if there's an event 
--HG--
extra : convert_revision : 689e5b85c47bb2aaceb7eb38c2a24a2e5b69376c
 2007-08-04 16:11:11 -07:00
Nathan Binkert
7a996ccc98 switching: Remove the drain and resume code from the switching code. 
This allows us to change memory modes as well.
Clean up the code while we're at it.

--HG--
extra : convert_revision : fc5fee9ffd08b791f0607ee2688f32aa65d15354
 2007-08-04 16:09:24 -07:00
Nathan Binkert
5a27431b96 python: use the enum values in the memory mode changing code 
--HG--
extra : convert_revision : 2e399b2b407922ad076f93d33af73e3ba4c05218
 2007-08-04 16:06:19 -07:00
Nathan Binkert
300712c0d1 swig: %include all of the enums to get all of the definitions. 
(instead of %import)

--HG--
extra : convert_revision : bc4a39d7be3aad59b34d55aa8dd2c28285f09db9
 2007-08-04 16:05:18 -07:00
Nathan Binkert
157bd25802 python: provide access to stats 
--HG--
extra : convert_revision : 18a4e9ef21bd77ec73482557e028d535f0c1f273
 2007-08-04 16:02:04 -07:00
Nathan Binkert
d8900d8478 main: return an an exit code of 1 when we exit due to a python exception. 
This requires us to not use PyRun_SimpleString, but PyRun_String since the
latter actually returns a result

--HG--
extra : convert_revision : 3e3916ddd7eef9957569d8e72e73ba4c3160ce20
 2007-08-04 16:00:36 -07:00
Nathan Binkert
e8e1ddd530 SimpleCPU: Add some DPRINTFs 
--HG--
extra : convert_revision : 5fdd5a9595c3e5d6ce5f9e8c9af0a8e6c857551c
 2007-08-04 15:56:48 -07:00
Vincentius Robby
1db9e1fb8f port: Implement cache for port interfaces and ranges 
--HG--
extra : convert_revision : d7cbec7c277fb8f4d8846203caae36ce629602d5
 2007-08-04 16:05:55 -04:00
Vincentius Robby
2898d76827 alpha: Implement a cache for recently used page table entries 
--HG--
extra : convert_revision : 1bb80d71fa91e500a68390e5dc17464ce7136fba
 2007-08-04 14:25:35 -04:00
Vincentius Robby
acac5580f2 StaticInst: Fix decode cache initialization. Cache functionality was negated. 
--HG--
extra : convert_revision : fe313718dba8236f3e9bceb49f8c5efccfc06a06
 2007-08-04 14:25:17 -04:00
Steve Reinhardt
3afc625975 merge from head 
--HG--
extra : convert_revision : 21f7afe2719c00744c0981212c1ee6e442238e01
 2007-08-03 03:51:30 -04:00
Steve Reinhardt
62aa1d7f55 cache: get rid of obsolete params from python. 
--HG--
extra : convert_revision : cd40e0ef938ef6da1cccedf7be01c3ac5b4883fb
 2007-08-03 03:51:13 -04:00
Gabe Black
121a894ce0 Merge with head. 
--HG--
extra : convert_revision : c8b066289916b3fb24bcae1e9c76e27ad4cf61b1
 2007-08-02 23:30:25 -07:00
Nathan Binkert
0536d0cde9 python: Improve support for python calling back to C++ member functions. 
Add support for declaring SimObjects to swig so their members can be wrapped.
Make sim_object.i only contain declarations for SimObject.
Create system.i to contain declarations for System.
Update python code to properly call the C++ given the new changes.

--HG--
extra : convert_revision : 82076ee69e8122d56e91b92d6767e356baae420a
 2007-08-02 22:50:02 -07:00
Ali Saidi
dc7a38dce7 Merge: No changes 
--HG--
extra : convert_revision : ee56f958f6b295571cf881b81380cfba3d4ce02e
 2007-08-02 22:09:54 -04:00
Ali Saidi
50bceeae14 Serialize: This shouldn't have been commited, I got a little bit carried away it seems. 
--HG--
extra : convert_revision : f8d4d9f3d395d2d3db020cd016c7840876097791
 2007-08-02 22:08:33 -04:00
Gabe Black
f4b89cd897 X86: Get rid of some debug warnings. 
Get rid of some warnings that were accidentally committed.

--HG--
extra : convert_revision : e800dbce253f6ba759932ca47d64bf98129e4177
 2007-08-02 16:28:01 -07:00
Gabe Black
fa9e4d110a Merge with head. 
--HG--
extra : convert_revision : 7700f475caa676948175cdf126ee018b0c4ad35c
 2007-08-02 15:14:36 -07:00
Gabe Black
4af5740afd X86: Finally get the x86 initial stack frame right. 
After very carefully reading through the Linux source, I'm pretty confident I now know -exactly- how the initial stack frame is constructed, filled, and aligned.

--HG--
extra : convert_revision : 3c654ade7e458bdd5445026860f11175f383a65f
 2007-08-02 15:12:18 -07:00
Gabe Black
85b661e35d X86: Fix special case with SIB index register and REX prefix. 
--HG--
extra : convert_revision : b305708a722f2a08cb55c4548c5616fcbe6c5d68
 2007-08-02 15:09:12 -07:00
Nathan Binkert
4041e1ddd9 merge: no manual changes 
--HG--
extra : convert_revision : fe31a334a6db4e4ac8489738429093c90ea94925
 2007-08-02 14:19:40 -07:00
Nathan Binkert
b367474916 python: fix m5.build_env variable. 
As it is now, some objects will get the incorrect value depending where they
were defined.

--HG--
extra : convert_revision : a11a14842f9524739cbf54a48be6ec051f371200
 2007-08-02 14:12:53 -07:00
Ali Saidi
31a9114a3d merge, no manual changes 
--HG--
extra : convert_revision : 8504bddf1f73a4186cebc03c3e52e42ea38361fc
 2007-08-02 15:38:06 -04:00
Nathan Binkert
dfa147a70a python: need to import objects to make some calls work 
--HG--
extra : convert_revision : b5eec971d76626b2f42448052ab2cb2acb652d1b
 2007-08-02 12:03:35 -07:00
Nathan Binkert
5682f4f7f9 main: expose the build information as a simple command line parameter 
--HG--
extra : convert_revision : 69189c4a2e9fa9290fe51a2a43a2b08e712c395d
 2007-08-02 11:59:02 -07:00
Ali Saidi
da5f62af7b Serialization: Provide array serialization methods that work on std::vector 
--HG--
extra : convert_revision : aecdf1a7e50edbb12921991cc81df1b431ce8b38
 2007-08-02 14:43:27 -04:00
Ali Saidi
c4e026daf4 Output: Make OutputDirectory::create() be able to create binary files. 
--HG--
extra : convert_revision : eae114ee5f27bb8b319df705d9b39bded185b8e8
 2007-08-02 14:40:56 -04:00
Ali Saidi
acb91c2dfa Linux Support: make sure that when we get the stack page for thread info we're doing a 64bit not 
--HG--
extra : convert_revision : c581921dd601fc72fd2d45b961c7440755b0331c
 2007-08-02 14:34:58 -04:00
Ali Saidi
970261f9ce debugSymbolTable is a global variable and only needs to be created once, not once per system 
--HG--
extra : convert_revision : 43cbfd1a58d7d728898cbfae0d7f7d9960eba178
 2007-08-02 14:32:20 -04:00
Gabe Black
e719a3e4c0 Fix how the "cmd" parameter is set in se.py and remove hack in x86 process initialization code. 
--HG--
extra : convert_revision : 1fc741eea956ebfa4cef488eef4333d1f50617a6
 2007-08-01 18:19:23 -07:00
Nathan Binkert
f20ba92a76 merge: mips fix to getArgument 
--HG--
extra : convert_revision : 0e97c80ca9bdd354f537bf5d036e024da0081306
 2007-08-01 16:58:22 -07:00
Nathan Binkert
a3e70f4957 mips: make getArgument inline so mips will link properly 
--HG--
extra : convert_revision : 7fdbf1f35a5fcbd8704bf02aafcb3ea069626ce3
 2007-08-01 16:57:29 -07:00
Gabe Black
baa1182513 Merge with head. 
--HG--
extra : convert_revision : 646d559a10706521b1918d2378d0f99ab5255c77
 2007-08-01 16:00:33 -07:00
Gabe Black
458dfc8b3e Merge with head. 
--HG--
extra : convert_revision : f677debfd636d79bc5097eb45331601d3253743d
 2007-08-01 15:54:25 -07:00
Gabe Black
c032a535ab MIPS: Files which are needed for the MIPS fix. 
--HG--
extra : convert_revision : ae710fa8e4e9f57c19cd7277b1b59efd0af40b6a
 2007-08-01 15:53:39 -07:00
Gabe Black
8da3e0548e Merge with head. 
--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b
 2007-08-01 15:12:07 -07:00
Gabe Black
5b5e2fd6cd X86: Hide the irrelevant portions of the address components for load and store microops. 
--HG--
extra : convert_revision : a5ac6fefa09882f0833537e23f1ac0477bc89bb9
 2007-08-01 14:34:59 -07:00
Ali Saidi
84cd78e96f Merge Gabe and my changes to arch/mips/utility.hh 
--HG--
extra : convert_revision : d5a9d74ee6edf71524ba5c03fb7f054cf9722213
 2007-08-01 17:05:03 -04:00
Ali Saidi
fae60c164e Arguments: Get rid of duplicate code for the Arguments class in each architecture. 
Move the argument files to src/sim and add a utility.cc file with a function
getArguments() that returns the given argument in the architecture specific fashion.
getArguments() was getArg() is the architecture specific Argument class and has had
all magic numbers replaced with meaningful constants. Also add a function to the
Argument class for testing if an argument is NULL.

--HG--
rename : src/arch/alpha/arguments.cc => src/sim/arguments.cc
rename : src/arch/alpha/arguments.hh => src/sim/arguments.hh
extra : convert_revision : 8b93667bafaa03b52aadb64d669adfe835266b8e
 2007-08-01 16:59:14 -04:00
Gabe Black
239d124e83 MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc 
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.

--HG--
extra : convert_revision : 66ef7762024b72bb91147a5589a0779e279521e0
 2007-08-01 13:55:47 -07:00
Gabe Black
e5e5b0119d X86: Fix for compilation bug with new cache code. 
--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
 2007-08-01 12:49:58 -07:00
Gabe Black
7da3a8e65c Merge with head. 
--HG--
extra : convert_revision : 5bc1133c6c7a575082f060e7787b62d4080f70b0
 2007-08-01 12:02:59 -07:00
Gabe Black
e42524af02 X86: Reorganize the native tracing code. 
Ignore different values or rcx and r11 after a syscall until either the local or remote value changes. Also change the codes organization somewhat.

--HG--
extra : convert_revision : 2c1f69d4e55b443e68bfc7b43e8387b02cf0b6b5
 2007-08-01 12:01:51 -07:00
Gabe Black
4b29d22386 X86: Get rid of initialization of R11 
R11 is just junk after the start of exectuion because we're "returning" from
an execve call and linux destroys the contents of rcx and r11 on system calls.

--HG--
extra : convert_revision : 6bf69a50ce56e0355dfdd41524163874340beec0
 2007-08-01 12:00:32 -07:00
Nathan Binkert
a4a5e6bc2e Twin64_t is in base/bigint.hh 
--HG--
extra : convert_revision : 827a89c203235aea08d184cdc720d9c6fb08e4c7
 2007-08-01 11:48:32 -07:00
Gabe Black
4bdabe1254 Add a flag to indicate an instruction triggers a syscall in SE mode. 
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
 2007-07-31 17:34:08 -07:00
Gabe Black
55ade789d3 X86: Add operand type information to the fnstcw and fldw instruction placeholders. 
These are the only floating point instructions that get used in my simple hello world test. These instructions are for setting up the floating point control register. Their not being implemented doesn't affect anything because floating point isn't used.

--HG--
extra : convert_revision : 4dfb9ef2a5665f034946c504978029e8799e64cd
 2007-07-31 14:55:06 -07:00
Steve Reinhardt
c4c8a12186 Merge from head. 
--HG--
extra : convert_revision : af16bc685ea28e44b8120f16b72f60a21d68c1e2
 2007-07-31 00:37:07 -04:00
Gabe Black
ae3e1d22fc X86: Add decoding for x87 floating point. 
--HG--
extra : convert_revision : 08f0f4a3d77a2c5eb9b5ca0cae7d0be9a72febec
 2007-07-30 17:54:01 -07:00
Gabe Black
463e8a7516 X86: Attach the "DIV" instruction implementation to the decoder. 
--HG--
extra : convert_revision : 8aef1c8d1ced2db998ed0d31241cadc17e19eadd
 2007-07-30 15:44:48 -07:00
Gabe Black
595ff465e5 X86: Remove a naming conflict between the register index parameters and the "picked" register values. 
--HG--
extra : convert_revision : 7b2c1be509478153ebf396841e4cbeccee3e03d1
 2007-07-30 15:44:21 -07:00
Gabe Black
77482dc439 X86: __pad0 should be a 4 byte pad, not a 4 long array of 4 byte pads. 
--HG--
extra : convert_revision : e0d5ab617bc95d5d714fa9fcdf0a448874aef886
 2007-07-30 15:43:20 -07:00
Gabe Black
f02bb63894 X86: Turn on the exit_group, exit, munmap, and write syscalls. 
--HG--
extra : convert_revision : e358c18cd999a8e274108e06502c3324c2d12d3b
 2007-07-30 15:42:42 -07:00
Gabe Black
43f0be5253 X86: Use an mmap base address that matches what an actual machine uses. 
--HG--
extra : convert_revision : 98521797bbc6360301b3c6a6b1b8e28236ef570e
 2007-07-30 15:42:04 -07:00
Gabe Black
890e583163 X86: Set up RIP relative LEA instructions operands correctly. 
--HG--
extra : convert_revision : 820cafadd550487c0d62c5082261b0886fce4f0d
 2007-07-30 15:41:08 -07:00
Gabe Black
44c3419e1a X86: Implement unsigned divide. The non-byte version ignores rdx which it shouldn't. 
--HG--
extra : convert_revision : 07e5509fb8ed9d73c144d6f52951ebc02e7c0032
 2007-07-30 15:40:39 -07:00
Gabe Black
74fcf117dd X86: Allow RIP relative decode on -all- memory forms of operands. 
--HG--
extra : convert_revision : 8af62cda2ce1c4acfa26a028a4f7506647bc27f7
 2007-07-30 15:39:25 -07:00
Gabe Black
65db30992c X86: Take into account the regular registers and the microcode registers when decided whether or not to fold. 
--HG--
extra : convert_revision : 26feec984dec61799c4afb03a4503a53c35872c5
 2007-07-30 15:38:40 -07:00
Gabe Black
9536120845 X86: Fix up the stat structure. This probably still isn't right. 
--HG--
extra : convert_revision : 2e2a22cdf3abe648c9e1309b9070cfd10fc4a8b8
 2007-07-30 13:31:59 -07:00
Gabe Black
a1b193f026 X86: Hook in the new instructions. 
--HG--
extra : convert_revision : c4233001b35b52161083482841593ec28da6ff7d
 2007-07-30 13:31:27 -07:00
Gabe Black
ab8ba813c9 X86: Turn on some system calls, and make the kernel version match my development machine. 
--HG--
extra : convert_revision : 2f1969a45aa82708dc4cddef09c01306f76f0a81
 2007-07-30 13:30:41 -07:00
Gabe Black
9e2b1f8630 X86: Make sure FP_Base_DepTag is big enough to avoid trouble. 
--HG--
extra : convert_revision : 7e0a83d5deb7fc9aaa69b7d024ea6ae6890df133
 2007-07-30 13:29:56 -07:00
Gabe Black
18be07289f X86: Implement a stub CPUID function which is hardcode to return certain values. 
--HG--
extra : convert_revision : 4085e04fd13e834646106faa55726d07d9631f42
 2007-07-30 13:29:33 -07:00
Gabe Black
dbc979b9e2 X86: Force jumps to use 64 bit operand size. 
--HG--
extra : convert_revision : 1c3685e7f4d07d5b4ded6c78b794964f51a358a9
 2007-07-30 13:28:31 -07:00
Gabe Black
bae96272a1 X86: Make instructions use pick, and implement/adjust some multiplication microops and instructions. 
--HG--
extra : convert_revision : 5c56f6819ee07d936b388b3d1810a3b73db84f9c
 2007-07-30 13:28:05 -07:00
Gabe Black
fad96cd0fc X86: Make merge and pick work with high bytes. Fix a sizing issue in pick. 
--HG--
extra : convert_revision : 4ddc2ca8c23bb7e90a646329ebf27a013ac5e3d6
 2007-07-30 13:26:48 -07:00
Gabe Black
0d31a41304 X86: Make register names in disassembly reflect high bytes. 
--HG--
extra : convert_revision : e2891581e5504de0a2c8e5932fd22425cafd4fc7
 2007-07-30 13:26:14 -07:00
Gabe Black
31a862b8f1 X86: missed a file which adds a "fold" bit. 
--HG--
extra : convert_revision : 2c8eea425221d069a9bb888c8f18839843061899
 2007-07-30 13:25:38 -07:00
Gabe Black
da84aa95a9 Make the register indices use the appropriate "fold" bit. 
--HG--
extra : convert_revision : 89e15e2ef1f709f2c09238b78f94505ce8ef146d
 2007-07-30 13:25:00 -07:00
Gabe Black
d8beeff324 X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded". 
--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
 2007-07-30 13:23:33 -07:00
Gabe Black
9b5421dcba X86: Missed a file for adding a bit to indicate that an REX prefix was present. 
--HG--
extra : convert_revision : f1bbd5165a7415d0daf27660575d30c41510f531
 2007-07-30 13:20:08 -07:00
Gabe Black
4b3a20cdec X86: Implement LEAVE 
--HG--
extra : convert_revision : c642d5018ece82c644e1cfa389b2d3dbd6ab5ffd
 2007-07-30 13:19:11 -07:00
Gabe Black
e70ffb0117 X86: Add a bitfield to indicate whether or not an REX prefix was present. 
--HG--
extra : convert_revision : 9c4802f6c6e4eaab36aac900e2c7576682cb0f33
 2007-07-30 13:17:34 -07:00
Gabe Black
24ac08daa4 Fix problem with tracer not being initialized. 
--HG--
extra : convert_revision : 09610ad84afa605db2d0eab9945eb9809f297182
 2007-07-30 13:13:11 -07:00
Steve Reinhardt
2f93db6f95 memory system: fix functional access bug. 
Make sure not to keep processing functional accesses
after they've been responded to.
Also use checkFunctional() return value instead of checking
packet command field where possible, mostly just for consistency.

--HG--
extra : convert_revision : 29fc76bc18731bd93a4ed05a281297827028ef75
 2007-07-29 20:17:03 -07:00
Gabe Black
fa86dcd1a6 Merge with head. 
--HG--
extra : convert_revision : 1cf4d998699d131c3b20eef67a3c2817af0ce439
 2007-07-29 13:53:39 -07:00
Gabe Black
7309d5ee45 X86: Make logic instructions flag setting work. 
The instructions now ask for the appropriate flags to be set, and the microops do the "right thing" with the CF and OF flags, namely zero them.

--HG--
extra : convert_revision : 85138a832f44c879bf8a11bd3a35b58be6272ef3
 2007-07-29 13:51:40 -07:00
Gabe Black
1af50a9e8b X86: Make arithmetic instructions set the appropriate flags. 
--HG--
extra : convert_revision : 3bdef3876c7b86bc93365edee876b74a201d625f
 2007-07-29 13:50:10 -07:00
Steve Reinhardt
08474ccf68 Merge Gabe's changes from head. 
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
 2007-07-29 13:25:14 -07:00
Steve Reinhardt
4a7d0c4b79 bus: take out response prioritization (timing was messed up). 
Also make express snoops not occupy bus (since they're magic).

--HG--
extra : convert_revision : 75aa5211a59380026d1e3f122778425e48e2edcd
 2007-07-29 13:24:48 -07:00
Steve Reinhardt
362ff1bceb BsaeCPU: Get rid of some bad DPRINTFs. 
People should never put pointers in DPRINTFs; it messes up
tracediffs.  Plus these used the FullCPU trace flag, which
is not right.

--HG--
extra : convert_revision : 82ed56757da0ad947c165ba205b5f752c85c6667
 2007-07-29 13:22:44 -07:00
Gabe Black
5e34c62b3b X86: Initial stack frame fixes and constant shuffling. 
The initial stack frame for x86 is now substantially more correct. The fixes made here can be back ported to SPARC and possible the other ISAs as well. The auxiliary vector types were moved to the LiveProcess base class because they are independent of ISA. Some of the types may only apply to Linux, though, so they may have to be moved.

--HG--
extra : convert_revision : 89ace35fcc8eb9586d2fee8eeccbc3686499ef24
 2007-07-29 01:33:06 -07:00
Gabe Black
e5f5890365 X86: Make limm use merge and allow overriding the data size. 
--HG--
extra : convert_revision : c6057226b8ff8f272612a9d3bf7d1d9ba90c819b
 2007-07-29 01:30:28 -07:00
Gabe Black
b6395da4ce X86: Fix register ordering. 
The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx.

--HG--
extra : convert_revision : 3abe6a723a6e30becfe34f8da707ea2ff5d4df77
 2007-07-29 01:28:36 -07:00
Gabe Black
33847f8c83 X86: return -return_value.value() on failure. 
--HG--
extra : convert_revision : d8e1486ff075b2917be62a0008f83fd6c9e4c09a
 2007-07-29 01:27:34 -07:00
Gabe Black
d995575342 X86: Fix popa and push with the stack pointer. 
POPA used st instead of ld, and it didn't skip rsp. push rsp needs to store the -original- value of the stack pointer.

--HG--
extra : convert_revision : 376370c99b6ab60fb2bc4cd4f0a6dce71153ad06
 2007-07-29 01:26:47 -07:00
Gabe Black
3dcd848ec3 X86: Fix a bug with merge 
Merge was returning the value to merge in, not the actual result of the merge.

--HG--
extra : convert_revision : 230b4b5064037d099ae7859edabdf5be84603849
 2007-07-29 01:24:57 -07:00
Gabe Black
dc86f3229c X86: Fix a comment and adjust the stack base address. 
The stack base on my development machine starts one page below where it needs to. I don't know why it does, but I've duplicated it in m5.

--HG--
extra : convert_revision : c4783ba885b90f17e843f61e07af0bc3330a74bc
 2007-07-28 21:18:53 -07:00
Gabe Black
fe46e28b14 Merge with head. 
--HG--
extra : convert_revision : 3c1ff2585c9b20649792344b4180f6d82cef9c1b
 2007-07-28 21:04:45 -07:00
Gabe Black
e996ff7497 X86: Fix up auxiliary vectors. 
The type constants should go into an architecture independent spot since they are universal to all Linux elf binaries. The right value for some of the vectors needs to be determined. Also, x86 does not store argc or argv_array_base in registers like some other architectures.

--HG--
extra : convert_revision : 8d3f6a3e028d881d3c41e8ddf4f29d25738b529c
 2007-07-28 20:33:42 -07:00
Gabe Black
8dd7700482 Turn the instruction tracing code into pluggable sim objects. 
These need to be refined a little still and given parameters.

--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
 2007-07-28 20:30:43 -07:00
Steve Reinhardt
aaf59949e5 AtomicSimpleCPU: fix inadvertent loss of endian conversion on read. 
--HG--
extra : convert_revision : 367bf2431bf4f4eb7c4d5723816e5db6f7233aed
 2007-07-28 18:00:05 -07:00
Nathan Binkert
142362b703 merge whitespace changes 
--HG--
extra : convert_revision : 20e8aa51935dc23ac3c7e6da2cb7a4e62c9a3a7c
 2007-07-28 17:06:32 -07:00
Nathan Binkert
c27e23f2e8 style: Check/Fix whitespace on SCons files 
--HG--
extra : convert_revision : 46e6b2dd8e1984cbab0ea24c94760794734c0f95
 2007-07-28 16:49:20 -07:00
Steve Reinhardt
8705b0799b packet: get rid of unused intersect() function. 
--HG--
extra : convert_revision : f0a2947ccc49e0d18bc17a59371fa396d9ebd6c0
 2007-07-27 12:46:55 -07:00
Steve Reinhardt
0cbcb715e0 cache/memtest: fixes for functional accesses. 
--HG--
extra : convert_revision : 688ba4d882cad2c96cf44c9e46999f74266e02ee
 2007-07-27 12:46:45 -07:00
Steve Reinhardt
01c9d34a0b cache: Get rid of unused variable. 
--HG--
extra : convert_revision : 394adc12fbd7ea10280a1b8d6bc3cb15ee019f27
 2007-07-27 03:51:15 -04:00
Nathan Binkert
f0fef8f850 Merge python and x86 changes with cache branch 
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
 2007-07-26 23:15:49 -07:00
Gabe Black
d4e69c006b Merge with head. 
--HG--
extra : convert_revision : e4be9d5f2ce8e3252958e2c5e03710b0bf9755c7
 2007-07-26 22:13:48 -07:00
Gabe Black
d1e533a1e2 X86: Fix argument register indexing. 
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.

--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
 2007-07-26 22:13:14 -07:00
Gabe Black
876849724d X86: Hook in shift and rotate by one instructions, and NOT. 
--HG--
extra : convert_revision : b3ab74e09f5cd02671cc6425c8cb8638bd58cbee
 2007-07-26 22:10:59 -07:00
Gabe Black
edaaf1ebf1 X86: Fix pc relative versions of add and subtract. 
--HG--
extra : convert_revision : c7e578aae8d36aa5d279fc27d6d7d28ed0a54181
 2007-07-26 22:10:21 -07:00
Gabe Black
647a3270d1 X86: Implement rotate-by-one instructions, and make register rotates use registers. 
--HG--
extra : convert_revision : 701691951688ecefdc6450d31076b45e9af15324
 2007-07-26 22:09:41 -07:00
Gabe Black
9e975a7e08 X86: Implement shift-by-one instructions, and make register shifts use registers. 
--HG--
extra : convert_revision : ce4af3e56b45821e0a8b27f288b532d2f9dd3336
 2007-07-26 22:09:24 -07:00
Gabe Black
c0670187c5 X86: Add functions to read and write to an exec context. 
These functions take care of calling the thread contexts read and write functions with the right sized data type, and handle unaligned accesses.

--HG--
extra : convert_revision : b4b59ab2b22559333035185946bae3eab316c879
 2007-07-26 22:08:35 -07:00
Gabe Black
57428b8b0b X86: Fix carry calculation for subtraction based microops. 
The carry flag should be calculated using the -complement- of the second operand, not it's negation. The carry in which is part of computing the 2's complement may induce a carry, but if you've already caused the carry before you get the carry computing logic involved, it will miss it.

--HG--
extra : convert_revision : 318cf86929664fc52ed9e023606a9e892eba635c
 2007-07-26 22:06:30 -07:00
Gabe Black
749ed15b60 Add functions for mmap and brk. 
--HG--
extra : convert_revision : 3d0340a2aae87b3462d6562b34ac7e02c685c1ef
 2007-07-26 22:04:33 -07:00
Gabe Black
7d826f632c Implement NOT 
--HG--
extra : convert_revision : 09cbed6332224d06644d401f21178eb7914993df
 2007-07-26 22:03:19 -07:00
Steve Reinhardt
6b73ff43ff Have owner respond to UpgradeReq to avoid race. 
--HG--
extra : convert_revision : 30916fca6978c73d8a14558f2d7288c1eab54ad4
 2007-07-26 17:04:17 -07:00
Steve Reinhardt
c3bf59dcb9 Add downward express snoops for invalidations. 
--HG--
extra : convert_revision : 4916fa9721d727d8416ad8c07df3a8171d02b2b4
 2007-07-26 17:04:17 -07:00
Steve Reinhardt
f1b5c8fb57 Continue snooping after a writeback is encountered. 
--HG--
extra : convert_revision : 8411338a6c0fdd7072dd32bdffacdace62d5de90
 2007-07-26 17:04:16 -07:00
Steve Reinhardt
58250b8e5f bus: Fix default port handling. 
--HG--
extra : convert_revision : 121b6e31cddff17c51fc4f3df20e7e2bde87d04f
 2007-07-26 17:04:12 -07:00
Nathan Binkert
19c01e82b1 Add a new SCons option called EXTRAS that allows you to include stuff in 
the build process that is outside of the main M5 tree.

--HG--
extra : convert_revision : 6edc4fbc58240f83b59c7b5707c0390cdb85d9ec
 2007-07-25 18:21:11 -07:00
Steve Reinhardt
c1097d06f7 Can't block on memInhibit packets 
(now that bus no longer filters them for us).

--HG--
extra : convert_revision : 34e7eaf5ee1e739f5557a2d417e569ed2ceb14b3
 2007-07-25 07:47:37 -07:00
Steve Reinhardt
de52eebd3b Integrate snoop loop functions into their respective call sites. 
Also some additional cleanup of Bus::recvTiming().

--HG--
extra : convert_revision : 156814119f75d04c2e954aec2d7ed6fdc186c26f
 2007-07-24 22:37:41 -07:00
Steve Reinhardt
d094f9cf27 Don't delete request at target... requester still needs it. 
--HG--
extra : convert_revision : 76377ca2e4d7ea70d1d54d325a63ce710e260b93
 2007-07-24 22:36:10 -07:00
Gabe Black
26b1c455e0 Merge with head. 
--HG--
extra : convert_revision : 4a34b3f91c4fc90055596245ae3efec45ea33888
 2007-07-24 15:48:40 -07:00
Gabe Black
02c39000bf Hook in a bunch of new instructions, fix a few minor bugs, and expand out one of the prefix multiplexed opcode groups. 
--HG--
extra : convert_revision : b5afd54a180a8fbdf9a892b1a2316fcf0d11afc6
 2007-07-24 15:43:38 -07:00
Gabe Black
93365f7d1a Add a tgt_iovec structure to support writev, change the name of X86Linux to X86Linux64, add some syscalls. 
--HG--
extra : convert_revision : 9c13e9c68f331fe6c4a9abd96f7aee0f064101fc
 2007-07-24 15:42:11 -07:00
Gabe Black
4bb1c5ba0c Add a special case for "test" which needs an immediate even though everything else with it's opcode doesn't. 
Also made some spacing consistent.

--HG--
extra : convert_revision : 72a317f29c11705782e19840bef24354214d3143
 2007-07-24 15:37:16 -07:00
Gabe Black
97c4258383 The groups of instructions hanging off opcode 71h, 72h, and 73h all need a byte immediate 
--HG--
extra : convert_revision : 9559047adfec1490c2d40065442a579549624fcc
 2007-07-24 15:19:02 -07:00
Gabe Black
69f4a6dc86 Make the shift and rotate microops mask the shift/rotate amount correctly. 
--HG--
extra : convert_revision : 31c5d3fa8ef0d37494d0e35cef31be6056d5d93f
 2007-07-24 15:10:53 -07:00
Gabe Black
15f57bd7cb Fix immediate shifts. Implement register shifts. 
--HG--
extra : convert_revision : 0b83422ad3c190021e46cada07e64d8d57d29859
 2007-07-24 15:10:20 -07:00
Gabe Black
66911a1fab Fix immediate rotates and add register ones. 
--HG--
extra : convert_revision : a6b9cee59019ea0f906c8a8e76eeb2cd73093671
 2007-07-24 15:08:56 -07:00
Gabe Black
d961846e8c Clean out part of an old comment. 
--HG--
extra : convert_revision : 6a6b2a06576ebe7383f7ce0e4e9f96bc96b84b56
 2007-07-24 15:08:09 -07:00
Gabe Black
340ce8e680 Implement cmov. 
--HG--
extra : convert_revision : 2e92623b53c1fe8b4da3fef3486c0dcd8d5ef9f5
 2007-07-24 15:07:35 -07:00
Gabe Black
28614addff Implement cdqe and cqo, which are also called cbw and cwde, and cwd and cdq respectively, depending on the operand size. 
--HG--
extra : convert_revision : 67ac035c68608d7260c21ce32009b344f3834e46
 2007-07-24 15:07:03 -07:00
Gabe Black
f8f7f994b8 Implement setcc. 
--HG--
extra : convert_revision : 7a47b9971fe9e4ac638b275fb56fdcba08c2d671
 2007-07-24 15:05:17 -07:00
Gabe Black
1cec0a3249 Get rid of an old comment. 
--HG--
extra : convert_revision : 1b86a7f60489bc65a03919b27afd4dfbe4e09bba
 2007-07-24 15:04:53 -07:00
Gabe Black
7e52393432 Get rid of an old comment 
--HG--
extra : convert_revision : 4d626721ad54af9cbf5b0c07a3a6e8a05e4e9ab5
 2007-07-24 15:03:43 -07:00
Steve Reinhardt
1f9ea6e122 A couple more minor bug fixes for multilevel coherence. 
--HG--
extra : convert_revision : 370f9e34911157765be6fd49e826fa1af589b466
 2007-07-23 22:28:40 -07:00
Nathan Binkert
abc76f20cb Major changes to how SimObjects are created and initialized. Almost all 
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
 2007-07-23 21:51:38 -07:00
Gabe Black
ecf2621f4f Implement pusha, popa, three operand imul, hook them into the decoder, and clean up the decoder a little. 
--HG--
extra : convert_revision : c1b8f0f433f629e4104e2b04addcdaabf57595e3
 2007-07-23 11:20:57 -07:00
Steve Reinhardt
97f7ee2e50 Fix WriteReq/StoreCondReq setting in O3. 
--HG--
extra : convert_revision : b41571535f3d1f78df3cb6e48c16de5c7549d87f
 2007-07-23 08:18:51 -07:00
Steve Reinhardt
82e2a35576 Replace lowerMSHRPending flag with more robust scheme 
based on following Packet senderState links.

--HG--
extra : convert_revision : 9027d59bd7242aa0e4275bf94d8b1fb27bd59d79
 2007-07-22 21:43:38 -07:00
Gabe Black
85f9415a67 Make the operand size reflect the size specifier on the operand tags, and implement NEG 
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
 2007-07-23 01:07:49 +00:00
Steve Reinhardt
d5c74657c9 Merge more changes in from head. 
--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72
 2007-07-22 08:10:59 -07:00
Steve Reinhardt
1c2d5f5e64 Replace DeferredSnoop flag with LowerMSHRPending flag. 
Turns out DeferredSnoop isn't quite the right bit of info
we needed... see new comment in cache_impl.hh.

--HG--
extra : convert_revision : a38de8c1677a37acafb743b7074ef88b21d3b7be
 2007-07-22 08:09:24 -07:00
Steve Reinhardt
03730edc45 Merge Gabe's changes with mine. 
--HG--
extra : convert_revision : f50ed42e7acb3f11e610fd6976eaa8df0c6ba2ab
 2007-07-22 10:40:45 -04:00
Steve Reinhardt
1edd143b68 A few minor non-debug compilation issues. 
--HG--
extra : convert_revision : d59a5cad6187a2229dddd1a48282ebd2923d1d8d
 2007-07-22 03:07:26 -04:00
Gabe Black
2cd454d102 Add the "open" syscall. 
--HG--
extra : convert_revision : d405ed5d3738639809dd2887955db9253138ccbb
 2007-07-22 02:43:03 +00:00
Gabe Black
47b0242618 Fixed immediate byte accounting bug. 
--HG--
extra : convert_revision : ee5275da14a2923b9a525ae5b5c582c15df4608a
 2007-07-22 02:34:52 +00:00
Gabe Black
bff4f765f5 Fixed displacement size bug. 
--HG--
extra : convert_revision : c39249ef598c1bd555098d688381dc62541a07c0
 2007-07-22 02:23:03 +00:00
Gabe Black
f7ff068b30 Implemented and hooked in xchg, rotate with carry, and ret instructions 
--HG--
extra : convert_revision : a8e67b0ab4072308f01e0df7f7ee05b31f605a35
 2007-07-21 19:29:39 -07:00
Gabe Black
ee6fbdc28b Implement rotate with carry microops. 
--HG--
extra : convert_revision : 1d7ff6611e5b4766a5257c1e73681fabbe5f6d76
 2007-07-21 19:27:38 -07:00
Steve Reinhardt
92ce2b5974 Deal with invalidations intersecting outstanding upgrades. 
If the invalidation beats the upgrade at a lower level
then the upgrade must be converted to a read exclusive
"in the field".
Restructure target list & deferred target list to
factor out some common code.

--HG--
extra : convert_revision : 7bab4482dd6c48efdb619610f0d3778c60ff777a
 2007-07-21 18:18:42 -07:00
Steve Reinhardt
9117860094 Several more fixes for multi-level timing coherence. 
- Add "deferred snoop" flag to Packet so upper-level caches
  can distinguish whether lower-level cache request was
  in-service or not at the time of the original snoop.
- Revamp response handling to properly handle deferred snoops
  on non-cache-fill requests (i.e. upgrades).
- Make sure forwarded writebacks are kept in write buffer at
  lower-level caches so they get snooped properly.

--HG--
extra : convert_revision : 17f8a3772a1ae31a16991a53f8225ddf54d31fc9
 2007-07-21 13:45:17 -07:00
Gabe Black
fc1b7d62b7 Fixed the distinction between far and near versions of jmp, call and ret. Implemented some shifts, rotates, and pushes. 
--HG--
extra : convert_revision : fcb06189ff213e82da16ac43231feb308cb3a285
 2007-07-20 23:16:03 -07:00
Gabe Black
009df5ff1e Fixed line number accounting 
--HG--
extra : convert_revision : 4c046493b98ce4a766c2121710d70650cb6a801e
 2007-07-20 23:12:26 -07:00
Gabe Black
75f6c6a016 Implement UD2 and replace the place holder in the decoder. 
--HG--
extra : convert_revision : 16d0d2b2ddad8759698fa4aa668c22063307c72b
 2007-07-20 18:27:02 -07:00
Gabe Black
8dd93f32e4 Make the "name" function const. 
--HG--
extra : convert_revision : eb71bc3edd92a544a5333786635fce550aaef233
 2007-07-20 18:24:46 -07:00
Gabe Black
9093cb79a1 Implement adc and sbb instructions and microops. 
--HG--
extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa
 2007-07-20 17:17:11 -07:00
Gabe Black
c3669b8925 Implement the rest of the conditional jump instructions and hook them into the decoder. 
--HG--
extra : convert_revision : 8d1d6abce29371def560e1c3f31dabb4de01366f
 2007-07-20 17:02:39 -07:00
Gabe Black
231cc3effb Make the decoder take advantage of the new "B" operand format which takes a register index from the opcode itself. 
--HG--
extra : convert_revision : 35f9be6559ee9833049eda1817982efdde7082be
 2007-07-20 16:48:59 -07:00
Gabe Black
1ed6a8ed79 Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops. 
--HG--
extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
 2007-07-20 16:39:07 -07:00
Gabe Black
705a22b999 Hook in newly implemented instructions. 
--HG--
extra : convert_revision : 53319d2363211af407dabaa2b63ad8a4df09c369
 2007-07-20 15:05:37 -07:00
Gabe Black
dfcb2ffa46 Comment, implement, fix, and trim the move microassembly. 
--HG--
extra : convert_revision : aa5ee7270e740bfbe42e70c4dfccc4c91ecacb33
 2007-07-20 15:04:41 -07:00
Gabe Black
fcc23891bb Implement jnbe. 
--HG--
extra : convert_revision : cdbf1ff5ed3a63787cbd2187a8a3455a41cc5085
 2007-07-20 15:03:36 -07:00
Gabe Black
79b3208aa5 Appended _NEAR to the near version of call and return. 
--HG--
extra : convert_revision : 70adb38d59ff7b5d103e58a9f0773dfb911fec6d
 2007-07-20 15:03:03 -07:00
Gabe Black
f09847c7a6 Make load and store ops use the appropriate sized data access. 
--HG--
extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
 2007-07-20 15:02:09 -07:00
Gabe Black
d926de462a Implement the increment and decrement instructions, and the two operand form of signed multiplication. 
--HG--
extra : convert_revision : d87df4b1b5470bed1d963dfe8e2ffa1403718342
 2007-07-20 14:59:14 -07:00
Gabe Black
ec5f66190e Fix code that computes displacement size. 
--HG--
extra : convert_revision : a9be3eb2b90b88086936aeb4dcf87ec7b58a48cb
 2007-07-20 14:57:34 -07:00
Gabe Black
5d882984d1 Add a bitfield to decode based on what prefixes are used. 
--HG--
extra : convert_revision : 7ff4998b3249ccfe86ae9cbcc63fb910683707f5
 2007-07-20 14:57:04 -07:00
Gabe Black
dcfaa348b1 Add a parameter type to read a register index from the opcode itself. 
--HG--
extra : convert_revision : d2b5468ebf5df5a6ccadb57a30c52c8d16417b9a
 2007-07-20 14:55:16 -07:00
Gabe Black
ee22bcd609 Fix function which calculates the carry flag. 
--HG--
extra : convert_revision : aeb4f2d4c3936089421dbe80647f28ae36178283
 2007-07-20 14:54:17 -07:00
Gabe Black
0baae59c09 Fix carry flag for subtracts, and clean up code slightly. 
--HG--
extra : convert_revision : 668f5d5aeba888488b41284de6c72a0d055c4ef4
 2007-07-20 14:53:38 -07:00
Gabe Black
0781609693 Fixed width parameter and provided a parameter to flip the carry bit on subtract. 
--HG--
extra : convert_revision : d01bb791b000a2fdfc8600f8fb2f8aadd52b0b63
 2007-07-20 14:52:44 -07:00
Gabe Black
cfadef74d1 x86 fixes 
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.

--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
 2007-07-19 15:15:47 -07:00
Gabe Black
09f056a1ef Check for the two opcode prefix correctly and add in some instructions. 
--HG--
extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97
 2007-07-18 17:51:05 -07:00
Gabe Black
f6d326d6fc Hook near returns into the decoder. 
--HG--
extra : convert_revision : b38d4417552991e44f5d1de1f35d5d1ad8f32340
 2007-07-18 17:48:16 -07:00
Gabe Black
dbf361128a Implement near returns. 
--HG--
extra : convert_revision : 3d6e8a976d31cb016a4b78200716b0ece155137a
 2007-07-18 17:47:40 -07:00
Gabe Black
99310a1d93 Make instructions that conditionally set registers set them to their old value if they don't actually execute. 
--HG--
extra : convert_revision : 36e63dd0c6ac1a3e1133c7985cf5507b83e9ee45
 2007-07-18 17:46:38 -07:00
Gabe Black
776283cff8 Fix the overload which prints ExtMachInst in X86. 
--HG--
extra : convert_revision : 2ef8ee71999f36b09270ba9526c2846beda65051
 2007-07-18 17:45:43 -07:00
Gabe Black
05a33a443f Make store microops actually store instead of load. 
--HG--
extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
 2007-07-18 17:45:06 -07:00
Gabe Black
e209fce9de Fix a comment to refer to the right type of instruction. 
--HG--
extra : convert_revision : dd441d8fbaed1ed8b2b66e3ad0275009bd4dcef4
 2007-07-18 17:44:12 -07:00
Gabe Black
17f3da6c29 Fix the panic in the "error" format for x86, 
--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
 2007-07-18 17:43:30 -07:00
Gabe Black
6c54b654a8 Implement some forms of add. 
--HG--
extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7
 2007-07-18 16:33:56 -07:00
Gabe Black
bafb7ee5c1 Fix the operand types in a section of the decoder. 
--HG--
extra : convert_revision : c37600fd65b44817eed2ba653f9d4f08a9869874
 2007-07-18 16:26:52 -07:00
Gabe Black
b949458d4c Make the data size used by regops overridable in the microassembly. 
--HG--
extra : convert_revision : 84d850aa5340c9d02d03502704b063215f6e2140
 2007-07-18 16:26:17 -07:00
Gabe Black
387f00e3dd Fill out the miscreg file and add types to miscregs.hh 
--HG--
extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
 2007-07-18 16:12:39 -07:00
Gabe Black
5cca5ca3d9 Hook x86 nop into the decoder. 
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
 2007-07-18 16:11:52 -07:00
Gabe Black
d21c16fd37 Fix a compilation error for SubBitUnions, 
--HG--
extra : convert_revision : aad9388afe81ba6541d0b18fa9777e6ffcfd871c
 2007-07-18 16:11:16 -07:00
Gabe Black
3bd42af99e Implement the x86 nop to be a "fault" microop which returns "NoFault". 
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
 2007-07-18 16:10:44 -07:00
Gabe Black
dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst. 
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
 2007-07-18 16:09:35 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const. 
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
 2007-07-18 16:09:00 -07:00
Gabe Black
85f32920fb Calculate the correct address size. 
--HG--
extra : convert_revision : 6bd9d5a01ba6600781e3678e0403dca524fb2cba
 2007-07-17 20:54:55 -07:00
Gabe Black
e524240d68 Make disassembled x86 register indices reflect their size. 
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
 2007-07-17 18:12:33 -07:00
Gabe Black
2e80f71dcd Implemented jnz. 
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
 2007-07-17 16:55:33 -07:00
Gabe Black
62ffc71fab Use limm to set up immediate value for subtract instruction. 
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
 2007-07-17 16:50:13 -07:00
Gabe Black
d77d4c04b7 Implement the jz instruction. 
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
 2007-07-17 15:36:45 -07:00
Gabe Black
c4004482a5 Make "test" set some condition codes. 
It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
 2007-07-17 15:35:34 -07:00
Gabe Black
a6757095c3 Add in support for condition code flags. 
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
 2007-07-17 15:33:18 -07:00
Gabe Black
cf846d5205 Add in operand which holds the condition code bits of the flag register. 
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
 2007-07-17 15:28:48 -07:00
Gabe Black
bbf7163dd9 Add symbols for each of the flags a microop could set and each condition it could check. 
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
 2007-07-17 15:27:28 -07:00
Gabe Black
cbc24d6600 Actually include miscregs.hh 
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
 2007-07-17 13:30:23 -07:00
Gabe Black
b0643a08a3 Create a file to describe misc registers. 
Define bitfields, indices, etc.

--HG--
extra : convert_revision : 8fffdc4cf796d304b12b317d8bddf5685bd50cf4
 2007-07-17 13:29:40 -07:00
Gabe Black
8f3153ffb3 Create a file of functions for computing condition codes. 
These haven't been very thuroughly tested, so use at your own risk.

--HG--
extra : convert_revision : 938885d36fea4a99f8228cdf195a0e0a38dd9031
 2007-07-17 13:28:03 -07:00
Gabe Black
aad11bf879 Add a spot for the condition code portion of the flag register. 
This is stored in the integer register file so that it can be renamed, but it should be a misc reg.

--HG--
extra : convert_revision : eee48f24dd80b145f14427482047c4d8af2521ab
 2007-07-17 13:26:06 -07:00
Gabe Black
13ccac1a3c Add a conversion constructor so a bitunion can be initialized to a value. 
Previously, the bitunion would need to be declared and then assigned to separately.

--HG--
extra : convert_revision : d229bd83bc7baeca2259d4e7b080f359915015f3
 2007-07-17 13:23:42 -07:00
Steve Reinhardt
a67a0025b3 Make sure responses never get blocked. 
--HG--
extra : convert_revision : 29f359d743994a94dc403aa0621ba72cd137d1a1
 2007-07-17 08:15:23 -07:00
Steve Reinhardt
a25f3ac67f Forward cache-to-cache responses through other caches. 
--HG--
extra : convert_revision : 5b6a02255bccd98b00949703cf4ba4b221553cea
 2007-07-17 06:33:28 -07:00
Steve Reinhardt
ff13827ccb Assert that an mshr has a target in getTarget(). 
--HG--
extra : convert_revision : 08091670fc319876012ed139fcd2584c364a980c
 2007-07-17 06:23:11 -07:00
Steve Reinhardt
f67c8b33cc Fix bug with timing snoop upcalls to MemTest object. 
--HG--
extra : convert_revision : 1940a5d231b4f856cf69578f68ea98435824dbd8
 2007-07-15 21:03:12 -07:00
Steve Reinhardt
884807a68a Fix up a bunch of multilevel coherence issues. 
Atomic mode seems to work.  Timing is closer but not there yet.

--HG--
extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f
 2007-07-15 20:11:06 -07:00
Steve Reinhardt
f790f34fe3 Make Bus::findPort() a little more useful. 
Move check for loops outside, since half the call sites
end up working around it anyway.  Return integer port ID
instead of port object pointer.

--HG--
extra : convert_revision : 4c31fe9930f4d1aa4919e764efb7c50d43792ea3
 2007-07-15 20:09:03 -07:00
Steve Reinhardt
9172876dd7 Fix problem with unset max_loads in memtest. 
Also make default 0, and make that mean run forever.

--HG--
extra : convert_revision : 3e60a52b1c5e334a9ef3d744cf7ee1d851ba4aa9
 2007-07-15 14:32:55 -07:00
Gabe Black
873b762d4b Move bitunion code into it's own file. 
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
 2007-07-14 17:28:26 -07:00
Gabe Black
4f7809d5e6 Pull some hard coded base classes out of the isa description. 
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
 2007-07-14 17:14:19 -07:00
Steve Reinhardt
15a51d0cae Add CacheRepl trace flag and move a couple DPRINTFs to it. 
--HG--
extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183
 2007-07-14 13:28:52 -07:00
Steve Reinhardt
abd194df5c Move a couple of DPRINTFs from Cache to CachePort. 
--HG--
extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be
 2007-07-14 13:16:58 -07:00
Steve Reinhardt
3b4ff75939 Fix bug in copying packet with static data pointer. 
--HG--
extra : convert_revision : 2fcf99f050d73e007433c1db2475f2893c5961a0
 2007-07-14 13:14:53 -07:00
Steve Reinhardt
288f9cf7d2 Merge from head. 
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
 2007-07-14 12:23:47 -07:00
Steve Reinhardt
e5ecfa2745 Disable PrintThreadInfo since it causes a panic when using VPtr. 
See Flyspray #281.

--HG--
extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
 2007-07-14 12:22:04 -07:00
Steve Reinhardt
c2ee69d687 Make NO_FAST_ALLOC compile. 
--HG--
extra : convert_revision : 80579a61eb8d220e75cdee11bc09ca985c8fd85c
 2007-07-14 12:12:46 -07:00
Steve Reinhardt
a51e16dc89 Merge of DPRINTF fixes from head. 
--HG--
extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
 2007-07-14 12:09:37 -07:00
Steve Reinhardt
7cd6c7ee05 Fix & tweak DPRINTFs for tracediff w/new cache code. 
Note that we should *not* print pointer values in DPRINTFs as
these needlessly clutter tracediff output.

--HG--
extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
 2007-07-14 11:48:30 -07:00
Steve Reinhardt
4738649e32 Delete packets when we're done with them. 
--HG--
extra : convert_revision : b8894d26e1ca7a6c9b736500accdaa53bfb09558
 2007-07-03 00:40:31 -04:00
Steve Reinhardt
4b68652c87 Couple more minor bug fixes for FS timing mode. 
src/cpu/simple/timing.cc:
    Fix another SC problem.
src/mem/cache/cache_impl.hh:
    Forgot to call makeTimingResponse() on uncached timing responses.

--HG--
extra : convert_revision : 5a5a58ca2053e4e8de2133205bfd37de15eb4209
 2007-07-02 13:57:45 -07:00
Steve Reinhardt
e9c04dad60 Fix a couple LL/SC bugs that only affected timing mode. 
src/cpu/simple/timing.cc:
    Fix swap/stq_c command bug.
src/mem/packet.cc:
    Fix incorrect LoadLockedReq command response field.

--HG--
extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5
 2007-07-02 09:26:36 -07:00
Steve Reinhardt
ffd697e149 bus.cc: 
Fix atomic timing issue.

src/mem/bus.cc:
    Fix atomic timing issue.

--HG--
extra : convert_revision : a22ff80cd75f83c785b0604c2a4fde2e2e9f71ef
 2007-07-02 01:02:35 -07:00
Steve Reinhardt
3ad761bc8e Make CPU models use new LoadLockedReq/StoreCondReq commands. 
--HG--
extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
 2007-06-30 20:35:42 -07:00
Steve Reinhardt
5e59739416 Don't propagate snoops across bridges. Wouldn't work anyway. 
--HG--
extra : convert_revision : af29fc7d0c134f5e89dd2e814c819151350fcb38
 2007-06-30 18:03:17 -07:00
Steve Reinhardt
07f091d6ed Get rid of remaining traces of obsolete CoherenceProtocol object. 
--HG--
extra : convert_revision : c5555b00bef1b304a84886188ad2c0dcb4d7c5b9
 2007-06-30 17:59:45 -07:00
Steve Reinhardt
2447abe5ce Can only call makeAtomicResponse() once... 
--HG--
extra : convert_revision : c49aade46aa64f979da35eb653b544ee5bd82f01
 2007-06-30 17:56:30 -07:00
Steve Reinhardt
d10a843723 Get rid of obsolete fixPacket() functions. 
Handled by Packet::checkFunctional() now.

--HG--
extra : convert_revision : 63642254e2789c80a369ac269f317ec054ffe3c0
 2007-06-30 17:51:29 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event" 
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
 2007-06-30 17:45:58 -07:00
Steve Reinhardt
f0c4dd7920 Factor out a little more common code. 
--HG--
extra : convert_revision : 626255a91679d534030c91bcdb4fc1bed36ceb9b
 2007-06-30 13:56:25 -07:00
Steve Reinhardt
6babda7123 Fix up a few statistics problems. 
Stats pretty much line up with old code, except:
- bug in old code included L1 latency in L2 miss time, making it too high
- UniCoherence did cache-to-cache transfers even from non-owner caches,
so occasionally the icache would get a block from the dcache not the L2
- L2 can now receive ReadExReq from L1 since L1s have coherence

--HG--
extra : convert_revision : 5052c1a1767b5a662f30a88f16012165a73b791c
 2007-06-30 13:34:16 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are 
now encoded in cmd field.

--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
 2007-06-30 10:16:18 -07:00
Steve Reinhardt
749126e011 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 1e94283da8007fce8e1a0f2849ce5d5a8dbbaffd
 2007-06-29 13:03:36 -07:00
Korey Sewell
738ecc495b fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... 
src/arch/mips/isa/decoder.isa:
    commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
    edit fp format
src/arch/mips/isa/formats/mem.isa:
    fix for basic store instructions

--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
 2007-06-29 15:13:50 -04:00
Steve Reinhardt
7f3dfa7c09 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : b1c954c187e3b3172a194396ba63808253121195
 2007-06-28 08:28:58 -07:00
Korey Sewell
e28cbc98a0 o3cpu build for mips 
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
 2007-06-28 05:30:46 -04:00
Steve Reinhardt
9117c94f9c Get rid of coherence protocol object. 
--HG--
extra : convert_revision : 4ff144342dca23af9a12a2169ca318a002654b42
 2007-06-27 20:54:13 -07:00
Steve Reinhardt
c4903e0882 Revamp replacement-of-upgrade handling. 
--HG--
extra : convert_revision : 9bc09d8ae6d50e6dfbb4ab21514612f9aa102a2e
 2007-06-26 23:30:30 -07:00
Steve Reinhardt
1b20df5607 Handle deferred snoops better. 
--HG--
extra : convert_revision : 703da6128832eb0d5cfed7724e5105f4b3fe4f90
 2007-06-26 22:23:10 -07:00
Steve Reinhardt
69ff6d9163 cache_impl.hh: 
Change target overflow from assertion to warning.

src/mem/cache/cache_impl.hh:
    Change target overflow from assertion to warning.

--HG--
extra : convert_revision : ceca990ed916bbf96dedd4836c40df522803f173
 2007-06-26 18:01:22 -04:00
Steve Reinhardt
7dacbcf492 Handle replacement of block with pending upgrade. 
src/mem/cache/tags/lru.cc:
    Add some replacement DPRINTFs

--HG--
extra : convert_revision : 7993ec24d6af7e7774d04ce36f20e3f43f887fd9
 2007-06-26 14:53:15 -07:00
Steve Reinhardt
f697e959a1 Couple minor bug fixes... 
src/mem/cache/cache_impl.hh:
    Handle grants with no packet.
src/mem/cache/miss/mshr.cc:
    Fix MSHR snoop hit handling.

--HG--
extra : convert_revision : f365283afddaa07cb9e050b2981ad6a898c14451
 2007-06-25 22:23:29 -07:00
Steve Reinhardt
529f12a531 Get rid of requestCauses. Use timestamped queue to make 
sure we don't re-request bus prematurely.  Use callback to
avoid calling sendRetry() recursively within recvTiming.

--HG--
extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140
 2007-06-25 06:47:05 -07:00
Steve Reinhardt
47bce8ef78 Better handling of deferred targets. 
--HG--
extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f
 2007-06-24 17:32:31 -07:00
Steve Reinhardt
245b0bd9b9 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

src/base/traceflags.py:
    Hand merge.

--HG--
extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
 2007-06-23 13:26:30 -07:00
Steve Reinhardt
57ff2604e5 Minor fix plus new assertion to catch similar bugs. 
src/cpu/memtest/memtest.cc:
    Need to set packet source field so that response from cache
    doesn't run into assertion failure when copying source to dest.
src/mem/packet.hh:
    Copy source field when copying packets.
    Assert that source is valid before copying it to dest
    when turning packets around.

--HG--
extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8
 2007-06-23 13:24:33 -07:00
Korey Sewell
ac19e0c505 FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality... 
src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
 2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565 add Control Bitfield class 
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
 2007-06-22 20:09:46 -04:00
Steve Reinhardt
ed1db23b41 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
 2007-06-22 16:13:53 -07:00
Korey Sewell
753adb38d5 mips import pt. 1 
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
 2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
 2007-06-22 17:44:33 -04:00
Steve Reinhardt
4d1bcbcd36 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 1da75335907fee2d1745ec13e515819dfe2aad89
 2007-06-22 09:24:33 -07:00
Steve Reinhardt
bdd5fd20fb Fixes to hitLatency, blocking, buffer allocation. 
Single-cpu timing mode seems to work now.

--HG--
extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad
 2007-06-22 09:24:07 -07:00
Gabe Black
70d6044527 Make symbols for regular registers. 
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
 2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59 Get rid of an unnecessary include file. 
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
 2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

src/cpu/o3/fetch_impl.hh:
    hand merge

--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
 2007-06-21 20:35:25 +00:00
Gabe Black
470a6a9a74 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba4d93f354749d02278b16e78b4ecd4b2311416b
 2007-06-21 20:35:23 +00:00
Steve Reinhardt
eff122797b Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920
 2007-06-21 12:03:22 -07:00
Steve Reinhardt
83af0fdcf5 Getting closer... 
configs/example/memtest.py:
    Add progress interval option.
src/base/traceflags.py:
    Add MemTest flag.
src/cpu/memtest/memtest.cc:
    Clean up tracing.
src/cpu/memtest/memtest.hh:
    Get rid of unused code.

--HG--
extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
 2007-06-21 11:59:17 -07:00
Ali Saidi
5195500cdf Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we don't spend so much time calling malloc() 
--HG--
extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f
 2007-06-21 13:50:35 -04:00
Gabe Black
25e385e0cf Use the new symbols to clean up the assembler. 
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
 2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053 Needed for last change set to work :P 
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
 2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083 Define symbols for the x86 specialization of the microassembler. 
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
 2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3 Fix a comment. 
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
 2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols. 
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
 2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958 Add in code that lays the ground work for setting flags. 
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
 2007-06-21 13:48:44 +00:00
Gabe Black
df7730b677 Fix compiler errors. 
--HG--
extra : convert_revision : 2b10076a24cb36cb748e299011ae691f09c158cd
 2007-06-20 19:46:45 -07:00
Gabe Black
77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores. 
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
 2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e Fix a newly introduced bug where the predecoder wasn't picking up all the displacement. 
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
 2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014 X86 probably doesn't need a window save area. 
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
 2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c Fix a typo in one of the operand type tags. 
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
 2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1 Comment out some unnecessary debug output. 
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
 2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282 Forgot to check these in... 
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
 2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1 Comment out some unnecessary debug statements. 
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
 2007-06-20 19:04:38 +00:00
Gabe Black
0a971cc0c9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : f2fac2b1a09e709021cd8382a9fbe805df2177ef
 2007-06-20 19:04:37 +00:00
Vincentius Robby
4a7bc06553 Minor error. 
--HG--
extra : convert_revision : 514032e21c8861f20fcbcae7204e132088cc7dbc
 2007-06-20 15:04:36 -04:00
Vincentius Robby
d540dde5b4 Removed "adding instead of dividing" trick. 
Caused slowdown in performance instead of speeding up.

src/cpu/base.cc:
    Removed "adding instead of dividing" trick.
src/mem/bus.cc:
    Fixed spelling in comments.
    Removed "adding instead of dividing" trick.

--HG--
extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488
 2007-06-20 14:54:17 -04:00
Nathan Binkert
f65e2710ec Don't do checker stuff if the checker is not defined 
--HG--
extra : convert_revision : 1c920b050c21e592a386410e4e9f45354f8e4441
 2007-06-20 08:15:06 -07:00
Nathan Binkert
b47737dde7 Make sure all parameters have default values if they're 
supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.

--HG--
extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
 2007-06-20 08:14:11 -07:00
Nathan Binkert
438ec924d6 Don't go over 80 chars per line 
--HG--
extra : convert_revision : ec73c3c8788757990a6fab8c600f3b353d0d4206
 2007-06-20 08:12:10 -07:00
Gabe Black
a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
 2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro

src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Hand merge

--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
 2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction. 
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
 2007-06-19 22:40:10 +00:00
Gabe Black
cc796de962 Missed an "offset" to get rid of. 
--HG--
extra : convert_revision : 7542f130b269a6a09e6ed51ae4689d1faa45a155
 2007-06-19 19:01:02 +00:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. 
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
 2007-06-19 18:17:34 +00:00
Gabe Black
d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL. 
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
 2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85 Make an error message a little more descriptive. 
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
 2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70 Renovate the "fault" microop implementation. 
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
 2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list. 
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
 2007-06-19 14:26:42 +00:00
Gabe Black
053c715f21 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
 2007-06-19 14:18:46 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
 2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst. 
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
 2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names. 
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
 2007-06-19 14:14:17 +00:00
Ali Saidi
2d08ab0cc2 fix bug in timing cpu. getTime() is the time the requset was created, not the time it was repsonded to. In timing mode the 
time it was responded to is curTick. Doesn't change the results, but it does make implementation of nextCycle() more difficult

--HG--
extra : convert_revision : 67ed6261a5451d17d96d5df45992590acc353afc
 2007-06-18 18:11:07 -04:00
Gabe Black
7994fa9431 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : fd64f2de0051afdc51e833a7cbf7fa120b230cc3
 2007-06-18 14:16:08 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output. 
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
 2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
 2007-06-18 14:15:00 +00:00
Steve Reinhardt
d69a763833 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

configs/example/memtest.py:
    Hand merge redundant changes.

--HG--
extra : convert_revision : a2e36be254bf052024f37bcb23b5209f367d37e1
 2007-06-17 17:30:24 -07:00
Steve Reinhardt
35cf19d441 More major reorg of cache. Seems to work for atomic mode now, 
timing mode still broken.

configs/example/memtest.py:
    Revamp options.
src/cpu/memtest/memtest.cc:
    No need for memory initialization.
    No need to make atomic response... memory system should do that now.
src/cpu/memtest/memtest.hh:
    MemTest really doesn't want to snoop.
src/mem/bridge.cc:
    checkFunctional() cleanup.
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.cc:
src/mem/cache/cache.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_builder.cc:
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/coherence_protocol.cc:
src/mem/cache/coherence/coherence_protocol.hh:
src/mem/cache/coherence/simple_coherence.hh:
src/mem/cache/miss/SConscript:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
src/mem/packet.cc:
src/mem/packet.hh:
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/tport.cc:
    More major reorg.  Seems to work for atomic mode now,
    timing mode still broken.

--HG--
extra : convert_revision : 7e70dfc4a752393b911880ff028271433855ae87
 2007-06-17 17:27:53 -07:00
Steve Reinhardt
f4babe1082 memtest.cc: 
No need to initialize memory contents; should come up as 0.

src/cpu/memtest/memtest.cc:
    No need to initialize memory contents; should come up as 0.

--HG--
extra : convert_revision : 1713676956f3d33b4686fee2650bd17027bcc495
 2007-06-16 14:05:05 -07:00
Gabe Black
3ceb0a46ae Add in some microregs. 
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
 2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future. 
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
 2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm. 
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
 2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect. 
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
 2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place. 
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
 2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
 2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method. 
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
 2007-06-14 16:52:19 -04:00
Gabe Black
cb7934f052 Fix an assert to allow rounding mode 0. 
--HG--
extra : convert_revision : 119cc87ccf939d3a0048d87d18e125deca378bb7
 2007-06-14 13:53:27 +00:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode. 
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
 2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst. 
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
 2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement. 
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
 2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. 
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
 2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly. 
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
 2007-06-14 13:45:37 +00:00
Gabe Black
6641423a0b A fix for SPARC_FS compilation. 
--HG--
extra : convert_revision : 8af0dd9c16e7db8ed92f7a71c396841d5ae7e072
 2007-06-14 13:27:08 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. 
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
 2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names. 
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
 2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP" 
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
 2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though. 
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
 2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly. 
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
 2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up. 
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
 2007-06-12 17:35:11 +00:00
Gabe Black
02732929e8 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1d2efac895a1c8328026a079e0b319a436325616
 2007-06-12 17:19:14 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix. 
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
 2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well. 
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
 2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes. 
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
 2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions. 
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
 2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86. 
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
 2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype. 
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
 2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things. 
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
 2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst 
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
 2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs 
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
 2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent. 
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
 2007-06-12 16:21:47 +00:00
Nathan Binkert
125237d357 Rename enum from OpType to OpClass so it's consistent with the 
real thing.  Also rename the null case to something that can
be a C++ symbol.

--HG--
extra : convert_revision : e3bfc4065b59c21f613e486d234711c48d7c9070
 2007-06-11 23:10:58 -07:00
Nathan Binkert
961f8382f6 Add a function to get a SimObject's memory mode and rework 
the set memory mode code to only go through the change if
it is necessary

--HG--
extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
 2007-06-10 13:52:21 -07:00
Nathan Binkert
fc4ab050b4 Add a startup function that will fast forward to the right clock edge 
using a divide in order to not loop forever after resuming from a checkpoint

--HG--
extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a
 2007-06-09 23:01:47 -07:00
Nathan Binkert
11f1c8dd3e Use the right type 
--HG--
extra : convert_revision : b5ca3153ca786ea4e86bfe83f7760ba9ee41a882
 2007-06-09 23:00:13 -07:00
Nathan Binkert
9f75ac783b only compile fenv.c if we're using fenv 
--HG--
extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
 2007-06-09 22:59:33 -07:00
Nathan Binkert
e9936a6250 More realistic parameters 
--HG--
extra : convert_revision : aaa4ea2b7c97df3d6b731e9252984b45715e9d6f
 2007-06-09 22:43:08 -07:00
Gabe Black
1493ceda8f Fix another outdated comment. 
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
 2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments. 
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
 2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment. 
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
 2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment. 
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
 2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft. 
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
 2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little. 
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
 2007-06-08 17:06:34 +00:00
Gabe Black
5f0d82baeb Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
 2007-06-08 16:13:45 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
 2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler. 
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
 2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR. 
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
 2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst. 
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
 2007-06-08 16:06:22 +00:00
Ali Saidi
c5a946efea Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
 2007-06-05 01:03:43 -04:00
Ali Saidi
85986e9dff Clean up some of vincent's code and commit it 
Makes page table cache scheme actually work

src/mem/page_table.cc:
src/mem/page_table.hh:
    fix caching scheme to actually work and improve performance

--HG--
extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
 2007-06-05 01:03:35 -04:00
Gabe Black
dba02f703b Make limm (load immediate) microop 
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
 2007-06-04 19:53:06 +00:00
Gabe Black
ddbc26c85e Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
 2007-06-04 19:53:05 +00:00
Ali Saidi
42174babbb don't be so aggressive with the tracing on #if 
--HG--
extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
 2007-06-04 15:53:04 -04:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
 2007-06-04 15:59:20 +00:00
Gabe Black
e47f1667b6 Don't mask the pc because the Alpha predecoder needs it to set the PAL mode bit in the ExtMachInst. 
--HG--
extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
 2007-06-02 03:41:47 +00:00
Nathan Binkert
aba2eeaf8f Fix typo so m5.fast will compile 
--HG--
extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
 2007-06-01 20:41:46 -07:00
Ali Saidi
66ee27078e Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
 2007-06-01 14:55:17 -04:00
Ali Saidi
be0aef9819 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

src/cpu/simple/base.cc:
    hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int

--HG--
extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
 2007-06-01 14:18:45 -04:00
Ali Saidi
d8f6769962 cast sizeof(MachInst) to Addr before generating a mask 
--HG--
extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
 2007-06-01 14:16:58 -04:00
Ali Saidi
d8c487c401 don't generate trace data unless tracing is on 
--HG--
extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
 2007-06-01 13:44:24 -04:00
Gabe Black
6e8a06b237 Clean things up 
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
 2007-06-01 16:24:51 +00:00
Gabe Black
85caab4e8c Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
 2007-06-01 16:24:50 +00:00
Vincentius Robby
a7fe9345ee Minor error. Forgotten to remove brackets for threadPC. 
--HG--
extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
 2007-06-01 12:24:49 -04:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly. 
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
 2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor 
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
 2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops 
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
 2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name 
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
 2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments 
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
 2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
 2007-05-31 20:45:04 +00:00
Vincentius Robby
83aa742d26 Merge zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem

--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
 2007-05-31 16:02:31 -04:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor. 
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
 2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler 
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
 2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
 2007-05-31 13:50:35 +00:00
Nathan Binkert
7797a239cc Fix cut-n-pasto to make the path correct 
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
 2007-05-30 17:19:20 -07:00
Steve Reinhardt
a9b7c558fd Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 26921dad179699b7868768361143aaa8d790b8fc
 2007-05-29 22:59:20 -07:00
Steve Reinhardt
4e65d2678d tport.cc: 
Oops... forgot to update call site after changing
function argument semantics.

src/mem/tport.cc:
    Oops... forgot to update call site after changing
    function argument semantics.

--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
 2007-05-30 01:53:28 -04:00
Steve Reinhardt
94c19ad37d Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 72c6f2ce7e9e2b46e59711a2c3cfe770c243018e
 2007-05-29 22:25:57 -07:00
Steve Reinhardt
365e4ac374 A little more cleanup & refactoring of SimpleTimingPort. 
Make it a better base class for cache ports.

--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
 2007-05-29 22:23:41 -07:00
Steve Reinhardt
05915ed6f7 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 6f462916cb0eb309b6799e94fbf07629abb50eba
 2007-05-28 08:13:40 -07:00
Steve Reinhardt
41f6cbce9a Restructure SimpleTimingPort a bit: 
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability

--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
 2007-05-28 08:11:43 -07:00
Steve Reinhardt
04ac944920 Reformat comments to meet line length restriction. 
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
 2007-05-28 08:04:33 -07:00
Steve Reinhardt
07bda077f2 Remove unnecessary include of physical.hh. 
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
 2007-05-28 08:03:13 -07:00
Steve Reinhardt
075f4b108a Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : fba7efd444e1ca9738385dd4662a33feab357e79
 2007-05-27 21:34:37 -07:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix 
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
 2007-05-27 19:21:17 -07:00
Steve Reinhardt
6a48f6b67d Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : f940480672861185a494f3fae1bfca13d31fed9f
 2007-05-26 20:15:35 -07:00
Nathan Binkert
4f0f217c1b Get rid of GNU libelf and its autoconf nastiness and replace 
it with FreeBSD's implementation

--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
 2007-05-26 18:15:22 -07:00
Steve Reinhardt
87bb4c3792 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : c2540bfd34eb5a6f41cb15ffe50f8ec72f80abb1
 2007-05-26 17:10:35 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
 2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated. 
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
 2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3 
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
 2007-05-24 21:54:51 -07:00
Steve Reinhardt
da46364b18 Fix getDeviceAddressRanges() to get snooping right. 
--HG--
extra : convert_revision : 2aeab25ef955ab9db7b968786faff227239fbbe4
 2007-05-22 07:30:55 -07:00
Steve Reinhardt
0484867d85 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

src/mem/cache/base_cache.hh:
    Manual conflict resolution.

--HG--
extra : convert_revision : 5ebfd7abb4f978caa88bf43d25935869edfc6b9f
 2007-05-22 06:36:01 -07:00
Steve Reinhardt
41dde5f6fd memtest.hh: 
Fix description string.
Minor whitespace cleanup.

src/cpu/memtest/memtest.hh:
    Fix description string.
    Minor whitespace cleanup.

--HG--
extra : convert_revision : 0c7213d088da46de9713ca6beabc30523ccb1c8c
 2007-05-22 06:32:24 -07:00
Steve Reinhardt
9048c695a0 Another pass of minor changes in preparation for new protocol. 
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/simple_coherence.hh:
    Get rid of old invalidate propagation logic in preparation
    for new multilevel snoop protocol.
src/mem/cache/coherence/coherence_protocol.cc:
    L2 cache now has protocol, so protocol must handle ReadExReq
    coming in from the CPU side.
src/mem/cache/miss/mshr_queue.cc:
    Assertion is failing, so let's take it out for now.
src/mem/packet.cc:
src/mem/packet.hh:
    Add WritebackAck command.
    Reorganize enum to put responses next to corresponding requests.
    Get rid of unused WriteReqNoAck.

--HG--
extra : convert_revision : 24c519846d161978123f9aa029ae358a41546c73
 2007-05-22 06:29:48 -07:00
Steve Reinhardt
41241799ae Change getDeviceAddressRanges to use bool for snoop arg. 
--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
 2007-05-21 23:36:09 -07:00
Steve Reinhardt
0a02e3a764 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : a8efe71a50b9ae480c5ad0aabd7aa9ba22bc2968
 2007-05-20 23:05:02 -07:00
Steve Reinhardt
05d14cf3e2 Add new EventWrapper constructor that takes a Tick value 
and schedules the event immediately.

--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
 2007-05-20 21:43:01 -07:00
Steve Reinhardt
87adc37e91 Insist that PhysicalMemory object have at least one connection. 
--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc
 2007-05-20 18:23:05 -07:00
Steve Reinhardt
dcce351eaa Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

src/mem/bridge.cc:
    SCCS merged

--HG--
extra : convert_revision : 9492be56a305afe88f28a77c3b23e80ce6aa81b3
 2007-05-18 22:37:32 -07:00
Steve Reinhardt
792d5b9e5e First set of changes for reorganized cache coherence support. 
Compiles but doesn't work... committing just so I can merge
(stupid bk!).

src/mem/bridge.cc:
    Get rid of SNOOP_COMMIT.
src/mem/bus.cc:
src/mem/packet.hh:
    Get rid of SNOOP_COMMIT & two-pass snoop.
    First bits of EXPRESS_SNOOP support.
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/prefetch/base_prefetcher.cc:
    Big reorg of ports and port-related functions & events.
src/mem/cache/cache.cc:
src/mem/cache/cache_builder.cc:
src/mem/cache/coherence/SConscript:
    Get rid of UniCoherence object.

--HG--
extra : convert_revision : 7672434fa3115c9b1c94686f497e57e90413b7c3
 2007-05-18 22:35:04 -07:00
Steve Reinhardt
aa5b595f39 Oops... some places in C++ explicitly ask for a "functional" 
port.  It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.

--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d
 2007-05-19 01:20:58 -04:00
Steve Reinhardt
0305159abf PhysicalMemory has vector of uniform ports instead of one special one. 
configs/example/memtest.py:
    PhysicalMemory has vector of uniform ports instead of one special one.
    Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
    Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
    Add comment.

--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
 2007-05-19 00:24:34 -04:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
 2007-05-18 13:36:47 -07:00
Gabe Black
6a6e62014e Changes to make simple cpu handle pcs appropriately for x86 
--HG--
extra : convert_revision : cf68886d53301e0a63705247bd7d66b2ff08ea84
 2007-05-18 10:42:50 -07:00
Ali Saidi
f487edf146 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 32dc1bec7fdb1ecb8879ed2dd745c4b23929aeab
 2007-05-15 18:06:52 -04:00
Ali Saidi
f317227b4e hopefully the final hacky change to make the bus bridge work ok 
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here

src/mem/bridge.cc:
src/mem/bridge.hh:
    hopefully the final hacky change to make the bus bridge work ok

--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c
 2007-05-15 17:39:50 -04:00
Steve Reinhardt
224ae7813d Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 8a501917daf81021212d136b4ebbfa059b452a13
 2007-05-14 13:54:22 -07:00
Ali Saidi
fcf85725b5 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : e445097240af7b4e73efaca855cd1f217cf00313
 2007-05-14 16:37:22 -04:00
Ali Saidi
57104ea5f9 couple more bug fixes for intel nic 
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
    couple more bug fixes

--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
 2007-05-14 16:37:00 -04:00
Ali Saidi
ea4e6f2e3d add uglyiness to fix dmas 
src/dev/io_device.cc:
    extra printing and assertions
src/mem/bridge.hh:
    deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
    make the cache try to satisfy a functional request from the cache above it before checking itself

--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
 2007-05-14 16:14:59 -04:00
Steve Reinhardt
fecae03a0b Eliminate unused PacketPtr from BaseCache's 
RequestEvent and ResponseEvent.
Compiles but not tested.

--HG--
extra : convert_revision : cc791e7adea5b0406e986a0076edba51856b9105
 2007-05-13 23:09:10 -07:00
Steve Reinhardt
df3fc36fa9 Split BaseCache::CacheEvent into RequestEvent and ResponseEvent. 
Compiles but not tested.

--HG--
extra : convert_revision : 4e1e28c4b87721ccfcf35a5ea62c1fa324acbaf9
 2007-05-13 22:58:06 -07:00
Ali Saidi
af26532bbd fix handling of atomic packets 
fix up code for counting requests and responses

--HG--
extra : convert_revision : 0d70981ee41c5d9c36cad01bd505281a096f6119
 2007-05-13 01:44:42 -04:00
Gabe Black
debf04aef1 Make sure all addresses used in syscalls are truncated to 32 bits. Actually -all- arguements are truncated to 32 bits, but we should be able to get away with it. 
--HG--
extra : convert_revision : 3b8766c68a4ab36e2e769fac4812657f3f7e0d1c
 2007-05-12 15:11:44 -07:00
Nathan Binkert
011db5c851 Move full CPU sim object stuff into the encumbered directory 
--HG--
extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c
 2007-05-11 15:01:44 -07:00
Nathan Binkert
113319a7da Float should have a c++ param type 
--HG--
extra : convert_revision : 150bbe7f31aafb43a75195fc2a365fb3c0ec5673
 2007-05-11 11:48:58 -07:00
Nathan Binkert
d667ce01b4 total should be the sum of the vector result of an operation, 
not sum the operands and then apply the operation.

--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09
 2007-05-11 11:47:18 -07:00
Ali Saidi
634d2e9d83 remove hit_latency and make latency do the right thing 
set the latency parameter in terms of a latency
add caches to tsunami-simple configs

configs/common/Caches.py:
tests/configs/memtest.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
    set the latency parameter in terms of a latency
configs/common/FSConfig.py:
    give the bridge a default latency too
src/mem/cache/cache_builder.cc:
src/python/m5/objects/BaseCache.py:
    remove hit_latency and make latency do the right thing
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
    add caches to tsunami-simple configs

--HG--
extra : convert_revision : 37bef7c652e97c8cdb91f471fba62978f89019f1
 2007-05-10 18:24:48 -04:00
Gabe Black
6d199f0b25 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
 2007-05-09 22:04:58 -07:00
Ali Saidi
e08a5c6052 Merge zizzer:/bk/newmem 
into  pb15.local:/Users/ali/work/m5.newmem.zeep

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
    the new version of this is what we want

--HG--
extra : convert_revision : 204df6f8181df81e423def4695cd81544c485c47
 2007-05-10 00:36:47 -04:00
Ali Saidi
4a37c48e8e add/update parameters for bus bridge 
--HG--
extra : convert_revision : 063f757fbfa2c613328ffa70e556f8926623fa91
 2007-05-10 00:08:22 -04:00
Gabe Black
4ad1b58fdd Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
 2007-05-09 20:50:46 -07:00
Ali Saidi
69ea50c163 couple of updates in the intel nic 
--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
 2007-05-09 22:39:43 -04:00
Ali Saidi
9dfbea68a2 update for new reschedule semantics 
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
 2007-05-09 22:34:54 -04:00
Ali Saidi
ff55888575 undo my previous bus change, it can make the bus deadlock.. so it still constantly reschedules itself 
--HG--
extra : convert_revision : b5ef1aa0a6a2e32bd775d2dbcad9cd9505ad9b78
 2007-05-09 22:23:01 -04:00
Ali Saidi
3c608bf765 add a backoff algorithm when nacks are received by devices 
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge

src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
    add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
    add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
    add seperate response buffers and request queue sizes
    add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
    assert on the
src/mem/tport.cc:
    add a friendly assert to make sure the packet was inserted into the list

--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
 2007-05-09 18:20:24 -04:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault 
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
 2007-05-09 15:37:46 -04:00
Ali Saidi
939cbd8201 Merge zizzer:/bk/newmem 
into  udhcp-macvpn-703.public.engin.umich.edu:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : e977c5b194954774b6503484797f1c1e0eb4e425
 2007-05-09 12:02:36 -04:00
Ali Saidi
ee70d8cfc4 bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer. 
src/base/bitfield.hh:
    bit_val was being used directly in the statement in
    return. If type B had fewer bits than last, bit_val << last would get
    the wrong answer.

--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64
 2007-05-09 12:01:31 -04:00
Gabe Black
c2ac0fd89b Fix insertBits so it doesn't shift things into oblivion 
--HG--
extra : convert_revision : 8833b60e3fc94c917fbdb7a99f3d90155907b44e
 2007-05-08 17:19:33 +00:00
Gabe Black
dc1c9e0300 Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed. 
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
 2007-05-08 13:02:19 +00:00
Ali Saidi
a38c79ec22 the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space 
fix the timing cpu to handle receiving a nacked packet

src/cpu/simple/timing.cc:
    make the timing cpu handle receiving a nacked packet
src/mem/bridge.cc:
src/mem/bridge.hh:
    the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space

--HG--
extra : convert_revision : 5e12d0cf6ce985a5f72bcb7ce26c83a76c34c50a
 2007-05-07 18:58:38 -04:00
Ali Saidi
0dfc29a023 fix partial writes with a functional memory hack 
figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached

configs/common/FSConfig.py:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/python/m5/objects/Bridge.py:
    fix partial writes with a functional memory hack
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
    figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached
src/mem/packet.cc:
    fix WriteInvalidateResp to not be a request that needs a response since it isn't
src/mem/port.hh:
    by default return 0 for deviceBlockSize instead of panicing. This makes finding the block size the bus should use easier

--HG--
extra : convert_revision : 3fcfe95f9f392ef76f324ee8bd1d7f6de95c1a64
 2007-05-07 14:42:03 -04:00
Ali Saidi
3f2b039c98 change the way dprintf works so the cache accesses required to fulfill the dprintf aren't show in between the Cycle: name: 
printing and the actual formatted string being printed

--HG--
extra : convert_revision : 8876ba938ba971f854bab490c9af10db039a2e83
 2007-05-01 18:14:16 -04:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted 
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
 2007-05-01 18:12:58 -04:00
Ali Saidi
e0f8e57a7f Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 7e4b82f5949c0807d93fff80c44a8828968d1248
 2007-05-01 12:33:03 -04:00
Ali Saidi
ccdf60f7b2 initialize lastTxInt to 0 
--HG--
extra : convert_revision : 4c5e9c2145b12fdeba91f3fdd8963c35abe326c2
 2007-05-01 12:32:30 -04:00
Ali Saidi
8d56145d7b always skip the debugprintf function (DebugPrintf traceflag shouldn't matter). Otherwise, when you turn on debugprintf alters the execution 
--HG--
extra : convert_revision : 1c9a665e3b7234cacf06c31d2e7886244a9e82bc
 2007-04-30 22:49:21 -04:00
Ali Saidi
7baf29c9d0 fix igbe bug 
--HG--
extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
 2007-04-30 13:18:44 -04:00
Ali Saidi
58b9047194 fix console printing bug 
--HG--
extra : convert_revision : 5481b72b22e7a2cf3367d777309bc30201f3b1fc
 2007-04-30 13:13:03 -04:00
Ali Saidi
ae4208f3a3 add the ability for the ethernet device to check if the link is busy 
--HG--
extra : convert_revision : 0dc0c4c4546869261f4508ad22a6a85aecf3c334
 2007-04-30 13:09:13 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized, 
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
 2007-04-27 13:59:17 -07:00
Kevin Lim
092951e2b1 Remove extra delete that was causing segfault. 
--HG--
extra : convert_revision : 8a27ed80308c95988f3bc43d670dc0ac9e946d39
 2007-04-26 00:07:42 -04:00
Kevin Lim
15cc194d71 Remove unnecessary check. 
--HG--
extra : convert_revision : 8cc2943ebc41e4d430789ee7923dd0dc878be06b
 2007-04-26 00:02:37 -04:00
Ron Dreslinski
3eb4ba3abb Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 11df5fb2a8f1fa020d042e75b22a7f2f2bcbd9ab
 2007-04-23 14:38:04 -04:00
Gabe Black
cca881a531 Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
 2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
 2007-04-23 11:34:39 -04:00
Kevin Lim
dbc1edd23d Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 05f738ab6cf1e8bd2940f4ce20602f1e8ad1af48
 2007-04-22 15:31:33 -04:00
Kevin Lim
8c7a6e1654 Use proper cycles for IPC and CPI equations. 
src/cpu/o3/cpu.cc:
    Use proper cycles for these equations.

--HG--
extra : convert_revision : cd49410eed978c789d788e80462abed6cb89fbae
 2007-04-22 15:11:54 -04:00
Gabe Black
acc62514b1 Make the floating point zero register special handling only apply for ALPHA. 
--HG--
extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
 2007-04-22 17:50:43 +00:00
Gabe Black
cea5435760 Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used. 
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
 2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f fixes for solaris compile 
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
 2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
 2007-04-21 17:50:47 -04:00
Gabe Black
f3a0abbecc Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 26118d0dce464405148d2693fee4561fa0ce10ff
 2007-04-18 21:27:37 -04:00
Nathan Binkert
6f4c1aa475 Move the turbolaser python simobject stuff into the 
encumbered directory

--HG--
extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854
 2007-04-18 11:15:52 -07:00
Nathan Binkert
d92fff858b fix SIGUSR1 and SIGUSR2 by clearing the variables after 
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
 2007-04-18 08:04:46 -07:00
Gabe Black
dde2b11ae6 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : d18cce378fe3390c6e708945b9ea7c76c2d20a81
 2007-04-17 08:56:59 -04:00
Ron Dreslinski
3b95161da8 Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 8630b3771678b68d5cd12a61f7a4de2e3443a8d7
 2007-04-16 11:32:09 -04:00
Ron Dreslinski
2952c34096 Fixes for splash, may conflict with Korey's SMT work and doesn't support 03cpu yet. 
src/cpu/simple/base.cc:
    Cpu's should start as unallocated, not suspended
src/cpu/simple_thread.cc:
    Wait for a thread to be assigned to activate the cpu
src/kern/tru64/tru64.hh:
    When looking for a open cpu to assign threads, look for an unallocated one, not a suspended one.

--HG--
extra : convert_revision : 5e3ad2e96b4a715ed38293ceaccff5b9f4ea7985
 2007-04-16 11:31:54 -04:00
Gabe Black
8248af53b1 Make an inner loop which pulls microops out of macroops. These aren't checked for control flow because we can pull out microops until we run out of buffer. This prevents microops from being interpretted as branches because the pc doesn't become npc. 
--HG--
extra : convert_revision : 9fff7c6c32900692bbc567ecb75701c9c73da259
 2007-04-15 21:52:38 +00:00
Gabe Black
308b2f0ce3 Add extra constructors to Alpha and MIPS 
--HG--
extra : convert_revision : 26ea87bfe9e5c27134eb9a15bf9e4629afae6c69
 2007-04-15 21:51:05 +00:00
Gabe Black
c3081d9c1c Add support for microcode and pull out the special branch delay slot handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect. 
--HG--
extra : convert_revision : 8b9c603616bcad254417a7a3fa3edfb4c8728719
 2007-04-14 17:13:18 +00:00
Gabe Black
5a3dcc172a Make register indexes larger so they can actually hold all the legal values. Oops! 
--HG--
extra : convert_revision : 7689b2e1f7468e4acb8be0f242f74002c79e7960
 2007-04-14 17:08:24 +00:00
Gabe Black
3140dd88bc Make the fsr a serializing register. Other control registers probably need this as well. 
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
 2007-04-14 17:07:24 +00:00
Gabe Black
c7f1cf1d58 Remove most of the special handling for delay slots since they have to be squashed anyway on a mispredict. This is because the NNPC value they saw when executing was incorrect. 
--HG--
extra : convert_revision : b42c4eb28b4fbba66c65cbd0a5033bf886c1532d
 2007-04-13 13:59:31 +00:00
Nathan Binkert
a575fbd4aa Completely re-work how the scons framework incorporates swig 
and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python.  This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++).  Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.

--HG--
extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
 2007-04-12 21:20:04 -07:00
Nathan Binkert
eefbda7f7c Don't allow Source to accept multiple arguments, lists, 
or automatically do Split().  It isn't used anywhere, and
isn't very consistent with the python features that are
about to be added.  Do accept SCons.Node.FS.File arguments
though.

--HG--
extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
 2007-04-12 09:07:59 -07:00
Nathan Binkert
e04208f046 Fix NextEthernetAddr. 
unproxy() needs to return a new object otherwise all
instances will use the same value.  This fix is more
or less unique to NextEthernetAddr because its use of
the proxy stuff is a bit different than everything else.

--HG--
extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
 2007-04-12 08:37:55 -07:00
Nathan Binkert
fa2a93a236 Add a scons hack to force symlinks to the swig .i files 
to be created

--HG--
extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
 2007-04-12 08:35:19 -07:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
 2007-04-11 15:30:09 +00:00
Gabe Black
c382bdf93d Use a computed mask to mask out the fetch address and not a hard coded one. 
--HG--
extra : convert_revision : c22907bed4b83f0dff51d2283dafe4f76fa9e94a
 2007-04-11 14:16:54 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu. 
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
 2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message. 
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
 2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
 2007-04-11 12:25:00 +00:00
Gabe Black
fcc35a67e0 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
 2007-04-10 17:27:33 +00:00
Gabe Black
74122c04cf Even if you don't want to fetch more bytes, make sure you handle a fault. 
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
 2007-04-10 17:27:12 +00:00
Gabe Black
798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions. 
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
 2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit. 
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
 2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. 
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
 2007-04-10 17:13:26 +00:00
Gabe Black
5476247623 Fixed a compile error. 
--HG--
extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
 2007-04-10 01:52:38 +00:00
Gabe Black
d54b8b73ed Comment out the remote gdb object for SE mode. 
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
 2007-04-09 18:30:50 +00:00
Kevin Lim
64b4572c3e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
 2007-04-09 14:30:49 -04:00
Kevin Lim
0cc343d41d Fix bug when blocking due to no free registers. 
--HG--
extra : convert_revision : a1a218d3294515184689041487057495223360b7
 2007-04-09 14:29:59 -04:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
 2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here. 
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
 2007-04-09 01:08:05 +00:00
Gabe Black
c7bb106886 Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts. 
--HG--
extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
 2007-04-08 23:31:11 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
 2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
 2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa 
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
 2007-04-06 16:55:56 +00:00
Gabe Black
a3ed19f82a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
 2007-04-06 16:39:47 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. 
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
 2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function 
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
 2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code. 
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
 2007-04-06 15:15:36 +00:00
Gabe Black
3c9768e644 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
 2007-04-06 14:37:46 +00:00
Gabe Black
077183f7ec Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : efdbf9787383dc1df544b7276f8120285e69bf69
 2007-04-05 11:35:31 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution. 
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
 2007-04-04 23:19:32 +00:00
Gabe Black
a664017c2a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 81269f094834f43b4e908321bfce2e031b39d2a4
 2007-04-04 20:50:49 +00:00
Kevin Lim
3d2a434e42 Updates for other ISA cpu_builders. 
--HG--
extra : convert_revision : b02736c627bb9dcf87463a9133e04369b9f8fae2
 2007-04-04 16:50:48 -04:00
Kevin Lim
b247e02f6e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 7181d8c2ee673322372484cf288a94ebd91b5265
 2007-04-04 15:39:13 -04:00
Kevin Lim
6ff6621f20 Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 
src/cpu/o3/alpha/cpu_impl.hh:
    Pass ISA-specific O3 CPU to FullO3CPU as a constructor parameter instead of using setCPU functions.

--HG--
extra : convert_revision : 74f4b1f5fb6f95a56081f367cce7ff44acb5688a
 2007-04-04 15:38:59 -04:00
Ali Saidi
d9ab45d066 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : be37463ea3ca38ef02ae0b82da0752f240a530d0
 2007-04-04 13:57:23 -04:00
Ali Saidi
d0ea8ff088 The MemoryObject tha owns a port should delete it if it so chooses when deletePortRefs() is called on it with that port as a parameter. 
In this way a MemoryObject can keep a functional port around and give it to anyone who wants to do functional accesses rather
than creating a new one each time.

src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/cache_impl.hh:
    only keep around one func port we give to anyone who wants it. Otherwise we can run out of port ids reasonably quickly if
    a lot of functional accesses are happening (e.g. remote debugging, dprintk, etc)

--HG--
extra : convert_revision : 6a9e3e96f51cedaab6de1b36cf317203899a3716
 2007-04-04 13:56:38 -04:00
Gabe Black
4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: 
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
 2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case 
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
 2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7 Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function. 
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
 2007-04-04 14:27:00 +00:00
Gabe Black
6010c6ded4 Added all the different variations of the register names. 
--HG--
extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
 2007-04-04 14:25:36 +00:00
Kevin Lim
9e1f3bc11a Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 4a8cbb65b19636c31b5c6fd5f24c90f8f2148ed1
 2007-04-04 00:14:44 -04:00
Gabe Black
10fe8b05db Made the "data" field of store queue entries into a character array. It's sized to match an IntReg which was what it used to be, but we might want to make it something architecture independent. All data is now endian converted before entering the store queue entries which simplifies store to load forwarding in "trans endian" simulations, and makes twin memory ops work. 
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
    fixed twin memory operations.

--HG--
extra : convert_revision : 8fb97f98e285cd22413e06e146fa82392ac2a590
 2007-04-03 22:53:26 +00:00
Kevin Lim
98c8cd0b36 Fix a memory leak. Hopefully this fixes the longer running benchmarks. 
--HG--
extra : convert_revision : 89eff82642ff181a9b95c77c4d2bf620ca837113
 2007-04-03 14:25:24 -04:00
Gabe Black
93d4c624c5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 7be8ebe55a7b11552d78701520f93aa86db1e501
 2007-04-03 15:01:36 +00:00
Gabe Black
61c56ffeaf A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented. 
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
 2007-04-03 15:01:09 +00:00
Gabe Black
0ce6936e7d Zero out ModRM if the byte isn't there, and fix some displacement size stuff. 
--HG--
extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
 2007-04-03 14:56:24 +00:00
Kevin Lim
ec09e5ad6f Remove/comment out DPRINTFs that were causing a segfault. 
The removed ones were unnecessary.  The commented out ones could be useful in the future, should this problem get fixed.  See flyspray task #243.

src/cpu/o3/commit_impl.hh:
src/cpu/o3/decode_impl.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue_impl.hh:
src/cpu/o3/lsq_impl.hh:
src/cpu/o3/lsq_unit_impl.hh:
src/cpu/o3/rename_impl.hh:
src/cpu/o3/rob_impl.hh:
    Remove/comment out DPRINTFs that were causing a segfault.

--HG--
extra : convert_revision : b5aeda1c6300dfde5e0a3e9b8c4c5f6fa00b9862
 2007-04-02 13:55:45 -04:00
Kevin Lim
24cc5227af Fix up SPARC's CPU builder to match changes to Alpha's CPU builder. 
--HG--
extra : convert_revision : ec2a739f1da07f0922c772e6998017995115ce80
 2007-04-02 13:28:17 -04:00
Ali Saidi
c46e946c94 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 2f7f50f4ad31f741c0c67db96e49d30ca078fc94
 2007-03-29 22:01:34 -04:00
Ali Saidi
528694817f make serialization at least seem to work 
--HG--
extra : convert_revision : cbfdb64f9a204670b8dd0294c74a17044b9f330c
 2007-03-29 22:00:01 -04:00
Ali Saidi
8ca218cab5 get rid of CWP bounds warning... 
--HG--
extra : convert_revision : 74df09341c091c2d6ca9b46c6a3521f22b48acf4
 2007-03-29 15:57:11 -04:00
Gabe Black
7fcc9d2106 Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. 
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
 2007-03-29 17:57:19 +00:00
Gabe Black
e67a207ad3 Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself. 
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
 2007-03-29 17:57:18 +00:00
Kevin Lim
5c3f724174 Override addPrivateSplitL1Caches function in order to automatically set the tgts_per_mshr of the caches to 20. This is needed otherwise things will potentially lock up when using the O3CPU because the caches can run out of targets, and then not respond. 
Remove this hack once the caches eventually get fixed.

--HG--
extra : convert_revision : 8c61ac1b6182f57ebbe3bcfeddb5a4f4334d7bc0
 2007-03-29 12:25:47 -04:00
Kevin Lim
80af6530f6 Update code so that the O3 CPU can handle not initially having anything hooked up to its ports. This fixes the segfault Ali recently found when using sampling. 
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
    Update code so that the O3 CPU can handle not initially having anything hooked up to its ports.

--HG--
extra : convert_revision : 04bcef44e754735d821509ebd69b0ef9c8ef8e2c
 2007-03-29 12:02:57 -04:00
Gabe Black
14a7cda195 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ewok.(none):/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 849b63ae1300e240082da19dfeb283cdeeb80aef
 2007-03-29 00:51:34 -07:00
Gabe Black
77ce05f478 Fidget with the syntax of the MultiOp format in anticipation of making it actually work. 
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
 2007-03-29 00:50:54 -07:00
Gabe Black
fd77212b72 Add code to generate register and immediate based integer op microop classes. 
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
 2007-03-29 00:49:53 -07:00
Gabe Black
0d5f6167ff Allow "let" blocks to add code to the output files. 
--HG--
extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
 2007-03-29 00:47:46 -07:00
Ron Dreslinski
8a674bed5c Call compare and Swap on the target, not the response. 
--HG--
extra : convert_revision : 522805fe2c9abaa5ba0d9262ad98f841d90f6452
 2007-03-28 14:38:11 -05:00
Ali Saidi
e95bc9d8f9 some more fixes... non-tso stuff seems to work 
--HG--
extra : convert_revision : da604d20443376d04826397d0aaff0bdd744053b
 2007-03-27 20:44:21 -04:00
Ron Dreslinski
55614caecc Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 45b64b1564f0e4958d8441455f87b2b185324d55
 2007-03-27 17:06:07 -05:00
Ron Dreslinski
6b8cd9d06d First Pass At Cmp/Swap in caches 
--HG--
extra : convert_revision : 211bfb7c6a59e9e120dae1600d4754baaf231332
 2007-03-27 17:05:25 -05:00
Nathan Binkert
d8ca2d3b16 Instead of creating a new python process to run traceflags.py, 
just directly exec the file and generate the flags

--HG--
extra : convert_revision : d648ca7348404ded5337db327adafccbd2ae40c8
 2007-03-26 21:07:32 -07:00
Ali Saidi
01ac962a06 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 4b60e96e8dc9c69842514e29925ec1931597ddb4
 2007-03-26 18:40:30 -04:00
Ali Saidi
e8dc1723ee first bit of life from the intel gigabit model 
--HG--
extra : convert_revision : d8944a53f6b585df21651c4e624518d5c49a7837
 2007-03-26 18:40:18 -04:00
Kevin Lim
5c044cf1f6 Update for new trace data behavior. 
--HG--
extra : convert_revision : c3df20c5187614febc4cc9f4d4c68bfecfba1ea7
 2007-03-24 23:47:14 -05:00
Kevin Lim
4bad33ce9d Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
 2007-03-24 14:00:16 -04:00
Gabe Black
e7bbd85ae6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
 2007-03-23 21:47:03 -04:00
Kevin Lim
047f77102b Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

src/cpu/base_dyn_inst.hh:
    Hand merge.  Line is no longer needed because it's handled in the ISA.

--HG--
extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
 2007-03-23 13:20:19 -04:00
Kevin Lim
2330adfa28 Make hardware loads/stores serializing; they need to avoid certain out-of-order interactions in the 21264. 
--HG--
extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
 2007-03-23 13:14:05 -04:00
Kevin Lim
941d3168d0 Updates for commit. 
1. Move interrupt handling to a separate function to clean up main commit() function a bit.  Also gate the function call off properly based on whether or not there are outstanding interrupts, and the system is not in PAL mode.
2. Better handling of updating instruction's status bits.  Instructions are not marked "atCommit" until other stages view it (pushed off to IEW/IQ), and they have been properly handled (faults).
3. Don't consider the ROB "empty" for the purpose of other stages until the ROB is empty, all stores have written back, and there was no store commits this cycle.  The last is necessary in case a store committed, in which case it would look like all stores have written back but in actuality have not.

src/cpu/o3/commit.hh:
    Slightly modify how interrupts are handled.  Also include some extra bools to keep track of state properly.
src/cpu/o3/commit_impl.hh:
    Slightly modify how interrupts are handled.  Also include some extra bools to keep track of state.

    General correctness updates, most specifically for when commit broadcasts to other stages that the ROB is empty.

--HG--
extra : convert_revision : 682ec6ccf4ee6ed0c8a030ceaba1c90a3619d102
 2007-03-23 13:13:10 -04:00
Kevin Lim
78de00091b 3 memory system fixes: 
1. Update packet's flags properly when a snoop happens
2. Don't allow accesses to read a block's data if the block has outstanding MSHRs.  This avoids a RAW hazard in MP systems that the memory system was not detecting properly earlier (a write required a block to upgrade, and while the upgrade was outstanding, a read came along and read old data).
3. Update MSHR's request upon a response being handled.  If the MSHR has more targets than it can respond to in one cycle, then its request must be properly updated to the new head of the targets list.

src/mem/bus.cc:
    Update packet's flags properly upon snoop.
src/mem/cache/cache_impl.hh:
    Be sure to not allow accesses to a block with outstanding MSHRs.
src/mem/cache/miss/miss_queue.cc:
    Update MSHR's request upon a response being handled.

--HG--
extra : convert_revision : 76a9abc610ca3f1904f075ad21637148a41982d6
 2007-03-23 13:09:37 -04:00
Kevin Lim
e21878c3f2 Handle status bits a little better, as well as non-speculative instructions. 
src/cpu/o3/iew_impl.hh:
    Allow for slightly more flexible handling of non-speculative instructions.  They can be other classes now, such as loads or stores.

    Also be sure to clear the state associated with squashes that are not used.  i.e. if a squash due to a memory ordering violation happens on the same cycle as an older branch squashing, clear the state associated with the memory ordering violation.

    Lastly don't consider uncached loads to officially be "at commit" until IEW receives the signal back from commit about the load.
src/cpu/o3/inst_queue_impl.hh:
    Don't consider non-speculative instructions to be "at commit" until the IQ has received a signal from commit about the instruction.  This prevents non-speculative instructions from being issued too early.
src/cpu/o3/mem_dep_unit_impl.hh:
    Clear instruction's ability to issue if it's replayed.

--HG--
extra : convert_revision : d69dae878a30821222885485f4dee87170d56eb3
 2007-03-23 11:40:53 -04:00
Kevin Lim
31e78b0b92 Two fixes: 
1. Requests are handled more properly now.  They assume the memory system takes control of the request upon sending out an access.
2. load-load ordering is maintained.

src/cpu/base_dyn_inst.hh:
    Update how requests are handled.  The BaseDynInst should not be able to hold a pointer to the request because the request becomes owned by the memory system once it is sent out.

    Also include some functions to allow certain status bits to be cleared.
src/cpu/base_dyn_inst_impl.hh:
    Update how requests are handled.  The BaseDynInst should not be able to hold a pointer to the request because the request becomes owned by the memory system once it is sent out.
src/cpu/o3/fetch_impl.hh:
    General correctness fixes.  retryPkt is not necessarily always set, so handle it properly.  Also consider the cache unblocked only when recvRetry is called.
src/cpu/o3/lsq_unit.hh:
    Handle requests a little more correctly.  Now that the requests aren't pointed to by the DynInst, be sure to delete the request if it's not being used by the memory system.

    Also be sure to not store-load forward from an uncacheable store.
src/cpu/o3/lsq_unit_impl.hh:
    Check to make sure load-load ordering was maintained.

    Also handle requests a little more correctly.

--HG--
extra : convert_revision : e86bead2886d02443cf77bf7a7a1492845e1690f
 2007-03-23 11:33:08 -04:00
Kevin Lim
abb07d9da3 Set progress_interval in terms of CPU cycles. 
--HG--
extra : convert_revision : 76b0918276cb613eb314ab1479b5ffdb31f31dee
 2007-03-23 11:26:30 -04:00
Kevin Lim
55a45d3644 A couple of minor fixes. 
1. Set CPU ID in all modes for the O3 CPU.
2. Use nextCycle() function to prevent phase drift in O3 CPU.
3. Remove assertion in rename map that is no longer true.

src/cpu/o3/alpha/cpu_builder.cc:
    Allow for CPU id in all modes, not just full system.  Also include a parameter that was left out by accident.
src/cpu/o3/alpha/cpu_impl.hh:
    Set the CPU ID properly.
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
    Use nextCycle() function so that the CPU does not get out of phase when starting up from quiesces.
src/cpu/o3/rename_map.cc:
    Remove assertion that is no longer true.
tests/configs/o3-timing.py:
    Set CPU's id to 0.

--HG--
extra : convert_revision : 2b69c19adfce2adcc2d1939e89d702bd6674d5d5
 2007-03-23 11:22:43 -04:00
Ali Saidi
2c47413a7a Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : fd590d464359d8ae859998a9f446b960781a5e33
 2007-03-22 18:39:51 -04:00
Ali Saidi
12b7ebcbca finish up the coding of the Intel Gb NIC... Many Many bugs to squash 
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
    finish coding the Intel Gb NIC device
src/dev/io_device.hh:
    we really don't want to be able to pass a null buffer to dma read, at least not the way we have things setup now... it won't work at all

--HG--
extra : convert_revision : 6739497232317ec407cfa7a96de4575a9a6cfc46
 2007-03-22 18:39:41 -04:00
Gabe Black
e3d3ab4513 Add structure based bitfield syntax to the isa_parser. This is primarily useful for x86. 
--HG--
extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
 2007-03-22 04:10:57 +00:00
Gabe Black
39182808bc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
 2007-03-22 04:10:56 +00:00
Gabe Black
276f6d794d Add a junk operand. With no operands, the parser breaks. 
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
 2007-03-21 21:09:24 +00:00
Gabe Black
bbffaa8ee0 Start implementing groups of instructions which do the same thing on different sets of inputs. 
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
 2007-03-21 21:07:43 +00:00
Gabe Black
1707aa750f put the int register count in intregs.hh 
--HG--
extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
 2007-03-21 21:04:54 +00:00
Gabe Black
0a80d06dea Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are. 
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
 2007-03-21 19:19:53 +00:00
Gabe Black
3efec59fc5 Missed a const 
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
 2007-03-21 19:15:40 +00:00
Gabe Black
63e2d3dcbf Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
 2007-03-21 01:18:55 -04:00
Gabe Black
2b4c02b829 The m5 side of statetrace. This is fairly ugly, but I don't want to lose it. 
--HG--
extra : convert_revision : 171b41418567c1f41f43363a46fa9aeaa58ae606
 2007-03-21 01:18:47 -04:00
Gabe Black
475d36ee93 Ignore "time" and "times" syscalls. 
--HG--
extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
 2007-03-20 23:53:52 -04:00
Gabe Black
076fd9a707 Fixed up some types and const placement, and added signed bitfields that sign extend themselves. 
--HG--
extra : convert_revision : 84bda8fc14f9a6f7dc7982c9aeb15bf688457706
 2007-03-20 11:40:30 +00:00
Gabe Black
e7b015cee1 Added syntax for structure oriented extMachInsts. 
--HG--
extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
 2007-03-20 06:08:52 +00:00
Gabe Black
4df9411e59 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : a6ae6ce183aaa4d1a9434f9ddd64cc30878d2147
 2007-03-19 17:13:23 +00:00
Gabe Black
be3550dfe0 Ditched read or write only subbitfields for now since they were proving difficult to implement. Allow component Bitfields to be instantiated without templates, clean up the implementation a little, and adjust the comments to match. 
--HG--
extra : convert_revision : b9b8aea285a95eeabbb4c0233c1bce49b8c773b8
 2007-03-19 17:12:50 +00:00
Gabe Black
277ded3de7 For the _BitfieldRO and _BitfieldWO classes, make sure the undesired operator is redefined as private. 
--HG--
extra : convert_revision : b18d8e49547c2712ab255d048850c5231313b80a
 2007-03-19 14:28:19 +00:00
Gabe Black
898652fe04 Formatting fixes. 
--HG--
extra : convert_revision : 276d0667daa4626288b56af3b4b17a3f9052e81a
 2007-03-19 14:22:28 +00:00
Gabe Black
43dea39dd4 Lots and lots of comments. 
--HG--
extra : convert_revision : 0de510464e2e002775ccd79e2922ccb0055845e5
 2007-03-19 14:20:27 +00:00
Gabe Black
ad9ab66175 Reworked the BitUnion stuff a bit. There is moderately better isolation of the backend parts, although there are still macros. 
--HG--
extra : convert_revision : e9692c5e697c96061ef70cf78ef532c99dbbd672
 2007-03-19 13:28:36 +00:00
Gabe Black
7c0825ccf9 Compile fixes for SPARC_FS. 
src/arch/alpha/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Put in a missing include
src/cpu/exetrace.cc:
    Convert the legion lockstep stuff from makeExtMI to the predecoder object.

--HG--
extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
 2007-03-18 23:09:51 -04:00
Gabe Black
a1f92af0fb The syntax used for twin stores was confusing the parser so it's now broken down farther. 
--HG--
extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
 2007-03-17 21:23:03 -04:00
Gabe Black
594c415a0d Created BitUnion type which lets you define nested bitfields for an integer in a portable way. 
--HG--
extra : convert_revision : 56a9d06b6b7274a493dae4b290c5f9b42e59f20d
 2007-03-17 23:33:00 +00:00
Gabe Black
b54fa0edda Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3246c58850586b880641638bedb1f0025d0ef491
 2007-03-16 10:57:52 +00:00
Gabe Black
725ee42ba7 Fix ALPHA_FS compile. The MachInst -> StaticInstPtr constructor is no longer a conversion constructor because it caused ambiguous conversions when setting the pointer to NULL. 
--HG--
extra : convert_revision : ce9ecfc03a47642d105f2378208bbe923d6b765b
 2007-03-16 10:57:34 +00:00
Gabe Black
3ccaee976a Make the SPARC branch instructions use ExtMachInsts in their constructors. This isn't necessary since they don't use the extended fields, but it's more consistent and more correct. 
--HG--
extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
 2007-03-16 10:55:50 +00:00
Ali Saidi
50475e0e2a Merge zizzer:/bk/newmem 
into  pb15.local:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : 0aa2fadf8978ae30ebe4fde03c525e6b9115117a
 2007-03-15 23:21:52 -04:00
Ali Saidi
a18baae026 fix a bug gabe found 
--HG--
extra : convert_revision : 12e8f09f6c59a16b2d2eb78bdd1345fc38c4de40
 2007-03-15 23:21:01 -04:00
Gabe Black
9ad3f1e479 Refactor things a little. 
--HG--
extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
 2007-03-15 19:16:39 +00:00
Gabe Black
f4eee4fb81 File with the predecoder in it. 
src/arch/x86/predecoder.cc:
    File for the x86 predecoder process function.

--HG--
extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
 2007-03-15 19:16:38 +00:00
Gabe Black
ae9bed4f8f Split the x86 "process" predecoder method into it's own file. 
--HG--
extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
 2007-03-15 19:16:37 +00:00
Gabe Black
05c71c6194 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : cf2cc07f18b877f980e2d1fc83916f7849d9c7d9
 2007-03-15 19:16:36 +00:00
Ali Saidi
c6e1dc61c2 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 6a75fa02391c4c65063c5412a568705bb1dd892b
 2007-03-15 15:16:35 -04:00
Ali Saidi
3a5a20769b add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think 
the device is there, and in good working order.

src/dev/SConscript:
    add intel gbe to the dev SCons file
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
    use new manner of registers and implement all device registers that are touched through boot and ifup

--HG--
extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
 2007-03-15 15:16:23 -04:00
Gabe Black
6cdd434f7f Changed warns to DPRINTFs and multiply by 8 where needed. 
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
 2007-03-15 16:13:40 +00:00
Gabe Black
075df1469f Added immediate value support, and fixed alot of bugs. This won't support 3 byte opcodes. 
--HG--
extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
 2007-03-15 15:29:39 +00:00
Gabe Black
4379e54b52 Compile fix 
--HG--
extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
 2007-03-15 03:17:00 +00:00
Gabe Black
32368a2bd6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/arch/mips/utility.hh:
src/arch/x86/SConscript:
    Hand merge

--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
 2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86. 
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
 2007-03-15 02:47:42 +00:00
Ali Saidi
c6188a2264 fix segfault when peer owner attempts to use functional port 
--HG--
extra : convert_revision : 3702b4bd038a59bff823c3b428fdfbaabc9715df
 2007-03-13 17:34:52 -04:00
Gabe Black
ff90b8c1aa Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
 2007-03-13 15:03:34 -04:00
Gabe Black
ce18d900a1 Replaced makeExtMI with predecode. 
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.

--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
 2007-03-13 16:13:21 +00:00
Ali Saidi
a068d6db0f fix interrupting during a quisce on sparc 
src/arch/sparc/ua2005.cc:
    fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
    check if were suspended and interrupt at the guess time
src/base/traceflags.py:
    add trace flag for Iob
src/cpu/simple/base.cc:
    Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
    add some Dprintfs

--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
 2007-03-13 00:05:52 -04:00
Ali Saidi
247ee8ef74 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : db68adffdf4ae12637eba7c03d53aca997b30291
 2007-03-12 20:17:44 -04:00
Ali Saidi
74db8adfbc call ccprintf() with the appropriate argument types so we don't recuse forever 
--HG--
extra : convert_revision : 5366be897d1193cf9e93b1fcd0689d19783f73a8
 2007-03-12 20:16:13 -04:00
Ron Dreslinski
c6e85efc50 Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 7d7380a6565cff32470bddadb0158fad897a5cf5
 2007-03-12 16:25:59 -05:00
Ali Saidi
8d38dd3231 remove the extern C around gdb helper functions. It's need needed for any new version of gdb to work and it causes at least mine to segfault 
--HG--
extra : convert_revision : 5e4c2ec753372fd0569734d3ddb0c8690409ca16
 2007-03-12 17:23:08 -04:00
Gabe Black
1f3c3aa234 Fix mulscc. 
--HG--
extra : convert_revision : 405f10f14f2f6666a7bef01bfb0cf90ff14cef24
 2007-03-12 17:07:10 -04:00
Ron Dreslinski
2a02087eb5 Clean up more memory leaks 
--HG--
extra : convert_revision : 32d1b23200752fe5fcdcbafb586f50bbe6db3bf3
 2007-03-12 15:59:54 -05:00
Ron Dreslinski
ca8e95b480 Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 8651b2878853c5a6cb15f60ab92cf39d3bc30a07
 2007-03-12 13:42:49 -05:00
Ron Dreslinski
6415c47a5b Fix some of the memory leaks related to writebacks 
src/cpu/memtest/memtest.cc:
    Add the [] to a delete to make it work correctly
src/mem/cache/cache_impl.hh:
    Fix one of the memory leaks

--HG--
extra : convert_revision : 64c7465c68a084efe38a62419205518b24d852a7
 2007-03-12 13:15:32 -05:00
Ali Saidi
885b4f26bb Get rid of those pesky valgrind warnings, Conditional jump or move depends on uninitialised value(s), in the stats package 
--HG--
extra : convert_revision : d3a508fc98df4eb8160a211a306be6ab241a4ce8
 2007-03-12 14:13:52 -04:00
Ali Saidi
1356fb953d Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : c6fbe09348b606b94bbb35f911dea94353f076f9
 2007-03-12 13:56:30 -04:00
Ali Saidi
9ad24e2248 move hver code to ua2005.cc 
src/arch/sparc/miscregfile.cc:
    this code should be in readFSreg
src/arch/sparc/ua2005.cc:
    move code froh miscregfile to ua2005.cc

--HG--
extra : convert_revision : fa450b04ad73ab6f6e25d66fa0368054263f09f9
 2007-03-12 13:56:09 -04:00
Gabe Black
b3bdce81fd Add the rename syscall. 
--HG--
extra : convert_revision : 67e92b166599bd20b7ce90d073f2fd7502f810ec
 2007-03-12 01:54:15 -04:00
Gabe Black
57650a201e Fix the mnemonic and the branch displacement field size of the branch on floating point condition codes with prediction. 
--HG--
extra : convert_revision : 812950e92b7e0f34f370a1472c20f52e3ef214b1
 2007-03-12 01:47:49 -04:00
Gabe Black
6a7e4a5904 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 725999a0a5bde6e065bad87b42e973c5c627c69f
 2007-03-11 18:19:38 -04:00
Gabe Black
26c0426e44 Make sttw and sttwa use the twin memory operations. 
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
 2007-03-11 18:12:33 -04:00
Nathan Binkert
1aef5c06a3 Rework the way SCons recurses into subdirectories, making it 
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
 2007-03-10 23:00:54 -08:00
Gabe Black
52ec0fe3d9 Merge zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test

--HG--
extra : convert_revision : dc02bb6b4e5cc7f0260da80a71b9713f75566a29
 2007-03-10 20:52:55 -05:00
Gabe Black
780489d58b Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 6a8749be327bf2be888850060ae0427f0c943439
 2007-03-10 19:52:53 -05:00
Gabe Black
7e363e14f7 Fix bounds check for the cwp 
--HG--
extra : convert_revision : 097e6b0c80d71417329b2a4cd118046aa5ed777a
 2007-03-10 19:29:31 -05:00
Gabe Black
91e8729c28 Added implementations of the fpop2 instructions. 
--HG--
extra : convert_revision : 1fc88b499334bb4ba44375347d0062843587b6cf
 2007-03-10 19:26:54 -05:00
Gabe Black
bf4dade64a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test

--HG--
extra : convert_revision : df36efd84d938e0e402648b85b3732ed786aaa29
 2007-03-10 17:46:25 -05:00
Gabe Black
25dc5569c3 Compilation fix 
--HG--
extra : convert_revision : 8bfa5e9408d1ead0197aab5078c248876f90ea7a
 2007-03-10 15:21:55 -05:00
Ali Saidi
ef6dfc2983 I thought this code got deleted, but since it hasn't I've moved it to a place where it doesn't access freed memory. 
--HG--
extra : convert_revision : 4d9023f6193004a3e9cbeebd3721bccb50b2aab0
 2007-03-10 15:00:41 -05:00
Gabe Black
df1ea2cf05 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
 2007-03-09 18:32:13 -05:00
Gabe Black
f1e3e1c305 Use the TheISA namespace in case we're coming from a file that doesn't do that for us. This should be contained in the scope of the function and not leak elsewhere. 
--HG--
extra : convert_revision : 0bb0e1457011505a99a871c443bc45f4365e9c7e
 2007-03-09 22:14:25 +00:00
Gabe Black
03ff1c3167 Split the syscall table, SPARC specific syscall implementations, and the 32 bit syscall table into it's own file. Corrected problems with the stat structure. These should be tested on 64 bit x86 and SPARC machines. 
--HG--
extra : convert_revision : 5d9fe19e031b92e111069c6b89c3dbeb29975b8a
 2007-03-09 17:14:24 -05:00
Ali Saidi
dc4d47bad4 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 5804298706ac0f04fbe491326af71ce9ab74425a
 2007-03-09 16:56:52 -05:00
Ali Saidi
58f69391ca implement ipi stufff for SPARC 
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
    add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
    handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
    some constants for the strand status register
src/arch/sparc/ua2005.cc:
    properly implement the strand status register
src/dev/sparc/iob.cc:
    implement ipi generation properly
src/sim/system.cc:
    call into the ISA to start the CPU (or not)

--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
 2007-03-09 16:56:39 -05:00
Kevin Lim
ad44834907 Two fixes: 
1. Make sure connectMemPorts() only gets called when the CPU's peer gets changed.  This is done by making setPeer() virtual, and overriding it in the CPU's ports.  When it gets called on a CPU's port (dcache specifically), it calls the normal setPeer() function, and also connectMemPorts().
2. Consolidate redundant code that handles switching in a CPU.

src/cpu/base.cc:
    Move common code of switching over peers to base CPU.
src/cpu/base.hh:
    Move common code of switching over peers to BaseCPU.
src/cpu/o3/cpu.cc:
    Add in function that updates thread context's ports.
    Also use updated function to takeOverFrom() in BaseCPU.  This gets rid of some repeated code.
src/cpu/o3/cpu.hh:
    Include function to update thread context's memory ports.
src/cpu/o3/lsq.hh:
    Add function to dcache port that will update the memory ports upon getting a new peer.
    Also include a function that will tell the CPU to update those memory ports.
src/cpu/o3/lsq_impl.hh:
    Add function that will update the memory ports upon getting a new peer.
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
    Add function that will update thread context's memory ports upon getting a new peer.
    Also use the new BaseCPU's take over from function.
src/cpu/simple/atomic.hh:
    Add in function (and dcache port) that will allow the dcache to update memory ports when it gets assigned a new peer.
src/cpu/simple/timing.hh:
    Add function that will update thread context's memory ports upon getting a new peer.
src/mem/port.hh:
    Make setPeer virtual so that other classes can override it.

--HG--
extra : convert_revision : 2050f1241dd2e83875d281cfc5ad5c6c8705fdaf
 2007-03-09 10:06:09 -05:00
Ali Saidi
1158da37fb Panic if any CMT registers are accessed 
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
    add CMT ASI registers
src/arch/sparc/tlb.cc:
    Panic if any of the CMT registers are being accessed

--HG--
extra : convert_revision : b9a94281e2074a576ac21d042b756950d509e758
 2007-03-08 21:49:13 -05:00
Ali Saidi
027dfa01e6 stop m5 from leaking like a sieve 
don't create a new physPort/virtPort every time activateContext() is called
add the ability to tell a memory object to delete it's reference to a port and a method to have a port call deletePortRefs()
on the port owner as well as delete it's peer
still need to stop calling connectMemoPorts() every time activateContext() is called or we'll overflow the bus id and panic

src/cpu/thread_state.cc:
    if we hav ea (phys|virt)Port don't create a new on, have it delete it's peer and then reuse it
src/mem/bus.cc:
src/mem/bus.hh:
    add ability to delete a port by usig a hash_map instead of an array to store port ids
    add a function to do deleting
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/mem_object.cc:
src/mem/mem_object.hh:
    adda function to delete port references from a memory object
src/mem/port.cc:
src/mem/port.hh:
    add a removeConn function that tell the owener to delete any references to the port and then deletes its peer

--HG--
extra : convert_revision : 272f0c8f80e1cf1ab1750d8be5a6c9aa110b06a4
 2007-03-08 18:57:15 -05:00
Gabe Black
c40d95e4c4 Fixed an off-by-one error. 
--HG--
extra : convert_revision : 498fef18cf339cabc2c00e4758bc8a0da857daca
 2007-03-08 00:55:16 -05:00
Gabe Black
46051c5f65 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : becba8537b11ee4ef33bbf129bef2ca047403df5
 2007-03-08 00:42:30 -05:00
Gabe Black
5caf721074 Fix up the SPARC initial stack frame to match an actual 32 bit process. 
--HG--
extra : convert_revision : 3995744c3bf955a370b18f6e88de1bfb82f79843
 2007-03-08 00:29:37 -05:00
Ali Saidi
87fb0eb8de I missed a couple of WithEffects, this should do it 
--HG--
extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915
 2007-03-07 21:51:44 -05:00
Ali Saidi
2f7a4e1d1b fix compiling of FS after Gabe's last compile 
--HG--
extra : convert_revision : a93fa5ad61aa2b8c18bf6c513b617f3425ffb220
 2007-03-07 21:50:09 -05:00
Gabe Black
54fc750924 Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures. 
--HG--
extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
 2007-03-07 20:04:46 +00:00
Gabe Black
8edc9d79ce Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem

--HG--
extra : convert_revision : d764fe37c71269a04fcede6cbf30e24262447e89
 2007-03-07 20:04:45 +00:00
Ali Saidi
49527ab553 Merge zizzer:/bk/newmem 
into  zeep.pool:/tmp/newmem

--HG--
extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
 2007-03-07 15:04:44 -05:00
Ali Saidi
689cab36c9 *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
 2007-03-07 15:04:31 -05:00
Gabe Black
c822513269 Add setData functions for the new Twin??_t types. 
--HG--
extra : convert_revision : 6f4e08e76eb4a95eb08b11632f6e33ba458723b6
 2007-03-07 17:46:06 +00:00
Gabe Black
f04e535f26 Add some constructors and an output operator to the Twin??_t types so that o3 SPARC will compile again. 
--HG--
extra : convert_revision : af987aaeac87ee92a3b55cf0839d994cf7dea1af
 2007-03-07 17:46:05 +00:00
Gabe Black
b7ea19760a Make byteswap work correctly on Twin??_t types. 
--HG--
extra : convert_revision : a8a14078d62c24e480ffa69591edfc775d1d76cc
 2007-03-07 17:46:04 +00:00
Nathan Binkert
21391d494c Cleanup 
--HG--
extra : convert_revision : 31f1b0f760a6eb861652440f9d42aaf123ef4833
 2007-03-06 22:16:18 -08:00
Gabe Black
44f91bb444 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
 2007-03-06 20:58:44 +00:00
Nathan Binkert
44f215f44d Python parameters types need analogous C++ types 
--HG--
extra : convert_revision : d068dfec69b28d48fc299a4108e165decfaaace7
 2007-03-06 11:16:15 -08:00
Nathan Binkert
d55b25cde6 Move all of the parameters of the Root SimObject so they are 
directly configured by python.  Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.

--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
 2007-03-06 11:13:43 -08:00
Gabe Black
05c86ec0d7 Get X86 to load an elf and start a process for it. 
src/arch/x86/SConscript:
    Add in process source files.
src/arch/x86/isa_traits.hh:
    Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
    Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
    An X86 process class.
src/base/loader/elf_object.cc:
    Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
    Add an x86 traceflag
src/sim/process.cc:
    Add in code to create an x86 process.
src/arch/x86/intregs.hh:
    A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
    A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
    An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
    The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
    The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
    An x86 hello world test binary.

--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
 2007-03-06 15:42:30 +00:00
Nathan Binkert
f800fddcea Python atexit handlers are called in reverse order. 
Fix things so the stats dump happens last.

--HG--
extra : convert_revision : ea842dbcbb77dd1c715c4e5b57d2470e558c4265
 2007-03-05 20:14:00 -08:00
Gabe Black
992fda55f9 Fill out a stub version of the vtophys header file. 
--HG--
extra : convert_revision : 2c10a80a2f73207539e3f98b4a3b864d431f5035
 2007-03-05 17:59:04 +00:00
Gabe Black
296891b1c5 Add in NumGDBRegs so the constructor to the base class can get all it's arguments. 
--HG--
extra : convert_revision : fcec1ad134b53a419a952e556ed75cb1559a1127
 2007-03-05 17:58:15 +00:00
Gabe Black
a473d50e4c Reorganize the floating point register file a little. 
--HG--
extra : convert_revision : 643c147b77e931d49ac559681d4bbda737f6e1c7
 2007-03-05 17:57:26 +00:00
Gabe Black
a46e100bd9 Add some new source files. 
--HG--
extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7
 2007-03-05 17:56:26 +00:00
Gabe Black
a41b86ba01 Stub decoder. This is probably even farther from finished than it looks... 
--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
 2007-03-05 16:16:28 +00:00
Gabe Black
82235b8240 Add stub for x86 process creation 
--HG--
extra : convert_revision : 3bdbc415a73c6bb4d723f68714a96c9f922ba5e6
 2007-03-05 16:15:13 +00:00
Gabe Black
d539052b63 Add x86 version of call to "decode" 
--HG--
extra : convert_revision : bb799dcea58b51d6e1d3d744581ea48c5c1490fe
 2007-03-05 16:13:50 +00:00
Gabe Black
fc7f9ab80a Add x86 to the Arch enum in the object file class. 
--HG--
extra : convert_revision : bc8c5e78aac0e9033d6cbc756d8092369ac29072
 2007-03-05 16:12:20 +00:00
Gabe Black
a0294c10cd Added missing include. 
--HG--
extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
 2007-03-05 16:11:07 +00:00
Gabe Black
ecfc622451 Added LargestRead type for x86. I might have picked the wrong type. 
--HG--
extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
 2007-03-05 16:10:11 +00:00
Gabe Black
78e5406f19 Stub implementation for x86. 
--HG--
extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
 2007-03-05 16:09:09 +00:00
Gabe Black
05ba90b726 Stub implementation for x86 
--HG--
extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
 2007-03-05 16:08:18 +00:00
Gabe Black
58d30df676 Added fault generation functions. I would still like to see these go away. The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures. 
--HG--
extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
 2007-03-05 16:07:01 +00:00
Gabe Black
c7ab9f5bb2 Added an x86 dyninst 
--HG--
extra : convert_revision : 2317e9bb0bcf8010ab5d02019f7a14eeb7b1459c
 2007-03-05 14:55:45 +00:00
Gabe Black
7730af9503 Added stub implementations or prototypes for all the functions in this file. 
--HG--
extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
 2007-03-05 14:55:09 +00:00
Gabe Black
b2d356a6b2 Added in a missing include. 
--HG--
extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
 2007-03-05 14:53:51 +00:00
Gabe Black
7ed7d6e80d Filled in a stub header file for setting the result of a syscall. 
--HG--
extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
 2007-03-05 14:53:15 +00:00
Gabe Black
43b8f51bb8 Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha. 
--HG--
extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
 2007-03-05 14:52:28 +00:00
Gabe Black
2e6cf12963 Filled in a stub header file for remote gdb 
--HG--
extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
 2007-03-05 14:51:21 +00:00
Gabe Black
aa5f42b10d Correct a typo 
--HG--
extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
 2007-03-05 14:50:33 +00:00
Gabe Black
0e9db1a2e5 Make the constructor (and all the other functions) public 
--HG--
extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
 2007-03-05 14:49:52 +00:00
Gabe Black
b832e6740f Various touch ups 
--HG--
extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
 2007-03-05 14:49:07 +00:00
Gabe Black
ecc1066f43 Added a missing include. 
--HG--
extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
 2007-03-05 14:48:18 +00:00
Gabe Black
ec8b49cc5f Added a missing include. 
--HG--
extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
 2007-03-05 14:47:42 +00:00
Gabe Black
8a33c8dce4 Fix up the remote gdb include gaurds so it doesn't use the same symbol as Alpha does. 
--HG--
extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
 2007-03-05 14:46:49 +00:00
Gabe Black
30e700600c x86 register file includes. 
--HG--
extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
 2007-03-05 12:23:14 +00:00
Gabe Black
b9b29525a6 Include the x86 specific traits file. 
--HG--
extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
 2007-03-05 12:21:20 +00:00
Gabe Black
9e93feea10 Stub x86 Fault class which just panics. 
--HG--
extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
 2007-03-05 12:20:34 +00:00
Gabe Black
385eb586ce A new file for x86 specific parameters. This could be implemented as a sim object? 
--HG--
extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
 2007-03-05 12:19:54 +00:00
Gabe Black
be29612fbe Add in a declaration of class Checkpoint rather than expecting it to come from some other include. 
--HG--
extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
 2007-03-05 12:19:11 +00:00
Gabe Black
6a19b64de2 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
 2007-03-05 11:00:44 +00:00
Nathan Binkert
ba042842c6 Don't use the exact same name as a system header #define 
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
 2007-03-04 19:26:49 -08:00
Ali Saidi
a81143f06a add a sparc fs regression 
src/dev/sparc/iob.cc:
    don't warn on cpu restart/idle/halt stuff
tests/SConscript:
    add sparc target in test Sconscript
util/regress:
    Add SPARC_FS target in regress

--HG--
extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
 2007-03-03 22:45:26 -05:00
Ali Saidi
82874eefca Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
 2007-03-03 19:03:22 -05:00
Ali Saidi
1694c65ba1 Add Iob and remove the fake device 
configs/common/FSConfig.py:
    add an attachOnChipIO to force people to think about where "onchip" i/o should be connected in their hierarchy

--HG--
extra : convert_revision : cf79a9a00760b7daf28063f407a04bd38b956843
 2007-03-03 19:02:31 -05:00