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Clean up more memory leaks

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--HG--
extra : convert_revision : 32d1b23200752fe5fcdcbafb586f50bbe6db3bf3
This commit is contained in:
Ron Dreslinski 2007-03-12 15:59:54 -05:00
parent ca8e95b480
commit 2a02087eb5
1 changed files with 4 additions and 9 deletions
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13
src/mem/cache/cache_impl.hh vendored
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@ -583,12 +583,7 @@ Cache<TagStore,Coherence>::access(PacketPtr &pkt)
// Hit
hits[pkt->cmdToIndex()][0/*pkt->req->getThreadNum()*/]++;
// clear dirty bit if write through
if (pkt->needsResponse())
respond(pkt, curTick+lat);
if (pkt->cmd == MemCmd::Writeback) {
//Signal that you can kill the pkt/req
pkt->flags |= SATISFIED;
}
respond(pkt, curTick+lat);
return true;
}
@ -606,14 +601,14 @@ Cache<TagStore,Coherence>::access(PacketPtr &pkt)
if (pkt->flags & SATISFIED) {
// happens when a store conditional fails because it missed
// the cache completely
if (pkt->needsResponse())
respond(pkt, curTick+lat);
respond(pkt, curTick+lat);
} else {
missQueue->handleMiss(pkt, size, curTick + hitLatency);
}
if (pkt->cmd == MemCmd::Writeback) {
if (!pkt->needsResponse()) {
//Need to clean up the packet on a writeback miss, but leave the request
//for the next level.
delete pkt;
}