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Port, StaticInst: Revert unnecessary changes.

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--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
This commit is contained in:
Vincentius Robby 2007-08-08 14:54:02 -04:00
parent 13d10e844c
commit 3d40cba8d4
2 changed files with 31 additions and 34 deletions
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23
src/cpu/static_inst.hh
View file

@ -597,19 +597,20 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr)
Addr page_addr = addr & ~(TheISA::PageBytes - 1);
// checks recently decoded addresses
if (recentDecodes[0].decodePage) {
if (page_addr == recentDecodes[0].page_addr) {
if (recentDecodes[0].decodePage->decoded(mach_inst, addr))
return recentDecodes[0].decodePage->getInst(addr);
if (recentDecodes[0].decodePage &&
page_addr == recentDecodes[0].page_addr) {
if (recentDecodes[0].decodePage->decoded(mach_inst, addr))
return recentDecodes[0].decodePage->getInst(addr);
return searchCache(mach_inst, addr, recentDecodes[0].decodePage);
} else if (recentDecodes[1].decodePage &&
page_addr == recentDecodes[1].page_addr) {
if (recentDecodes[1].decodePage->decoded(mach_inst, addr))
return recentDecodes[1].decodePage->getInst(addr);
return searchCache(mach_inst, addr, recentDecodes[0].decodePage);
}
return searchCache(mach_inst, addr, recentDecodes[1].decodePage);
}
if (recentDecodes[1].decodePage &&
page_addr == recentDecodes[1].page_addr) {
if (recentDecodes[1].decodePage->decoded(mach_inst, addr))
return recentDecodes[1].decodePage->getInst(addr);
return searchCache(mach_inst, addr, recentDecodes[1].decodePage);
}
// searches the page containing the address to decode

42
src/mem/bus.hh
View file

@ -193,17 +193,17 @@ class Bus : public MemObject
// Checks the cache and returns the id of the port that has the requested
// address within its range
inline int checkPortCache(Addr addr) {
if (portCache[0].valid) {
if (addr >= portCache[0].start && addr < portCache[0].end) {
return portCache[0].id;
} else if (portCache[1].valid) {
if (addr >= portCache[1].start && addr < portCache[1].end) {
return portCache[1].id;
} else if (portCache[2].valid && addr >= portCache[2].start &&
addr < portCache[2].end) {
return portCache[2].id;
}
}
if (portCache[0].valid && addr >= portCache[0].start &&
addr < portCache[0].end) {
return portCache[0].id;
}
if (portCache[1].valid && addr >= portCache[1].start &&
addr < portCache[1].end) {
return portCache[1].id;
}
if (portCache[2].valid && addr >= portCache[2].start &&
addr < portCache[2].end) {
return portCache[2].id;
}
return -1;
@ -312,17 +312,14 @@ class Bus : public MemObject
// Checks the peer port interfaces cache for the port id and returns
// a pointer to the matching port
inline BusPort* checkBusCache(short id) {
if (busCache[0].valid) {
if (id == busCache[0].id) {
return busCache[0].port;
if (busCache[1].valid) {
if (id == busCache[1].id) {
return busCache[1].port;
if (busCache[2].valid && id == busCache[2].id)
return busCache[2].port;
}
}
}
if (busCache[0].valid && id == busCache[0].id) {
return busCache[0].port;
}
if (busCache[1].valid && id == busCache[1].id) {
return busCache[1].port;
}
if (busCache[2].valid && id == busCache[2].id) {
return busCache[2].port;
}
return NULL;
@ -345,7 +342,6 @@ class Bus : public MemObject
// Invalidates the cache. Needs to be called in constructor.
inline void clearBusCache() {
// memset(busCache, 0, 3 * sizeof(BusCache));
busCache[2].valid = false;
busCache[1].valid = false;
busCache[0].valid = false;