X86: Implement unsigned divide. The non-byte version ignores rdx which it shouldn't.
--HG-- extra : convert_revision : 07e5509fb8ed9d73c144d6f52951ebc02e7c0032
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@ -196,6 +196,53 @@ def macroop IMUL_R_P_I
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ld t2, ds, [0, t0, t7]
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mulel reg, t2, t1
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};
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#
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# One byte version of unsigned division
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#
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def macroop DIV_B_R
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{
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div1 rax, rax, reg
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};
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def macroop DIV_B_M
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{
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ld t1, ds, [scale, index, base], disp
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div1 rax, rax, t1
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};
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def macroop DIV_B_P
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{
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rdip t7
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ld t1, ds, [0, t0, t7], disp
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div1 rax, rax, t1
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};
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#
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# Unsigned division
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#
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def macroop DIV_R
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{
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divr rdx, rax, reg
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divq rax, rax, reg
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};
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def macroop DIV_M
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{
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ld t1, ds, [scale, index, base], disp
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divr rdx, rax, t1
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divq rax, rax, t1
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};
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def macroop DIV_P
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{
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rdip t7
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ld t1, ds, [0, t0, t7], disp
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divr rdx, rax, t1
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divq rax, rax, t1
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};
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'''
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#let {{
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# class MUL(Inst):
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