X86: Reorganize the native tracing code.
Ignore different values or rcx and r11 after a syscall until either the local or remote value changes. Also change the codes organization somewhat. --HG-- extra : convert_revision : 2c1f69d4e55b443e68bfc7b43e8387b02cf0b6b5
This commit is contained in:
Gabe Black
parent
4b29d22386
commit
e42524af02
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@ -60,119 +60,122 @@ NativeTrace::NativeTrace(const std::string & _name) : InstTracer(_name)
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}
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ccprintf(cerr, "Listening for native process on port %d\n", port);
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fd = native_listener.accept();
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checkRcx = true;
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checkR11 = true;
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}
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bool
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NativeTraceRecord::checkIntReg(const char * regName, int index, int size)
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NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
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{
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uint64_t regVal;
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int res = read(parent->fd, ®Val, size);
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if(res < 0)
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panic("Read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readIntReg(index);
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if(regVal != realRegVal)
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{
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DPRINTFN("Register %s should be %#x but is %#x.\n",
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regName, regVal, realRegVal);
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return false;
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}
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if(!checkRcx)
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checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
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if(checkRcx)
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return checkReg(name, mVal, nVal);
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return true;
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}
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bool NativeTraceRecord::checkPC(const char * regName, int size)
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bool
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NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
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{
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uint64_t regVal;
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int res = read(parent->fd, ®Val, size);
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if(res < 0)
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panic("Read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readNextPC();
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if(regVal != realRegVal)
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{
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DPRINTFN("%s should be %#x but is %#x.\n",
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regName, regVal, realRegVal);
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return false;
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}
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if(!checkR11)
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checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
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if(checkR11)
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return checkReg(name, mVal, nVal);
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return true;
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}
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void
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Trace::NativeTraceRecord::dump()
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{
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// ostream &outs = Trace::output();
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//Don't print what happens for each micro-op, just print out
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//once at the last op, and for regular instructions.
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if(!staticInst->isMicroop() || staticInst->isLastMicroop())
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parent->check(thread, staticInst->isSyscall());
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}
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void
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Trace::NativeTrace::check(ThreadContext * tc, bool isSyscall)
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{
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// ostream &outs = Trace::output();
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nState.update(fd);
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mState.update(tc);
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if(isSyscall)
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{
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checkIntReg("rax", INTREG_RAX, sizeof(uint64_t));
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checkIntReg("rcx", INTREG_RCX, sizeof(uint64_t));
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checkIntReg("rdx", INTREG_RDX, sizeof(uint64_t));
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checkIntReg("rbx", INTREG_RBX, sizeof(uint64_t));
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checkIntReg("rsp", INTREG_RSP, sizeof(uint64_t));
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checkIntReg("rbp", INTREG_RBP, sizeof(uint64_t));
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checkIntReg("rsi", INTREG_RSI, sizeof(uint64_t));
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checkIntReg("rdi", INTREG_RDI, sizeof(uint64_t));
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checkIntReg("r8", INTREG_R8, sizeof(uint64_t));
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checkIntReg("r9", INTREG_R9, sizeof(uint64_t));
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checkIntReg("r10", INTREG_R10, sizeof(uint64_t));
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checkIntReg("r11", INTREG_R11, sizeof(uint64_t));
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checkIntReg("r12", INTREG_R12, sizeof(uint64_t));
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checkIntReg("r13", INTREG_R13, sizeof(uint64_t));
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checkIntReg("r14", INTREG_R14, sizeof(uint64_t));
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checkIntReg("r15", INTREG_R15, sizeof(uint64_t));
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checkPC("rip", sizeof(uint64_t));
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checkRcx = false;
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checkR11 = false;
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oldRcxVal = mState.rcx;
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oldRealRcxVal = nState.rcx;
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oldR11Val = mState.r11;
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oldRealR11Val = nState.r11;
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}
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checkReg("rax", mState.rax, nState.rax);
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checkRcxReg("rcx", mState.rcx, nState.rcx);
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checkReg("rdx", mState.rdx, nState.rdx);
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checkReg("rbx", mState.rbx, nState.rbx);
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checkReg("rsp", mState.rsp, nState.rsp);
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checkReg("rbp", mState.rbp, nState.rbp);
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checkReg("rsi", mState.rsi, nState.rsi);
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checkReg("rdi", mState.rdi, nState.rdi);
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checkReg("r8", mState.r8, nState.r8);
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checkReg("r9", mState.r9, nState.r9);
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checkReg("r10", mState.r10, nState.r10);
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checkR11Reg("r11", mState.r11, nState.r11);
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checkReg("r12", mState.r12, nState.r12);
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checkReg("r13", mState.r13, nState.r13);
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checkReg("r14", mState.r14, nState.r14);
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checkReg("r15", mState.r15, nState.r15);
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checkReg("rip", mState.rip, nState.rip);
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#if THE_ISA == SPARC_ISA
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/*for(int f = 0; f <= 62; f+=2)
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{
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uint64_t regVal;
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int res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readFloatRegBits(f, 64);
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta, "Register f%d should be %#x but is %#x.\n", f, regVal, realRegVal);
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}
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}*/
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/*for(int f = 0; f <= 62; f+=2)
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{
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uint64_t regVal;
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int res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readNextPC();
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uint64_t realRegVal = thread->readFloatRegBits(f, 64);
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta,
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"Register pc should be %#x but is %#x.\n",
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regVal, realRegVal);
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DPRINTF(ExecRegDelta, "Register f%d should be %#x but is %#x.\n", f, regVal, realRegVal);
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}
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res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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realRegVal = thread->readNextNPC();
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta,
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"Register npc should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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realRegVal = thread->readIntReg(SparcISA::NumIntArchRegs + 2);
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if((regVal & 0xF) != (realRegVal & 0xF))
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{
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DPRINTF(ExecRegDelta,
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"Register ccr should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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#endif
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}*/
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uint64_t regVal;
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int res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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uint64_t realRegVal = thread->readNextPC();
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta,
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"Register pc should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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realRegVal = thread->readNextNPC();
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if(regVal != realRegVal)
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{
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DPRINTF(ExecRegDelta,
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"Register npc should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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res = read(fd, ®Val, sizeof(regVal));
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if(res < 0)
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panic("First read call failed! %s\n", strerror(errno));
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regVal = TheISA::gtoh(regVal);
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realRegVal = thread->readIntReg(SparcISA::NumIntArchRegs + 2);
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if((regVal & 0xF) != (realRegVal & 0xF))
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{
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DPRINTF(ExecRegDelta,
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"Register ccr should be %#x but is %#x.\n",
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regVal, realRegVal);
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}
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#endif
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}
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/* namespace Trace */ }
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@ -36,6 +36,7 @@
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#include "cpu/static_inst.hh"
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#include "sim/host.hh"
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#include "sim/insttracer.hh"
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#include "arch/x86/intregs.hh"
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class ThreadContext;
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@ -49,12 +50,6 @@ class NativeTraceRecord : public InstRecord
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protected:
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NativeTrace * parent;
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bool
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checkIntReg(const char * regName, int index, int size);
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bool
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checkPC(const char * regName, int size);
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public:
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NativeTraceRecord(NativeTrace * _parent,
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Tick _when, ThreadContext *_thread,
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@ -73,8 +68,109 @@ class NativeTrace : public InstTracer
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ListenSocket native_listener;
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bool checkRcx;
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bool checkR11;
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uint64_t oldRcxVal, oldR11Val;
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uint64_t oldRealRcxVal, oldRealR11Val;
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struct ThreadState {
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uint64_t rax;
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uint64_t rcx;
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uint64_t rdx;
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uint64_t rbx;
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uint64_t rsp;
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uint64_t rbp;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t r8;
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uint64_t r9;
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uint64_t r10;
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uint64_t r11;
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uint64_t r12;
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uint64_t r13;
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uint64_t r14;
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uint64_t r15;
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uint64_t rip;
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void update(int fd)
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{
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int bytesLeft = sizeof(ThreadState);
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int bytesRead = 0;
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do
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{
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int res = read(fd, ((char *)this) + bytesRead, bytesLeft);
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if(res < 0)
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panic("Read call failed! %s\n", strerror(errno));
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bytesLeft -= res;
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bytesRead += res;
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} while(bytesLeft);
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rax = TheISA::gtoh(rax);
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rcx = TheISA::gtoh(rcx);
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rdx = TheISA::gtoh(rdx);
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rbx = TheISA::gtoh(rbx);
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rsp = TheISA::gtoh(rsp);
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rbp = TheISA::gtoh(rbp);
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rsi = TheISA::gtoh(rsi);
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rdi = TheISA::gtoh(rdi);
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r8 = TheISA::gtoh(r8);
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r9 = TheISA::gtoh(r9);
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r10 = TheISA::gtoh(r10);
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r11 = TheISA::gtoh(r11);
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r12 = TheISA::gtoh(r12);
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r13 = TheISA::gtoh(r13);
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r14 = TheISA::gtoh(r14);
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r15 = TheISA::gtoh(r15);
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rip = TheISA::gtoh(rip);
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}
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void update(ThreadContext * tc)
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{
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rax = tc->readIntReg(X86ISA::INTREG_RAX);
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rcx = tc->readIntReg(X86ISA::INTREG_RCX);
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rdx = tc->readIntReg(X86ISA::INTREG_RDX);
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rbx = tc->readIntReg(X86ISA::INTREG_RBX);
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rsp = tc->readIntReg(X86ISA::INTREG_RSP);
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rbp = tc->readIntReg(X86ISA::INTREG_RBP);
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rsi = tc->readIntReg(X86ISA::INTREG_RSI);
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rdi = tc->readIntReg(X86ISA::INTREG_RDI);
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r8 = tc->readIntReg(X86ISA::INTREG_R8);
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r9 = tc->readIntReg(X86ISA::INTREG_R9);
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r10 = tc->readIntReg(X86ISA::INTREG_R10);
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r11 = tc->readIntReg(X86ISA::INTREG_R11);
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r12 = tc->readIntReg(X86ISA::INTREG_R12);
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r13 = tc->readIntReg(X86ISA::INTREG_R13);
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r14 = tc->readIntReg(X86ISA::INTREG_R14);
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r15 = tc->readIntReg(X86ISA::INTREG_R15);
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rip = tc->readNextPC();
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}
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};
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ThreadState nState;
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ThreadState mState;
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public:
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template<class T>
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bool
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checkReg(const char * regName, T &val, T &realVal)
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{
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if(val != realVal)
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{
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DPRINTFN("Register %s should be %#x but is %#x.\n",
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regName, realVal, val);
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return false;
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}
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return true;
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}
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bool
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checkRcxReg(const char * regName, uint64_t &, uint64_t &);
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bool
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checkR11Reg(const char * regName, uint64_t &, uint64_t &);
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NativeTrace(const std::string & name);
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NativeTraceRecord *
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@ -88,6 +184,9 @@ class NativeTrace : public InstTracer
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staticInst, pc, tc->misspeculating());
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}
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void
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check(ThreadContext *, bool syscall);
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friend class NativeTraceRecord;
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};
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