gem5/src
Steve Reinhardt 884807a68a Fix up a bunch of multilevel coherence issues.
Atomic mode seems to work.  Timing is closer but not there yet.

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extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f
2007-07-15 20:11:06 -07:00
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arch Merge from head. 2007-07-14 12:23:47 -07:00
base Add CacheRepl trace flag and move a couple DPRINTFs to it. 2007-07-14 13:28:52 -07:00
cpu Fix up a bunch of multilevel coherence issues. 2007-07-15 20:11:06 -07:00
dev Merge of DPRINTF fixes from head. 2007-07-14 12:09:37 -07:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern Change getDeviceAddressRanges to use bool for snoop arg. 2007-05-21 23:36:09 -07:00
mem Fix up a bunch of multilevel coherence issues. 2007-07-15 20:11:06 -07:00
python Add a function to get a SimObject's memory mode and rework 2007-06-10 13:52:21 -07:00
sim Make sure all parameters have default values if they're 2007-06-20 08:14:11 -07:00
unittest Quick program to time how long ccprintf takes to write 2007-02-07 22:02:09 -08:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript Don't go over 80 chars per line 2007-06-20 08:12:10 -07:00