Make sure all parameters have default values if they're

supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.

--HG--
extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93

src/cpu/o3/O3CPU.py

@@ -55,7 +55,7 @@ class DerivO3CPU(BaseCPU):
             checker.itb = Parent.itb
             checker.dtb = Parent.dtb
 
-    cachePorts = Param.Unsigned("Cache Ports")
+    cachePorts = Param.Unsigned(200, "Cache Ports")
     icache_port = Port("Instruction Port")
     dcache_port = Port("Data Port")
     _mem_ports = ['icache_port', 'dcache_port']
@@ -137,15 +137,15 @@ class DerivO3CPU(BaseCPU):
     function_trace = Param.Bool(False, "Enable function trace")
     function_trace_start = Param.Tick(0, "Cycle to start function trace")
 
-    smtNumFetchingThreads = Param.Unsigned("SMT Number of Fetching Threads")
-    smtFetchPolicy = Param.String("SMT Fetch policy")
-    smtLSQPolicy    = Param.String("SMT LSQ Sharing Policy")
-    smtLSQThreshold = Param.String("SMT LSQ Threshold Sharing Parameter")
-    smtIQPolicy    = Param.String("SMT IQ Sharing Policy")
-    smtIQThreshold = Param.String("SMT IQ Threshold Sharing Parameter")
-    smtROBPolicy   = Param.String("SMT ROB Sharing Policy")
-    smtROBThreshold = Param.String("SMT ROB Threshold Sharing Parameter")
-    smtCommitPolicy = Param.String("SMT Commit Policy")
+    smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads")
+    smtFetchPolicy = Param.String('SingleThread', "SMT Fetch policy")
+    smtLSQPolicy    = Param.String('Partitioned', "SMT LSQ Sharing Policy")
+    smtLSQThreshold = Param.Int(100, "SMT LSQ Threshold Sharing Parameter")
+    smtIQPolicy    = Param.String('Partitioned', "SMT IQ Sharing Policy")
+    smtIQThreshold = Param.Int(100, "SMT IQ Threshold Sharing Parameter")
+    smtROBPolicy   = Param.String('Partitioned', "SMT ROB Sharing Policy")
+    smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter")
+    smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy")
 
     def addPrivateSplitL1Caches(self, ic, dc):
         BaseCPU.addPrivateSplitL1Caches(self, ic, dc)

src/dev/Ethernet.py

@@ -64,7 +64,8 @@ class EtherDump(SimObject):
 
 class IGbE(PciDevice):
     type = 'IGbE'
-    hardware_address = Param.String("Ethernet Hardware Address")
+    hardware_address = Param.EthernetAddr(NextEthernetAddr,
+        "Ethernet Hardware Address")
     use_flow_control = Param.Bool(False,
         "Should we use xon/xoff flow contorl (UNIMPLEMENTD)")
     rx_fifo_size = Param.MemorySize('384kB', "Size of the rx FIFO")
@@ -100,9 +101,9 @@ class IGbEInt(EtherInt):
     type = 'IGbEInt'
     device = Param.IGbE("Ethernet device of this interface")
 
-
-
 class EtherDevBase(PciDevice):
+    type = 'EtherDevBase'
+    abstract = True
     hardware_address = Param.EthernetAddr(NextEthernetAddr,
         "Ethernet Hardware Address")
 

src/mem/cache/BaseCache.py

@@ -90,3 +90,4 @@ class BaseCache(MemObject):
          "Only prefetch on data not on instruction accesses")
     cpu_side = Port("Port on side closer to CPU")
     mem_side = Port("Port on side closer to MEM")
+    addr_range = VectorParam.AddrRange(AllMemory, "The address range in bytes")

src/sim/Process.py

@@ -40,7 +40,7 @@ class LiveProcess(Process):
     type = 'LiveProcess'
     executable = Param.String('', "executable (overrides cmd[0] if set)")
     cmd = VectorParam.String("command line (executable plus arguments)")
-    env = VectorParam.String('', "environment settings")
+    env = VectorParam.String([], "environment settings")
     cwd = Param.String('', "current working directory")
     input = Param.String('cin', "filename for stdin")
     uid = Param.Int(100, 'user id')

src/sim/System.py

@@ -39,6 +39,7 @@ class System(SimObject):
     physmem = Param.PhysicalMemory(Parent.any, "phsyical memory")
     mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in")
     if build_env['FULL_SYSTEM']:
+        abstract = True
         boot_cpu_frequency = Param.Frequency(Self.cpu[0].clock.frequency,
                                              "boot processor frequency")
         init_param = Param.UInt64(0, "numerical value to pass into simulator")