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X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded".

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--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
This commit is contained in:
Gabe Black 2007-07-30 13:23:33 -07:00
parent 9b5421dcba
commit d8beeff324
5 changed files with 19 additions and 10 deletions
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6
src/arch/x86/insts/microldstop.cc
View file

@ -66,13 +66,13 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
printReg(response, data, dataSize);
printDestReg(response, 0, dataSize);
response << ", ";
printSegment(response, segment);
ccprintf(response, ":[%d*", scale);
printReg(response, index, addressSize);
printSrcReg(response, 0, addressSize);
response << " + ";
printReg(response, base, addressSize);
printSrcReg(response, 1, addressSize);
ccprintf(response, " + %#x]", disp);
return response.str();
}

7
src/arch/x86/insts/microldstop.hh
View file

@ -76,6 +76,7 @@ namespace X86ISA
const RegIndex data;
const uint8_t dataSize;
const uint8_t addressSize;
RegIndex foldOBit, foldABit;
//Constructor
LdStOp(ExtMachInst _machInst,
@ -92,7 +93,11 @@ namespace X86ISA
disp(_disp), segment(_segment),
data(_data),
dataSize(_dataSize), addressSize(_addressSize)
{}
{
foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
foldABit =
(addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
}
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;

10
src/arch/x86/insts/microregop.cc
View file

@ -173,11 +173,11 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
printReg(response, dest, dataSize);
printDestReg(response, 0, dataSize);
response << ", ";
printReg(response, src1, dataSize);
printSrcReg(response, 0, dataSize);
response << ", ";
printReg(response, src2, dataSize);
printSrcReg(response, 1, dataSize);
return response.str();
}
@ -187,9 +187,9 @@ namespace X86ISA
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
printReg(response, dest, dataSize);
printDestReg(response, 0, dataSize);
response << ", ";
printReg(response, src1, dataSize);
printSrcReg(response, 0, dataSize);
ccprintf(response, ", %#x", imm8);
return response.str();
}

2
src/arch/x86/insts/microregop.hh
View file

@ -113,6 +113,7 @@ namespace X86ISA
const RegIndex dest;
const uint8_t dataSize;
const uint16_t ext;
RegIndex foldOBit;
// Constructor
RegOpBase(ExtMachInst _machInst,
@ -128,6 +129,7 @@ namespace X86ISA
src1(_src1), dest(_dest),
dataSize(_dataSize), ext(_ext)
{
foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
}
//Figure out what the condition code flags should be.

4
src/arch/x86/isa/microops/limmop.isa
View file

@ -78,6 +78,7 @@ def template MicroLimmOpDeclare {{
const RegIndex dest;
const uint64_t imm;
const uint8_t dataSize;
RegIndex foldOBit;
void buildMe();
std::string generateDisassembly(Addr pc,
@ -104,7 +105,7 @@ def template MicroLimmOpDisassembly {{
std::stringstream response;
printMnemonic(response, instMnem, mnemonic);
printReg(response, dest, dataSize);
printDestReg(response, 0, dataSize);
response << ", ";
ccprintf(response, "%#x", imm);
return response.str();
@ -115,6 +116,7 @@ def template MicroLimmOpConstructor {{
inline void %(class_name)s::buildMe()
{
foldOBit = (dataSize == 1 && !machInst.rex.present) ? 1 << 6 : 0;
%(constructor)s;
}