Gabe Black b6395da4ce X86: Fix register ordering. ... The correct order is unintuitively rax, rcx, rdx, rbx, etc, not rax, rbx, rcx, rdx. --HG-- extra : convert_revision : 3abe6a723a6e30becfe34f8da707ea2ff5d4df77		2007-07-29 01:28:36 -07:00
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arch	X86: return -return_value.value() on failure.	2007-07-29 01:27:34 -07:00
base	Merge Gabe's changes with mine.	2007-07-22 10:40:45 -04:00
cpu	X86: Fix register ordering.	2007-07-29 01:28:36 -07:00
dev	Major changes to how SimObjects are created and initialized. Almost all	2007-07-23 21:51:38 -07:00
doxygen	Fix up doxygen.	2006-08-14 19:25:07 -04:00
kern	X86: Fix argument register indexing.	2007-07-26 22:13:14 -07:00
mem	Major changes to how SimObjects are created and initialized. Almost all	2007-07-23 21:51:38 -07:00
python	Major changes to how SimObjects are created and initialized. Almost all	2007-07-23 21:51:38 -07:00
sim	Turn the instruction tracing code into pluggable sim objects.	2007-07-28 20:30:43 -07:00
unittest	Quick program to time how long ccprintf takes to write	2007-02-07 22:02:09 -08:00
Doxyfile	Fix up doxygen.	2006-08-14 19:25:07 -04:00
SConscript	Add a new SCons option called EXTRAS that allows you to include stuff in	2007-07-25 18:21:11 -07:00