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gem5/src/sim
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Gabe Black 8dd7700482 Turn the instruction tracing code into pluggable sim objects. 
These need to be refined a little still and given parameters.

--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
2007-07-28 20:30:43 -07:00
..
async.cc Factor code out of main.cc and main.i into a bunch of files 2007-03-02 22:24:00 -08:00
async.hh Factor code out of main.cc and main.i into a bunch of files 2007-03-02 22:24:00 -08:00
byteswap.hh Make byteswap work correctly on Twin??_t types. 2007-03-07 17:46:04 +00:00
core.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
core.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
debug.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
debug.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
eventq.cc remove the extern C around gdb helper functions. It's need needed for any new version of gdb to work and it causes at least mine to segfault 2007-03-12 17:23:08 -04:00
eventq.hh Add new EventWrapper constructor that takes a Tick value 2007-05-20 21:43:01 -07:00
faults.cc fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
faults.hh Make name, isMachineCheckFault, and isAlignmentFault const. 2007-07-18 16:09:00 -07:00
host.hh While I'm waiting for legion to run make m5 compile with a few more compilers 2007-01-27 15:38:04 -05:00
insttracer.hh Turn the instruction tracing code into pluggable sim objects. 2007-07-28 20:30:43 -07:00
InstTracer.py Turn the instruction tracing code into pluggable sim objects. 2007-07-28 20:30:43 -07:00
main.cc Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
process.cc X86: Fix argument register indexing. 2007-07-26 22:13:14 -07:00
process.hh fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
Process.py Make sure all parameters have default values if they're 2007-06-20 08:14:11 -07:00
process_impl.hh fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
pseudo_inst.cc update for new reschedule semantics 2007-05-09 22:34:54 -04:00
pseudo_inst.hh add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00
root.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
Root.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
SConscript Turn the instruction tracing code into pluggable sim objects. 2007-07-28 20:30:43 -07:00
serialize.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
serialize.hh Make SPARC checkpointing work 2007-01-30 18:25:39 -05:00
sim_events.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
sim_events.hh Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
sim_exit.hh there are two main thrusts of this changeset. 2006-10-06 01:27:02 -04:00
sim_object.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
sim_object.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
simulate.cc fix SIGUSR1 and SIGUSR2 by clearing the variables after 2007-04-18 08:04:46 -07:00
simulate.hh Factor code out of main.cc and main.i into a bunch of files 2007-03-02 22:24:00 -08:00
startup.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
startup.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
stat_control.cc Get rid of the Statistics and Statreset ParamContexts, and 2007-02-17 22:52:32 -08:00
stat_control.hh Get rid of the Statistics and Statreset ParamContexts, and 2007-02-17 22:52:32 -08:00
stats.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
syscall_emul.cc Implement the _llseek syscall. It's Linux only, so we'll actually use the lseek syscall. 2007-03-03 03:34:55 +00:00
syscall_emul.hh Use the TheISA namespace in case we're coming from a file that doesn't do that for us. This should be contained in the scope of the function and not leak elsewhere. 2007-03-09 22:14:25 +00:00
syscallreturn.hh Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed. 2006-12-05 01:55:02 -05:00
system.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
system.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
System.py Make sure all parameters have default values if they're 2007-06-20 08:14:11 -07:00
vptr.hh Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. 2006-06-06 17:32:21 -04:00