X86: Remove x86 code that attempted to fix misaligned accesses.
--HG-- extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
This commit is contained in:
parent
24bfda0fdf
commit
fcd04f953c
|
@ -106,29 +106,22 @@ namespace X86ISA
|
|||
Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const
|
||||
{
|
||||
Fault fault = NoFault;
|
||||
int size = dataSize;
|
||||
Addr alignedEA = EA & ~(dataSize - 1);
|
||||
if (EA != alignedEA)
|
||||
size *= 2;
|
||||
switch(size)
|
||||
switch(dataSize)
|
||||
{
|
||||
case 1:
|
||||
fault = xc->read(alignedEA, (uint8_t&)(Mem.a), flags);
|
||||
fault = xc->read(EA, (uint8_t&)Mem, flags);
|
||||
break;
|
||||
case 2:
|
||||
fault = xc->read(alignedEA, (uint16_t&)(Mem.a), flags);
|
||||
fault = xc->read(EA, (uint16_t&)Mem, flags);
|
||||
break;
|
||||
case 4:
|
||||
fault = xc->read(alignedEA, (uint32_t&)(Mem.a), flags);
|
||||
fault = xc->read(EA, (uint32_t&)Mem, flags);
|
||||
break;
|
||||
case 8:
|
||||
fault = xc->read(alignedEA, (uint64_t&)(Mem.a), flags);
|
||||
break;
|
||||
case 16:
|
||||
fault = xc->read(alignedEA, Mem, flags);
|
||||
fault = xc->read(EA, (uint64_t&)Mem, flags);
|
||||
break;
|
||||
default:
|
||||
panic("Bad operand size %d for read at %#x.\n", size, EA);
|
||||
panic("Bad operand size %d for read at %#x.\n", dataSize, EA);
|
||||
}
|
||||
return fault;
|
||||
}
|
||||
|
@ -137,29 +130,22 @@ namespace X86ISA
|
|||
Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const
|
||||
{
|
||||
Fault fault = NoFault;
|
||||
int size = dataSize;
|
||||
Addr alignedEA = EA & ~(dataSize - 1);
|
||||
if (EA != alignedEA)
|
||||
size *= 2;
|
||||
switch(size)
|
||||
switch(dataSize)
|
||||
{
|
||||
case 1:
|
||||
fault = xc->write((uint8_t&)(Mem.a), alignedEA, flags, 0);
|
||||
fault = xc->write((uint8_t&)Mem, EA, flags, 0);
|
||||
break;
|
||||
case 2:
|
||||
fault = xc->write((uint16_t&)(Mem.a), alignedEA, flags, 0);
|
||||
fault = xc->write((uint16_t&)Mem, EA, flags, 0);
|
||||
break;
|
||||
case 4:
|
||||
fault = xc->write((uint32_t&)(Mem.a), alignedEA, flags, 0);
|
||||
fault = xc->write((uint32_t&)Mem, EA, flags, 0);
|
||||
break;
|
||||
case 8:
|
||||
fault = xc->write((uint64_t&)(Mem.a), alignedEA, flags, 0);
|
||||
break;
|
||||
case 16:
|
||||
fault = xc->write(Mem, alignedEA, flags, 0);
|
||||
fault = xc->write((uint64_t&)Mem, EA, flags, 0);
|
||||
break;
|
||||
default:
|
||||
panic("Bad operand size %d for write at %#x.\n", size, EA);
|
||||
panic("Bad operand size %d for write at %#x.\n", dataSize, EA);
|
||||
}
|
||||
return fault;
|
||||
}
|
||||
|
|
|
@ -123,19 +123,7 @@ def template MicroLoadExecute {{
|
|||
%(ea_code)s;
|
||||
DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
|
||||
|
||||
Twin64_t alignedMem;
|
||||
fault = read(xc, EA, alignedMem, 0);
|
||||
int offset = EA & (dataSize - 1);
|
||||
if(dataSize != 8 || !offset)
|
||||
{
|
||||
Mem = bits(alignedMem.a,
|
||||
(offset + dataSize) * 8 - 1, offset * 8);
|
||||
}
|
||||
else
|
||||
{
|
||||
Mem = alignedMem.b << (dataSize - offset) * 8;
|
||||
Mem |= bits(alignedMem.a, dataSize * 8 - 1, offset * 8);
|
||||
}
|
||||
fault = read(xc, EA, Mem, 0);
|
||||
|
||||
if(fault == NoFault)
|
||||
{
|
||||
|
@ -162,9 +150,7 @@ def template MicroLoadInitiateAcc {{
|
|||
%(ea_code)s;
|
||||
DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
|
||||
|
||||
int offset = EA & (dataSize - 1);
|
||||
Twin64_t alignedMem;
|
||||
fault = read(xc, EA, alignedMem, offset);
|
||||
fault = read(xc, EA, Mem, 0);
|
||||
|
||||
return fault;
|
||||
}
|
||||
|
@ -180,18 +166,8 @@ def template MicroLoadCompleteAcc {{
|
|||
%(op_decl)s;
|
||||
%(op_rd)s;
|
||||
|
||||
Twin64_t alignedMem = pkt->get<Twin64_t>();
|
||||
int offset = pkt->req->getFlags();
|
||||
if(dataSize != 8 || !offset)
|
||||
{
|
||||
Mem = bits(alignedMem.a,
|
||||
(offset + dataSize) * 8 - 1, offset * 8);
|
||||
}
|
||||
else
|
||||
{
|
||||
Mem = alignedMem.b << (dataSize - offset) * 8;
|
||||
Mem |= bits(alignedMem.a, dataSize * 8 - 1, offset * 8);
|
||||
}
|
||||
Mem = pkt->get<typeof(Mem)>();
|
||||
|
||||
%(code)s;
|
||||
|
||||
if(fault == NoFault)
|
||||
|
@ -221,14 +197,7 @@ def template MicroStoreExecute {{
|
|||
|
||||
if(fault == NoFault)
|
||||
{
|
||||
int offset = EA & (dataSize - 1);
|
||||
|
||||
Twin64_t alignedMem;
|
||||
alignedMem.a = Mem << (offset * 8);
|
||||
alignedMem.b =
|
||||
bits(Mem, dataSize * 8 - 1, (dataSize - offset) * 8);
|
||||
|
||||
fault = write(xc, alignedMem, EA, 0);
|
||||
fault = write(xc, Mem, EA, 0);
|
||||
if(fault == NoFault)
|
||||
{
|
||||
%(op_wb)s;
|
||||
|
@ -255,14 +224,7 @@ def template MicroStoreInitiateAcc {{
|
|||
|
||||
if(fault == NoFault)
|
||||
{
|
||||
int offset = EA & (dataSize - 1);
|
||||
|
||||
Twin64_t alignedMem;
|
||||
alignedMem.a = Mem << (offset * 8);
|
||||
alignedMem.b =
|
||||
bits(Mem, dataSize * 8 - 1, (dataSize - offset) * 8);
|
||||
|
||||
fault = write(xc, alignedMem, EA, 0);
|
||||
fault = write(xc, Mem, EA, 0);
|
||||
if(fault == NoFault)
|
||||
{
|
||||
%(op_wb)s;
|
||||
|
|
Loading…
Reference in a new issue