Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : cf2cc07f18b877f980e2d1fc83916f7849d9c7d9
This commit is contained in:
Gabe Black
commit
05c71c6194
4 changed files with 149 additions and 61 deletions
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@ -61,6 +61,7 @@
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#include "arch/x86/types.hh"
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#include "base/bitfield.hh"
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#include "base/misc.hh"
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#include "base/trace.hh"
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#include "sim/host.hh"
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class ThreadContext;
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@ -70,8 +71,11 @@ namespace X86ISA
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class Predecoder
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{
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private:
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//These are defined and documented in predecoder_tables.cc
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static const uint8_t Prefixes[256];
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static const uint8_t UsesModRM[2][256];
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static const uint8_t ImmediateType[2][256];
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static const uint8_t ImmediateTypeToSize[3][10];
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protected:
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ThreadContext * tc;
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@ -133,7 +137,6 @@ namespace X86ISA
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void process()
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{
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warn("About to process some bytes\n");
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assert(!outOfBytes);
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assert(!emiIsReady);
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while(!emiIsReady && !outOfBytes)
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@ -143,60 +146,51 @@ namespace X86ISA
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{
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case Prefix:
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uint8_t prefix = Prefixes[nextByte];
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if(prefix)
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offset++;
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switch(prefix)
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{
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//Operand size override prefixes
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case OperandSizeOverride:
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warn("Found operand size override prefix!\n");
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offset++;
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DPRINTF(Predecoder, "Found operand size override prefix.\n");
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break;
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case AddressSizeOverride:
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warn("Found address size override prefix!\n");
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offset++;
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DPRINTF(Predecoder, "Found address size override prefix.\n");
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break;
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//Segment override prefixes
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case CSOverride:
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warn("Found cs segment override!\n");
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offset++;
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DPRINTF(Predecoder, "Found cs segment override.\n");
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break;
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case DSOverride:
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warn("Found ds segment override!\n");
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offset++;
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DPRINTF(Predecoder, "Found ds segment override.\n");
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break;
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case ESOverride:
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warn("Found es segment override!\n");
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offset++;
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DPRINTF(Predecoder, "Found es segment override.\n");
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break;
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case FSOverride:
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warn("Found fs segment override!\n");
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offset++;
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DPRINTF(Predecoder, "Found fs segment override.\n");
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break;
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case GSOverride:
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warn("Found gs segment override!\n");
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offset++;
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DPRINTF(Predecoder, "Found gs segment override.\n");
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break;
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case SSOverride:
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warn("Found ss segment override!\n");
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offset++;
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DPRINTF(Predecoder, "Found ss segment override.\n");
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break;
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case Lock:
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warn("Found lock prefix!\n");
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offset++;
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DPRINTF(Predecoder, "Found lock prefix.\n");
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break;
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case Rep:
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warn("Found rep prefix!\n");
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offset++;
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DPRINTF(Predecoder, "Found rep prefix.\n");
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break;
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case Repne:
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warn("Found repne prefix!\n");
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offset++;
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DPRINTF(Predecoder, "Found repne prefix.\n");
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break;
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case Rex:
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warn("Found Rex prefix %#x!\n", nextByte);
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offset++;
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DPRINTF(Predecoder, "Found Rex prefix %#x.\n", nextByte);
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emi.rexPrefix = nextByte;
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break;
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case 0:
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emi.twoByteOpcode = false;
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emi.numOpcodes = 0;
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state = Opcode;
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break;
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default:
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@ -204,20 +198,30 @@ namespace X86ISA
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}
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break;
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case Opcode:
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emi.numOpcodes++;
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assert(emi.numOpcodes < 2);
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if(nextByte == 0xf0)
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{
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warn("Found two byte opcode!\n");
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emi.twoByteOpcode = true;
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DPRINTF(Predecoder, "Found two byte opcode.\n");
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}
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else
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{
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warn("Found opcode %#x!\n", nextByte);
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if (UsesModRM[emi.twoByteOpcode ? 1 : 0][nextByte]) {
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immediateCollected = 0;
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displacementCollected = 0;
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emi.immediate = 0;
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emi.displacement = 0;
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int immType = ImmediateType[
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emi.numOpcodes - 1][nextByte];
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if(0) //16 bit mode
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immediateSize = ImmediateTypeToSize[0][immType];
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else if(!(emi.rexPrefix & 0x4)) //32 bit mode
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immediateSize = ImmediateTypeToSize[1][immType];
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else //64 bit mode
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immediateSize = ImmediateTypeToSize[2][immType];
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DPRINTF(Predecoder, "Found opcode %#x.\n", nextByte);
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if (UsesModRM[emi.numOpcodes - 1][nextByte]) {
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state = ModRM;
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} else if(0 /* uses immediate */) {
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//Figure out how big the immediate should be
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immediateCollected = 0;
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emi.immediate = 0;
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} else if(immediateSize) {
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state = Immediate;
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} else {
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emiIsReady = true;
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@ -227,25 +231,25 @@ namespace X86ISA
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offset++;
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break;
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case ModRM:
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warn("Found modrm byte %#x!\n", nextByte);
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DPRINTF(Predecoder, "Found modrm byte %#x.\n", nextByte);
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if (0) {//in 16 bit mode
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//figure out 16 bit displacement size
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if(nextByte & 0xC7 == 0x06 ||
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nextByte & 0xC0 == 0x40)
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displacementSize = 1;
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else if(nextByte & 0xC7 == 0x80)
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nextByte & 0xC0 == 0x80)
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displacementSize = 2;
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else if(nextByte & 0xC0 == 0x40)
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displacementSize = 1;
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else
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displacementSize = 0;
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} else {
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//figure out 32/64 bit displacement size
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if(nextByte & 0xC7 == 0x06 ||
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nextByte & 0xC0 == 0x40)
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if(nextByte & 0xC7 == 0x05 ||
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nextByte & 0xC0 == 0x80)
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displacementSize = 4;
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else if(nextByte & 0xC7 == 0x80)
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else if(nextByte & 0xC0 == 0x40)
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displacementSize = 2;
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else
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displacementSize = 4;
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displacementSize = 0;
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}
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//If there's an SIB, get that next.
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//There is no SIB in 16 bit mode.
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@ -254,12 +258,8 @@ namespace X86ISA
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// && in 32/64 bit mode)
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state = SIB;
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} else if(displacementSize) {
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displacementCollected = 0;
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emi.displacement = 0;
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state = Displacement;
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} else if(immediateSize) {
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immediateCollected = 0;
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emi.immediate = 0;
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state = Immediate;
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} else {
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emiIsReady = true;
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@ -269,15 +269,11 @@ namespace X86ISA
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offset++;
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break;
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case SIB:
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warn("Found SIB byte %#x!\n", nextByte);
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DPRINTF(Predecoder, "Found SIB byte %#x.\n", nextByte);
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offset++;
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if(displacementSize) {
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displacementCollected = 0;
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emi.displacement = 0;
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state = Displacement;
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} else if(immediateSize) {
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immediateCollected = 0;
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emi.immediate = 0;
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state = Immediate;
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} else {
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emiIsReady = true;
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@ -297,15 +293,18 @@ namespace X86ISA
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toGet = toGet > remaining ? remaining : toGet;
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//Shift the bytes we want to be all the way to the right
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partialDisp = fetchChunk >> offset;
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partialDisp = fetchChunk >> (offset * 8);
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//Mask off what we don't want
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partialDisp &= mask(toGet * 8);
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//Shift it over to overlay with our displacement.
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partialDisp <<= displacementCollected;
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partialDisp <<= (displacementCollected * 8);
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//Put it into our displacement
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emi.displacement |= partialDisp;
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//Update how many bytes we've collected.
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displacementCollected += toGet;
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offset += toGet;
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DPRINTF(Predecoder, "Collecting %d byte displacement, got %d bytes.\n",
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displacementSize, displacementCollected);
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if(displacementSize == displacementCollected) {
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//Sign extend the displacement
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@ -323,9 +322,9 @@ namespace X86ISA
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default:
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panic("Undefined displacement size!\n");
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}
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DPRINTF(Predecoder, "Collected displacement %#x.\n",
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emi.displacement);
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if(immediateSize) {
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immediateCollected = 0;
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emi.immediate = 0;
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state = Immediate;
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} else {
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emiIsReady = true;
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@ -346,17 +345,23 @@ namespace X86ISA
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toGet = toGet > remaining ? remaining : toGet;
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//Shift the bytes we want to be all the way to the right
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partialDisp = fetchChunk >> offset;
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partialDisp = fetchChunk >> (offset * 8);
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//Mask off what we don't want
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partialDisp &= mask(toGet * 8);
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//Shift it over to overlay with our immediate.
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partialDisp <<= displacementCollected;
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partialDisp <<= (immediateCollected * 8);
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//Put it into our immediate
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emi.displacement |= partialDisp;
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emi.immediate |= partialDisp;
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//Update how many bytes we've collected.
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displacementCollected += toGet;
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immediateCollected += toGet;
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offset += toGet;
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DPRINTF(Predecoder, "Collecting %d byte immediate, got %d bytes.\n",
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immediateSize, immediateCollected);
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if(immediateSize == immediateCollected)
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{
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DPRINTF(Predecoder, "Collected immediate %#x.\n",
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emi.immediate);
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emiIsReady = true;
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state = Prefix;
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}
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@ -378,7 +383,6 @@ namespace X86ISA
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fetchChunk = data;
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assert(off < sizeof(MachInst));
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outOfBytes = false;
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warn("About to call process.\n");
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process();
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}
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@ -140,4 +140,83 @@ namespace X86ISA
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/* F */ 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 1 , 0
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}
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};
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enum ImmediateTypes {
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NoImm,
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NI = NoImm,
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ByteImm,
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BY = ByteImm,
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WordImm,
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WO = WordImm,
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DWordImm,
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DW = DWordImm,
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QWordImm,
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QW = QWordImm,
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OWordImm,
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OW = OWordImm,
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VWordImm,
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VW = VWordImm,
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ZWordImm,
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ZW = ZWordImm,
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Pointer,
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PO = Pointer,
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//The enter instruction takes -2- immediates for a total of 3 bytes
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Enter,
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EN = Enter
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};
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const uint8_t Predecoder::ImmediateTypeToSize[3][10] =
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{
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// noimm byte word dword qword oword vword zword enter
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{0, 1, 2, 4, 8, 16, 2, 2, 3, 4}, //16 bit
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{0, 1, 2, 4, 8, 16, 4, 4, 3, 6}, //32 bit
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{0, 1, 2, 4, 8, 16, 4, 8, 3, 0} //64 bit
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};
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//This table determines the immediate type. The first index is the
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//number of bytes in the instruction, and the second is the meaningful
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//byte of the opcode. I didn't use the NI constant here for the sake
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//of clarity.
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const uint8_t Predecoder::ImmediateType[2][256] =
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{//For one byte instructions
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{ //LSB
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// MSB 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | A | B | C | D | E | F
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/* 0 */ 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 , 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 ,
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/* 1 */ 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 , 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 ,
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/* 2 */ 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 , 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 ,
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/* 3 */ 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 , 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 ,
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/* 4 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 5 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 6 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , ZW, ZW, BY, BY, 0 , 0 , 0 , 0 ,
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/* 7 */ BY, BY, BY, BY, BY, BY, BY, BY, BY, BY, BY, BY, BY, BY, BY, BY,
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/* 8 */ BY, ZW, BY, BY, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 9 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* A */ BY, VW, BY, VW, 0 , 0 , 0 , 0 , BY, ZW, 0 , 0 , 0 , 0 , 0 , 0 ,
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/* B */ BY, BY, BY, BY, BY, BY, BY, BY, VW, VW, VW, VW, VW, VW, VW, VW,
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/* C */ BY, BY, WO, 0 , 0 , 0 , BY, ZW, EN, 0 , WO, 0 , 0 , BY, 0 , 0 ,
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/* D */ 0 , 0 , 0 , 0 , BY, BY, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* E */ BY, BY, BY, BY, BY, BY, BY, BY, ZW, ZW, PO, BY, 0 , 0 , 0 , 0 ,
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/* F */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0
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},
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//For two byte instructions
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{ //LSB
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// MSB 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | A | B | C | D | E | F
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/* 0 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 0 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 2 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 3 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 4 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 5 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 6 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 7 */ BY, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* 8 */ ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW, ZW,
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/* 9 */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* A */ 0 , 0 , 0 , 0 , BY, 0 , 0 , 0 , 0 , 0 , 0 , 0 , BY, 0 , 0 , 0 ,
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/* B */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , ZW, 0 , BY, 0 , 0 , 0 , 0 , 0 ,
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/* C */ 0 , 0 , BY, 0 , BY, BY, BY, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* D */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* E */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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/* F */ 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0
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}
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};
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}
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@ -94,7 +94,11 @@ namespace X86ISA
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uint8_t legacyPrefixes;
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uint8_t rexPrefix;
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bool twoByteOpcode;
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//Right now, we ignore that this can be 3 in
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//some cases
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uint8_t numOpcodes;
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//This will need to be decoded specially later
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bool is3dnow;
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uint8_t opcode;
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uint64_t immediate;
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uint64_t displacement;
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@ -137,6 +137,7 @@ baseFlags = [
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'PciConfigAll',
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'Pipeline',
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'Printf',
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'Predecoder',
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'Quiesce',
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'ROB',
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'Regs',
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