X86: Get x86 to compile again after the simobject constructor change.

--HG--
extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554

src/arch/x86/tlb.cc

@@ -79,11 +79,11 @@ namespace X86ISA {
 X86ISA::ITB *
 X86ITBParams::create()
 {
-    return new X86ISA::ITB(name);
+    return new X86ISA::ITB(this);
 }
 
 X86ISA::DTB *
 X86DTBParams::create()
 {
-    return new X86ISA::DTB(name);
+    return new X86ISA::DTB(this);
 }

src/arch/x86/tlb.hh

@@ -59,7 +59,6 @@
 #define __ARCH_X86_TLB_HH__
 
 #include <iostream>
-#include <string>
 
 #include "sim/host.hh"
 #include "sim/tlb.hh"
@@ -81,14 +80,14 @@ namespace X86ISA
     class ITB : public GenericTLB
     {
       public:
-        ITB(const std::string &name) : GenericTLB(name)
+        ITB(const Params *p) : GenericTLB(p)
         {}
     };
 
     class DTB : public GenericTLB
     {
       public:
-        DTB(const std::string &name) : GenericTLB(name)
+        DTB(const Params *p) : GenericTLB(p)
         {}
     };
 };

src/cpu/nativetrace.cc

@@ -50,7 +50,7 @@ using namespace TheISA;
 
 namespace Trace {
 
-NativeTrace::NativeTrace(const std::string & _name) : InstTracer(_name)
+NativeTrace::NativeTrace(const Params *p) : InstTracer(p)
 {
     int port = 8000;
     while(!native_listener.listen(port, true))
@@ -187,5 +187,5 @@ Trace::NativeTrace::check(ThreadContext * tc, bool isSyscall)
 Trace::NativeTrace *
 NativeTraceParams::create()
 {
-    return new Trace::NativeTrace(name);
+    return new Trace::NativeTrace(this);
 };

src/cpu/nativetrace.hh

@@ -171,7 +171,7 @@ class NativeTrace : public InstTracer
     bool
     checkR11Reg(const char * regName, uint64_t &, uint64_t &);
 
-    NativeTrace(const std::string & name);
+    NativeTrace(const Params *p);
 
     NativeTraceRecord *
     getInstRecord(Tick when, ThreadContext *tc,