Make symbols for regular registers.

--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622

src/arch/x86/isa/insts/control_transfer/call.py

@@ -61,8 +61,8 @@ def macroop CALL_I
 
     limm t2, imm
     rdip t1
-    subi "INTREG_RSP", "INTREG_RSP", dsz
-    st t1, ss, [0, t0, "INTREG_RSP"]
+    subi rsp, rsp, dsz
+    st t1, ss, [0, t0, rsp]
     wrip t1, t2
 };
 '''

src/arch/x86/isa/insts/data_transfer/stack_operations.py

@@ -58,16 +58,16 @@ def macroop POP_R {
     # Make the default data size of pops 64 bits in 64 bit mode
     .adjust_env oszIn64Override
 
-    ld reg, ss, [0, t0, "INTREG_RSP"]
-    addi "INTREG_RSP", "INTREG_RSP", dsz
+    ld reg, ss, [0, t0, rsp]
+    addi rsp, rsp, dsz
 };
 
 def macroop PUSH_R {
     # Make the default data size of pops 64 bits in 64 bit mode
     .adjust_env oszIn64Override
 
-    subi "INTREG_RSP", "INTREG_RSP", dsz
-    st reg, ss, [0, t0, "INTREG_RSP"]
+    subi rsp, rsp, dsz
+    st reg, ss, [0, t0, rsp]
 };
 '''
 #let {{

src/arch/x86/isa/microasm.isa

@@ -91,6 +91,9 @@ let {{
         "osz" : "env.operandSize",
         "ssz" : "env.stackSize"
     }
+
+    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
+        assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
     assembler.symbols.update(symbols)
 
     # Code literal which forces a default 64 bit operand size in 64 bit mode.