Event descriptions should not end in "event"
(they function as adjectives not nouns) --HG-- extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
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@ -357,7 +357,7 @@ MiscRegFile::CP0Event::process()
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const char *
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MiscRegFile::CP0Event::description()
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{
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return "Coprocessor-0 event";
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return "Coprocessor-0";
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}
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void
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@ -91,7 +91,7 @@ CPUProgressEvent::process()
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const char *
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CPUProgressEvent::description()
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{
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return "CPU Progress event";
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return "CPU Progress";
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}
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#if FULL_SYSTEM
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@ -67,7 +67,7 @@ template <class Impl>
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const char *
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DefaultCommit<Impl>::TrapEvent::description()
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{
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return "Trap event";
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return "Trap";
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}
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template <class Impl>
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@ -83,7 +83,7 @@ template <class Impl>
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const char *
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FullO3CPU<Impl>::TickEvent::description()
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{
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return "FullO3CPU tick event";
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return "FullO3CPU tick";
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}
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template <class Impl>
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@ -112,7 +112,7 @@ template <class Impl>
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const char *
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FullO3CPU<Impl>::ActivateThreadEvent::description()
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{
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return "FullO3CPU \"Activate Thread\" event";
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return "FullO3CPU \"Activate Thread\"";
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}
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template <class Impl>
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@ -144,7 +144,7 @@ template <class Impl>
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const char *
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FullO3CPU<Impl>::DeallocateContextEvent::description()
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{
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return "FullO3CPU \"Deallocate Context\" event";
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return "FullO3CPU \"Deallocate Context\"";
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}
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template <class Impl>
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@ -60,7 +60,7 @@ template <class Impl>
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const char *
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InstructionQueue<Impl>::FUCompletion::description()
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{
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return "Functional unit completion event";
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return "Functional unit completion";
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}
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template <class Impl>
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@ -69,7 +69,7 @@ template<class Impl>
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const char *
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LSQUnit<Impl>::WritebackEvent::description()
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{
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return "Store writeback event";
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return "Store writeback";
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}
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template<class Impl>
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@ -583,7 +583,7 @@ template<class Impl>
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const char *
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BackEnd<Impl>::LdWritebackEvent::description()
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{
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return "Load writeback event";
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return "Load writeback";
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}
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@ -603,7 +603,7 @@ template <class Impl>
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const char *
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BackEnd<Impl>::DCacheCompletionEvent::description()
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{
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return "Cache completion event";
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return "Cache completion";
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}
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template <class Impl>
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@ -84,7 +84,7 @@ template <class Impl>
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const char *
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OzoneCPU<Impl>::TickEvent::description()
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{
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return "OzoneCPU tick event";
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return "OzoneCPU tick";
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}
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template <class Impl>
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@ -540,5 +540,5 @@ template <class Impl>
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const char *
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InorderBackEnd<Impl>::DCacheCompletionEvent::description()
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{
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return "DCache completion event";
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return "DCache completion";
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}
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@ -64,7 +64,7 @@ template <class Impl>
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const char *
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InstQueue<Impl>::FUCompletion::description()
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{
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return "Functional unit completion event";
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return "Functional unit completion";
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}
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#endif
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template <class Impl>
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@ -62,7 +62,7 @@ template <class Impl>
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const char *
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OzoneLSQ<Impl>::StoreCompletionEvent::description()
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{
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return "LSQ store completion event";
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return "LSQ store completion";
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}
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template <class Impl>
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@ -121,7 +121,7 @@ template <class Impl>
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const char *
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LWBackEnd<Impl>::TrapEvent::description()
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{
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return "Trap event";
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return "Trap";
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}
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template <class Impl>
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@ -57,7 +57,7 @@ template<class Impl>
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const char *
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OzoneLWLSQ<Impl>::WritebackEvent::description()
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{
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return "Store writeback event";
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return "Store writeback";
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}
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template <class Impl>
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@ -47,5 +47,5 @@ EndQuiesceEvent::process()
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const char*
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EndQuiesceEvent::description()
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{
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return "End Quiesce Event.";
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return "End Quiesce";
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}
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@ -57,7 +57,7 @@ AtomicSimpleCPU::TickEvent::process()
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const char *
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AtomicSimpleCPU::TickEvent::description()
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{
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return "AtomicSimpleCPU tick event";
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return "AtomicSimpleCPU tick";
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}
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Port *
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@ -101,7 +101,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
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TickEvent(TimingSimpleCPU *_cpu)
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:Event(&mainEventQueue), cpu(_cpu) {}
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const char *description() { return "Timing CPU clock event"; }
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const char *description() { return "Timing CPU tick"; }
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void schedule(PacketPtr _pkt, Tick t);
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};
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@ -127,7 +127,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
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ITickEvent(TimingSimpleCPU *_cpu)
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: TickEvent(_cpu) {}
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void process();
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const char *description() { return "Timing CPU clock event"; }
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const char *description() { return "Timing CPU icache tick"; }
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};
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ITickEvent tickEvent;
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@ -155,7 +155,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
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DTickEvent(TimingSimpleCPU *_cpu)
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: TickEvent(_cpu) {}
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void process();
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const char *description() { return "Timing CPU clock event"; }
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const char *description() { return "Timing CPU dcache tick"; }
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};
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DTickEvent tickEvent;
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@ -207,7 +207,7 @@ OptCPU::TickEvent::process()
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const char *
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OptCPU::TickEvent::description()
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{
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return "OptCPU tick event";
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return "OptCPU tick";
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}
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@ -148,7 +148,7 @@ TraceCPU::TickEvent::process()
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const char *
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TraceCPU::TickEvent::description()
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{
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return "TraceCPU tick event";
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return "TraceCPU tick";
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}
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@ -89,7 +89,7 @@ class EtherTap : public EtherInt
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TxEvent(EtherTap *_tap)
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: Event(&mainEventQueue), tap(_tap) {}
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void process() { tap->retransmit(); }
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virtual const char *description() { return "retransmit event"; }
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virtual const char *description() { return "EtherTap retransmit"; }
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};
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friend class TxEvent;
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@ -58,7 +58,7 @@ Uart8250::IntrEvent::IntrEvent(Uart8250 *u, int bit)
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const char *
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Uart8250::IntrEvent::description()
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{
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return "uart interrupt delay event";
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return "uart interrupt delay";
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}
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void
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@ -146,7 +146,7 @@ class Bridge : public MemObject
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virtual void process() { port->trySend(); }
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virtual const char *description() { return "bridge send event"; }
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virtual const char *description() { return "bridge send"; }
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};
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SendEvent sendEvent;
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