Merge with head.
--HG-- extra : convert_revision : f677debfd636d79bc5097eb45331601d3253743d
This commit is contained in:
commit
458dfc8b3e
20 changed files with 130 additions and 224 deletions
|
@ -38,12 +38,12 @@ if env['TARGET_ISA'] == 'alpha':
|
|||
Source('miscregfile.cc')
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||||
Source('regfile.cc')
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||||
Source('remote_gdb.cc')
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Source('utility.cc')
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if env['FULL_SYSTEM']:
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SimObject('AlphaSystem.py')
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SimObject('AlphaTLB.py')
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Source('arguments.cc')
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Source('ev5.cc')
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Source('idle_event.cc')
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Source('ipr.cc')
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|
|
|
@ -40,7 +40,6 @@
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* up boot time.
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*/
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#include "arch/arguments.hh"
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#include "arch/vtophys.hh"
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#include "arch/alpha/idle_event.hh"
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#include "arch/alpha/linux/system.hh"
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|
@ -54,6 +53,7 @@
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#include "kern/linux/events.hh"
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#include "mem/physical.hh"
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#include "mem/port.hh"
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#include "sim/arguments.hh"
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#include "sim/byteswap.hh"
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using namespace std;
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|
|
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@ -26,48 +26,40 @@
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Ali Saidi
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*/
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#include "arch/sparc/arguments.hh"
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#include "arch/sparc/vtophys.hh"
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#include "cpu/thread_context.hh"
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#include "arch/alpha/utility.hh"
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#if FULL_SYSTEM
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#include "arch/alpha/vtophys.hh"
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#include "mem/vport.hh"
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#endif
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using namespace SparcISA;
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Arguments::Data::~Data()
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namespace AlphaISA
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{
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while (!data.empty()) {
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delete [] data.front();
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data.pop_front();
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}
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}
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char *
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Arguments::Data::alloc(size_t size)
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uint64_t getArgument(ThreadContext *tc, int number, bool fp)
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{
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char *buf = new char[size];
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data.push_back(buf);
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return buf;
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}
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uint64_t
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Arguments::getArg(bool fp)
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{
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//The caller uses %o0-%05 for the first 6 arguments even if their floating
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//point. Double precision floating point values take two registers/args.
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//Quads, structs, and unions are passed as pointers. All arguments beyond
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//the sixth are passed on the stack past the 16 word window save area,
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//space for the struct/union return pointer, and space reserved for the
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//first 6 arguments which the caller may use but doesn't have to.
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if (number < 6) {
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return tc->readIntReg(8 + number);
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#if FULL_SYSTEM
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if (number < NumArgumentRegs) {
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if (fp)
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return tc->readFloatRegBits(ArgumentReg[number]);
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else
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return tc->readIntReg(ArgumentReg[number]);
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} else {
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Addr sp = tc->readIntReg(14);
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Addr sp = tc->readIntReg(StackPointerReg);
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VirtualPort *vp = tc->getVirtPort(tc);
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uint64_t arg = vp->read<uint64_t>(sp + 92 + (number-6) * sizeof(uint64_t));
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uint64_t arg = vp->read<uint64_t>(sp +
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(number-NumArgumentRegs) * sizeof(uint64_t));
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tc->delVirtPort(vp);
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return arg;
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}
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#else
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panic("getArgument() is Full system only\n");
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M5_DUMMY_RETURN
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#endif
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}
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} // namespace AlphaISA
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|
|
@ -42,6 +42,8 @@
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namespace AlphaISA
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{
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uint64_t getArgument(ThreadContext *tc, int number, bool fp);
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static inline bool
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inUserMode(ThreadContext *tc)
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{
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|
|
|
@ -48,6 +48,10 @@ class ThreadContext;
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namespace MipsISA {
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uint64_t getArgument(ThreadContext *tc, bool fp) {
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panic("getArgument() not implemented for MIPS\n");
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}
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//Floating Point Utility Functions
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uint64_t fpConvert(ConvertType cvt_type, double fp_val);
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double roundFP(double val, int digits);
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||||
|
|
|
@ -39,12 +39,12 @@ if env['TARGET_ISA'] == 'sparc':
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Source('miscregfile.cc')
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Source('regfile.cc')
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Source('remote_gdb.cc')
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Source('utility.cc')
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if env['FULL_SYSTEM']:
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SimObject('SparcSystem.py')
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SimObject('SparcTLB.py')
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Source('arguments.cc')
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Source('pagetable.cc')
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Source('stacktrace.cc')
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Source('system.cc')
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|
|
|
@ -1,149 +0,0 @@
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|||
/*
|
||||
* Copyright (c) 2003-2005 The Regents of The University of Michigan
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||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Nathan Binkert
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||||
*/
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#ifndef __ARCH_SPARC_ARGUMENTS_HH__
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#define __ARCH_SPARC_ARGUMENTS_HH__
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#include <assert.h>
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#include "base/refcnt.hh"
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#include "sim/host.hh"
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#include "mem/vport.hh"
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class ThreadContext;
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namespace SparcISA {
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class Arguments
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{
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protected:
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ThreadContext *tc;
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int number;
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uint64_t getArg(bool fp = false);
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||||
protected:
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class Data : public RefCounted
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{
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||||
public:
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Data(){}
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~Data();
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|
||||
private:
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||||
std::list<char *> data;
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||||
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||||
public:
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char *alloc(size_t size);
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||||
};
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RefCountingPtr<Data> data;
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public:
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Arguments(ThreadContext *ctx, int n = 0)
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: tc(ctx), number(n), data(NULL)
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{ assert(number >= 0); data = new Data;}
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Arguments(const Arguments &args)
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: tc(args.tc), number(args.number), data(args.data) {}
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~Arguments() {}
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ThreadContext *getThreadContext() const { return tc; }
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const Arguments &operator=(const Arguments &args) {
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tc = args.tc;
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number = args.number;
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data = args.data;
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||||
return *this;
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||||
}
|
||||
|
||||
Arguments &operator++() {
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||||
++number;
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assert(number >= 0);
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||||
return *this;
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||||
}
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||||
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||||
Arguments operator++(int) {
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Arguments args = *this;
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++number;
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assert(number >= 0);
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return args;
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}
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||||
Arguments &operator--() {
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--number;
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assert(number >= 0);
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return *this;
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||||
}
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|
||||
Arguments operator--(int) {
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Arguments args = *this;
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--number;
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assert(number >= 0);
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return args;
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}
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||||
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||||
const Arguments &operator+=(int index) {
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number += index;
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||||
assert(number >= 0);
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return *this;
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}
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||||
const Arguments &operator-=(int index) {
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number -= index;
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assert(number >= 0);
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return *this;
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||||
}
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||||
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||||
Arguments operator[](int index) {
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return Arguments(tc, index);
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||||
}
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||||
template <class T>
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operator T() {
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assert(sizeof(T) <= sizeof(uint64_t));
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T data = static_cast<T>(getArg());
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return data;
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}
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template <class T>
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operator T *() {
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T *buf = (T *)data->alloc(sizeof(T));
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CopyData(tc, buf, getArg(), sizeof(T));
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return buf;
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}
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||||
|
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operator char *() {
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char *buf = data->alloc(2048);
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CopyStringOut(tc, buf, getArg(), 2048);
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return buf;
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||||
}
|
||||
};
|
||||
|
||||
}; // namespace SparcISA
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||||
|
||||
#endif // __ARCH_SPARC_ARGUMENTS_HH__
|
64
src/arch/sparc/utility.cc
Normal file
64
src/arch/sparc/utility.cc
Normal file
|
@ -0,0 +1,64 @@
|
|||
/*
|
||||
* Copyright (c) 2003-2005 The Regents of The University of Michigan
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Gabe Black
|
||||
* Ali Saidi
|
||||
*/
|
||||
|
||||
#include "arch/sparc/utility.hh"
|
||||
#if FULL_SYSTEM
|
||||
#include "arch/sparc/vtophys.hh"
|
||||
#include "mem/vport.hh"
|
||||
#endif
|
||||
|
||||
namespace SparcISA {
|
||||
|
||||
|
||||
//The caller uses %o0-%05 for the first 6 arguments even if their floating
|
||||
//point. Double precision floating point values take two registers/args.
|
||||
//Quads, structs, and unions are passed as pointers. All arguments beyond
|
||||
//the sixth are passed on the stack past the 16 word window save area,
|
||||
//space for the struct/union return pointer, and space reserved for the
|
||||
//first 6 arguments which the caller may use but doesn't have to.
|
||||
uint64_t getArgument(ThreadContext *tc, int number, bool fp) {
|
||||
#if FULL_SYSTEM
|
||||
if (number < NumArgumentRegs) {
|
||||
return tc->readIntReg(ArgumentReg[number]);
|
||||
} else {
|
||||
Addr sp = tc->readIntReg(StackPointerReg);
|
||||
VirtualPort *vp = tc->getVirtPort(tc);
|
||||
uint64_t arg = vp->read<uint64_t>(sp + 92 +
|
||||
(number-NumArgumentRegs) * sizeof(uint64_t));
|
||||
tc->delVirtPort(vp);
|
||||
return arg;
|
||||
}
|
||||
#else
|
||||
panic("getArgument() only implemented for FULL_SYSTEM\n");
|
||||
M5_DUMMY_RETURN
|
||||
#endif
|
||||
}
|
||||
} //namespace SPARC_ISA
|
|
@ -41,6 +41,9 @@
|
|||
namespace SparcISA
|
||||
{
|
||||
|
||||
|
||||
uint64_t getArgument(ThreadContext *tc, int number, bool fp);
|
||||
|
||||
static inline bool
|
||||
inUserMode(ThreadContext *tc)
|
||||
{
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
* Ali Saidi
|
||||
*/
|
||||
|
||||
#include "arch/arguments.hh"
|
||||
#include "sim/arguments.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "cpu/thread_context.hh"
|
||||
#include "kern/linux/events.hh"
|
||||
|
@ -46,7 +46,7 @@ DebugPrintkEvent::process(ThreadContext *tc)
|
|||
{
|
||||
if (DTRACE(DebugPrintf)) {
|
||||
std::stringstream ss;
|
||||
TheISA::Arguments args(tc);
|
||||
Arguments args(tc);
|
||||
Printk(ss, args);
|
||||
StringWrap name(tc->getSystemPtr()->name() + ".dprintk");
|
||||
DPRINTFN("%s", ss.str());
|
||||
|
|
|
@ -32,7 +32,7 @@
|
|||
#include <sys/types.h>
|
||||
#include <algorithm>
|
||||
|
||||
#include "arch/arguments.hh"
|
||||
#include "sim/arguments.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "kern/linux/printk.hh"
|
||||
|
||||
|
@ -40,7 +40,7 @@ using namespace std;
|
|||
|
||||
|
||||
void
|
||||
Printk(stringstream &out, TheISA::Arguments args)
|
||||
Printk(stringstream &out, Arguments args)
|
||||
{
|
||||
char *p = (char *)args++;
|
||||
|
||||
|
|
|
@ -36,8 +36,8 @@
|
|||
|
||||
#include <sstream>
|
||||
|
||||
class TheISA::Arguments;
|
||||
class Arguments;
|
||||
|
||||
void Printk(std::stringstream &out, TheISA::Arguments args);
|
||||
void Printk(std::stringstream &out, Arguments args);
|
||||
|
||||
#endif // __PRINTK_HH__
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
#include "kern/tru64/mbuf.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "sim/system.hh"
|
||||
#include "arch/arguments.hh"
|
||||
#include "sim/arguments.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
#include "arch/vtophys.hh"
|
||||
|
||||
|
|
|
@ -31,10 +31,10 @@
|
|||
#ifndef __DUMP_MBUF_HH__
|
||||
#define __DUMP_MBUF_HH__
|
||||
|
||||
#include "arch/arguments.hh"
|
||||
#include "sim/arguments.hh"
|
||||
|
||||
namespace tru64 {
|
||||
void DumpMbuf(TheISA::Arguments args);
|
||||
void DumpMbuf(Arguments args);
|
||||
}
|
||||
|
||||
#endif // __DUMP_MBUF_HH__
|
||||
|
|
|
@ -31,18 +31,18 @@
|
|||
#include <sys/types.h>
|
||||
#include <algorithm>
|
||||
|
||||
#include "arch/vtophys.hh"
|
||||
#include "base/cprintf.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "arch/arguments.hh"
|
||||
#include "arch/vtophys.hh"
|
||||
#include "sim/arguments.hh"
|
||||
|
||||
using namespace std;
|
||||
|
||||
namespace tru64 {
|
||||
|
||||
void
|
||||
Printf(TheISA::Arguments args)
|
||||
Printf(Arguments args)
|
||||
{
|
||||
std::ostream &out = Trace::output();
|
||||
|
||||
|
|
|
@ -31,10 +31,10 @@
|
|||
#ifndef __PRINTF_HH__
|
||||
#define __PRINTF_HH__
|
||||
|
||||
#include "arch/arguments.hh"
|
||||
#include "sim/arguments.hh"
|
||||
|
||||
namespace tru64 {
|
||||
void Printf(TheISA::Arguments args);
|
||||
void Printf(Arguments args);
|
||||
}
|
||||
|
||||
#endif // __PRINTF_HH__
|
||||
|
|
|
@ -29,15 +29,15 @@
|
|||
* Lisa Hsu
|
||||
*/
|
||||
|
||||
#include "arch/alpha/ev5.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
#include "cpu/thread_context.hh"
|
||||
#include "cpu/base.hh"
|
||||
#include "kern/system_events.hh"
|
||||
#include "kern/tru64/tru64_events.hh"
|
||||
#include "kern/tru64/dump_mbuf.hh"
|
||||
#include "kern/tru64/printf.hh"
|
||||
#include "arch/alpha/ev5.hh"
|
||||
#include "arch/arguments.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
#include "sim/arguments.hh"
|
||||
#include "sim/system.hh"
|
||||
|
||||
using namespace TheISA;
|
||||
|
|
|
@ -50,6 +50,7 @@ Source('stat_control.cc')
|
|||
Source('system.cc')
|
||||
|
||||
if env['FULL_SYSTEM']:
|
||||
Source('arguments.cc')
|
||||
Source('pseudo_inst.cc')
|
||||
else:
|
||||
SimObject('Process.py')
|
||||
|
|
|
@ -28,12 +28,11 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
#include "arch/alpha/arguments.hh"
|
||||
#include "arch/alpha/vtophys.hh"
|
||||
#include "sim/arguments.hh"
|
||||
#include "arch/utility.hh"
|
||||
#include "cpu/thread_context.hh"
|
||||
#include "mem/vport.hh"
|
||||
|
||||
using namespace AlphaISA;
|
||||
using namespace TheISA;
|
||||
|
||||
Arguments::Data::~Data()
|
||||
{
|
||||
|
@ -54,17 +53,6 @@ Arguments::Data::alloc(size_t size)
|
|||
uint64_t
|
||||
Arguments::getArg(bool fp)
|
||||
{
|
||||
if (number < 6) {
|
||||
if (fp)
|
||||
return tc->readFloatRegBits(16 + number);
|
||||
else
|
||||
return tc->readIntReg(16 + number);
|
||||
} else {
|
||||
Addr sp = tc->readIntReg(30);
|
||||
VirtualPort *vp = tc->getVirtPort(tc);
|
||||
uint64_t arg = vp->read<uint64_t>(sp + (number-6) * sizeof(uint64_t));
|
||||
tc->delVirtPort(vp);
|
||||
return arg;
|
||||
}
|
||||
return TheISA::getArgument(tc, number, fp);
|
||||
}
|
||||
|
|
@ -28,20 +28,18 @@
|
|||
* Authors: Nathan Binkert
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ALPHA_ARGUMENTS_HH__
|
||||
#define __ARCH_ALPHA_ARGUMENTS_HH__
|
||||
#ifndef __SIM_ARGUMENTS_HH__
|
||||
#define __SIM_ARGUMENTS_HH__
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#include "arch/alpha/vtophys.hh"
|
||||
#include "arch/vtophys.hh"
|
||||
#include "base/refcnt.hh"
|
||||
#include "mem/vport.hh"
|
||||
#include "sim/host.hh"
|
||||
|
||||
class ThreadContext;
|
||||
|
||||
namespace AlphaISA {
|
||||
|
||||
class Arguments
|
||||
{
|
||||
protected:
|
||||
|
@ -82,6 +80,11 @@ class Arguments
|
|||
return *this;
|
||||
}
|
||||
|
||||
// for checking if an argument is NULL
|
||||
bool operator!() {
|
||||
return getArg() == 0;
|
||||
}
|
||||
|
||||
Arguments &operator++() {
|
||||
++number;
|
||||
assert(number >= 0);
|
||||
|
@ -145,6 +148,4 @@ class Arguments
|
|||
}
|
||||
};
|
||||
|
||||
}; // namespace AlphaISA
|
||||
|
||||
#endif // __ARCH_ALPHA_ARGUMENTS_HH__
|
||||
#endif // __SIM_ARGUMENTS_HH__
|
Loading…
Reference in a new issue