sanchayanmaity/gem5
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1440 commits

Author SHA1 Message Date
Gabe Black
0d6383b69e X86: Added some new versions of MOV and a new argument type tag. 
--HG--
extra : convert_revision : e21b2062d68baa983c7c631b3e1fe3149de56427
 2007-10-12 20:08:12 -07:00
Gabe Black
d82d3bbda5 X86: Implemented LODS. 
--HG--
extra : convert_revision : 4bd8f15bbc25f5dce16ea0504ad6dd21805fa56a
 2007-10-12 20:07:28 -07:00
Gabe Black
9498e536c0 X86: Implement MSR reads and writes and the wrsmr and rdmsr instructions. 
There are no priviledge checks, so these instructions will all work in all
modes.

--HG--
extra : convert_revision : ff893eb569313d8aecbfffb47bcbd1c2d65cd393
 2007-10-12 16:37:55 -07:00
Gabe Black
a76f734d0b X86: Get rid of BasicOperate format which wasn't used and referred to SparcStaticInst 
--HG--
extra : convert_revision : 5d2eac9a4b3f0fe5e3c3554d91acf8fee368c9dc
 2007-10-09 17:21:04 -07:00
Gabe Black
8ecea59092 X86: Get rid of stray Sparc DPRINTF 
--HG--
extra : convert_revision : d98b2d95448cab4e689d01ceedaa6ad46f9ffc09
 2007-10-09 17:20:23 -07:00
Gabe Black
8858b0b667 X86: Make x86 initialize more state. 
--HG--
extra : convert_revision : a55866efd339ae795da4072c070918bf419b07fa
 2007-10-07 18:20:51 -07:00
Gabe Black
a19c212757 X86: Work on the x86 tlb. 
--HG--
extra : convert_revision : a08a5cb049a6030ba9fd56a89383d56026238dbf
 2007-10-07 18:18:39 -07:00
Gabe Black
cd36c69a4d X86: Make faults maintain an error code which gets pushed on the stack. 
--HG--
extra : convert_revision : 7576f8cfaec9ddfb65e6ba7a6f64a5f453a42069
 2007-10-07 18:17:52 -07:00
Gabe Black
efbff349a9 X86: Significantly filled out misc regs. 
--HG--
extra : convert_revision : 4c53be6568134d65e57f5411df986fd9a89e82c9
 2007-10-07 18:16:00 -07:00
Gabe Black
999328f5ad X86: Make sure there are fewer spurious differences between instructions for caching purposes. 
--HG--
extra : convert_revision : 7e6be1c42f28f92d9e8b47169e683827bb3f4aaf
 2007-10-07 18:14:48 -07:00
Gabe Black
63a6d7376b X86: Make initCPU and startupCPU do something basic. 
--HG--
extra : convert_revision : 1a04f4402f4f31e4e5cd482c7983d853fe117df5
 2007-10-07 18:10:42 -07:00
Gabe Black
304e4c932a X86: Make the Interrupts class complain less. 
--HG--
extra : convert_revision : 81d9544e85c90139704ffe4a117983df4bfa3bcd
 2007-10-07 18:08:17 -07:00
Gabe Black
847a18ad48 X86: Adjust the config scripts for x86 fs. 
--HG--
extra : convert_revision : 36ed22b50066f54be0e51c3419babc07dd218e10
 2007-10-07 17:52:36 -07:00
Gabe Black
e540c37282 X86: Make an x86 system object. 
--HG--
extra : convert_revision : 590a4c29cb9b943a2d8c3a97c5fdfbabb658ac45
 2007-10-07 17:48:36 -07:00
Gabe Black
22196f8885 X86: X86 FS compile fix. 
--HG--
extra : convert_revision : bedd4cbab570d4ae84af9e8ead8f61db5c3c01dc
 2007-10-07 17:46:56 -07:00
Gabe Black
bd5a88ba43 Merge with head. 
--HG--
extra : convert_revision : aa1969b60044f8ed88e689bdd25eeded2b1105ec
 2007-10-04 12:35:35 -07:00
Gabe Black
e1516aefbb X86: Fix the PageShift constant in isa_traits.hh (I thought I alread did this?) 
--HG--
extra : convert_revision : bdc51a66e4fdf4b0a51b5c774ca7372a00a57269
 2007-10-04 12:34:29 -07:00
Gabe Black
2848ef6696 SPARC: Make software trap 3 flush the register windows like the ABI specifies. 
--HG--
extra : convert_revision : 8ff43617b56dcca5783d6cc490f87140fc20a36d
 2007-10-04 12:24:16 -07:00
Gabe Black
50e2d20cb8 Merge with head. 
--HG--
extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
 2007-10-02 23:03:38 -07:00
Gabe Black
c2d60abf52 X86: Distinguish between the rep and repe prefixes. 
STOS and MOVS only accept the rep prefix which always loops until rcx becomes
0. The other string instructions accept repe (same encoding as rep) and repne
which also check the condition code flags each iteration.

--HG--
extra : convert_revision : 544149f640302070810fb53e53bfeb0e87160ffc
 2007-10-02 23:02:18 -07:00
Gabe Black
504f90f763 X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging. 
--HG--
extra : convert_revision : 6072f7d9eecbaa066d39d6da7f0180ea4a2615af
 2007-10-02 23:00:37 -07:00
Gabe Black
f4a932a6b3 X86: Fix places where movfp was used incorrectly. 
--HG--
extra : convert_revision : a6b5688eaa53d2f6675df1be193726641e558d37
 2007-10-02 22:58:48 -07:00
Gabe Black
06d2d54b57 X86: Fix the movfp microop. 
--HG--
extra : convert_revision : 23829782a2802a97a05e4dfdb5dd38fbe4165a90
 2007-10-02 22:58:04 -07:00
Gabe Black
3e644b48bb X86: Fix x87 floating point stack register indexing. 
--HG--
extra : convert_revision : b515ec20cbfc50b38aa7da6cf4d465acf9054c08
 2007-10-02 22:57:33 -07:00
Gabe Black
a56c651980 Predecoder: Clear out predecoder state on an ITLB fault. 
--HG--
extra : convert_revision : 68f8ff778dbd28ade5070edf5a7d662e7bf0045a
 2007-10-02 22:21:38 -07:00
Gabe Black
4049c9f76a X86: Put ldst into the microcode (the earlier changeset didn't really). 
Also clean things up as much as possible so that faulting won't break an
instruction. More microops which verify addresses are needed.

--HG--
extra : convert_revision : 7c6050cb4798d287fe7d3cc4bb8c20dfa40ad2be
 2007-10-02 22:19:53 -07:00
Gabe Black
7c521db9de X86: Implement the ldst microop and put it in existing microcode where appropriate. 
--HG--
extra : convert_revision : f08bd725d07a501bb7a0ce91590b5d37db99c6f3
 2007-10-02 22:08:09 -07:00
Gabe Black
683d6d46f6 X86: Fix up the microcode for the FST and FSTP instructions. 
--HG--
extra : convert_revision : ad68633e9b7eab425593acb20cf242bf98c2b642
 2007-10-02 22:06:59 -07:00
Gabe Black
b831f7409b X86: Get rid of a hack for ruflag which is no longer necessary. 
--HG--
extra : convert_revision : 1bb60c9ddb483aead2af0201bbda938cc6d3f7cb
 2007-10-02 22:05:50 -07:00
Gabe Black
efb309525a X86: Allow logic instructions to set ECF as well as CF. 
--HG--
extra : convert_revision : 6ac20f069c86c23a8d443a7127afd6015166c00d
 2007-10-02 22:05:10 -07:00
Gabe Black
65c247f21f X86: Add classes for the actual x86 faults. 
--HG--
extra : convert_revision : bc060a01b5415551b335ca68ccbf126333ae20b0
 2007-10-02 22:04:20 -07:00
Gabe Black
7d78f1b41c X86: Hook in another version of the XCHG instruction. 
--HG--
extra : convert_revision : 7b6f9cd2f59443622f6963dfee454175322c0ef5
 2007-10-02 22:03:38 -07:00
Gabe Black
66a08f7ba4 X86: Implement MOVS 
--HG--
extra : convert_revision : 29147e1b86f7c54ce9b5ff68001725802c665fc0
 2007-10-02 22:02:58 -07:00
Gabe Black
fea7165b55 X86: Implement STOS. 
--HG--
extra : convert_revision : 95f3bf185f07fe644d6ab96bbb6e598e406b92f4
 2007-10-02 22:02:30 -07:00
Gabe Black
48041fdc53 SPARC,Remote GDB: Flesh out the acc function for SE mode. 
--HG--
extra : convert_revision : eada066ab64701b5c53e7351dfffbdc0e0d4f344
 2007-10-02 18:25:10 -07:00
Gabe Black
1c83418b14 SPARC,Remote GDB: Fix an accounting bug in the remote gdb stuff. 
--HG--
extra : convert_revision : f6f0986211c442ac94da315e344a8f54d4d58c8a
 2007-10-02 18:24:24 -07:00
Ali Saidi
d325f49b70 Rename cycles() function to ticks() 
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
 2007-09-28 13:21:52 -04:00
Gabe Black
2dd65dc254 Merge with head. 
--HG--
extra : convert_revision : f331b9cbd82086d63d4f35e18f9e08466c016225
 2007-09-25 20:11:41 -07:00
Gabe Black
25a9b6ea5e SPARC: Remove parameter that was only ever set to one value. 
--HG--
extra : convert_revision : 3c22e576d95bdc7566bbce9b92cf2a6ff153a66f
 2007-09-25 20:11:03 -07:00
Gabe Black
e735001d54 SPARC: Remove some redundant code from some of the fp instructions. 
--HG--
extra : convert_revision : 68b0341ae7a367b84c44081f9a3d6d0bc6631649
 2007-09-25 20:10:04 -07:00
Gabe Black
306b5c6b5b SPARC: Clean up of privileged instructions. 
--HG--
extra : convert_revision : 1fb055a7d186a3e9dff46f1c1b46bad6bcd00562
 2007-09-25 20:09:25 -07:00
Gabe Black
b896ad584b SPARC: Long overdue cleanup of the condition code handlers. 
--HG--
extra : convert_revision : ddc53a622a8f908fa48788f3b570f33fcfc25fff
 2007-09-25 20:08:34 -07:00
Gabe Black
8d53fea210 SPARC: Clean up the branch instructions a bit. 
--HG--
extra : convert_revision : 93d5cc68e4a327ee0492eeed7f3b56e98d2d83bb
 2007-09-25 20:05:11 -07:00
Gabe Black
b3c6f32543 X86: Fix for uninitialized variables in stacktrace code. 
--HG--
extra : convert_revision : d19a03d8c14eb93a99f2c1838a9caa1286804c81
 2007-09-25 14:44:12 -07:00
Gabe Black
418ddf43e6 X86: Get X86_FS to compile. 
--HG--
extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
 2007-09-24 17:39:56 -07:00
Gabe Black
dd277e0d8f SPARC: Fix linking error from new flattenFloatIndex function. 
--HG--
extra : convert_revision : 5260f33336e3a9d5e3592b784458e243157f17e3
 2007-09-19 19:08:42 -07:00
Gabe Black
3cd95a2748 X86: Implement the fld, fst, and fstp instructions. 
--HG--
extra : convert_revision : 7dd274bdc3c34839c17d9012a745d7c95dfcfdd8
 2007-09-19 18:28:34 -07:00
Gabe Black
a75b6f5106 X86: Move the fp microops to their own file with their own base classes in C++ and python. 
--HG--
extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
 2007-09-19 18:27:55 -07:00
Gabe Black
f3f3747431 X86: Put in the foundation for x87 stack based fp registers. 
--HG--
extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
 2007-09-19 18:26:42 -07:00
Gabe Black
a54ae9f92b X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode. 
--HG--
rename : src/arch/x86/isa/insts/sse/__init__.py => src/arch/x86/isa/insts/simd128/__init__.py
extra : convert_revision : efb4405aebaa4a04f33572e7d078ceca45872d9c
 2007-09-19 18:25:17 -07:00
Gabe Black
a1912df360 X86: Enable the rename system call. 
--HG--
extra : convert_revision : bc4a3b5b5ce8e17f632e65ce89df91e2b50e1274
 2007-09-19 18:24:11 -07:00
Gabe Black
bdc0261eb5 X86: Enable the unlink system call. 
--HG--
extra : convert_revision : 4230a13fdb652a87271f8d2ac9ead96cd2af07a5
 2007-09-19 18:23:35 -07:00
Gabe Black
4a4aa59632 Merge with head. 
--HG--
extra : convert_revision : 22aafb1cead3f584e64c188dc8eb45e271f4e7e9
 2007-09-13 16:36:25 -07:00
Gabe Black
bbc8a40857 X86: Fix how ECF is computed in genFlags, and get rid of some duplicate code. 
--HG--
extra : convert_revision : f86330a5a9fea782ee63aaa18ca964fb6f9cef0b
 2007-09-13 16:35:41 -07:00
Gabe Black
534c6a800a X86: Make the shift and rotate instructions set the carry flag(s) and overflow flags like they're supposed to. 
--HG--
extra : convert_revision : c0523a5bbf53375ce979ca7d98a95e465be66fbe
 2007-09-13 16:35:20 -07:00
Gabe Black
f7b6230d99 X86: Total overhaul of the division instructions and microops. 
--HG--
extra : convert_revision : 303ea45f69f7805361ad877fe6bb43fbc3dfd7a6
 2007-09-13 16:34:46 -07:00
Ali Saidi
e282d9601c Syscall Emulation: Add stat64 syscall. 
Patch submitted by: Jonas Diemer [diemer (a) ida.ing.tu-bs.de]

--HG--
extra : convert_revision : 07638c05bb3f79aacce49457bbb8c17d0a3a7238
 2007-09-13 12:30:12 -04:00
Gabe Black
0f57b407a3 X86: Make the isa parser run if any of the microcode files change. 
--HG--
extra : convert_revision : 7f6d07de7e0d728a9333fb46c953dbe6cb04e600
 2007-09-10 16:49:07 -07:00
Gabe Black
8e7bca8b36 X86: Move a comment to be next to the code it describes. 
--HG--
extra : convert_revision : c384391175babb7cfdd3885ae9d9f1a9405ea44f
 2007-09-10 11:01:52 -07:00
Gabe Black
e4c0171356 X86: Rework the multiplication microops so that they work like they would in the patent. 
--HG--
extra : convert_revision : 6fcf5dee440288d8bf92f6c5c2f97ef019975536
 2007-09-06 16:27:28 -07:00
Gabe Black
7f079149f1 X86: Make signed multiplication do something different from unsigned. 
--HG--
extra : convert_revision : 333c4a3464d708d4d8cea88931259ab96c2f75ed
 2007-09-06 16:25:29 -07:00
Gabe Black
5052e2cb10 X86: Make signed versions of partial register values available to microops. 
--HG--
extra : convert_revision : c820d1250f505911a341ced42d4f73796ea77f87
 2007-09-06 16:22:08 -07:00
Gabe Black
832ef7412b X86: Correct how the hi portion of a product is computed. 
--HG--
extra : convert_revision : 1f503e1cae0374e62e6254e8073e903adc29d067
 2007-09-06 16:20:12 -07:00
Gabe Black
389abade01 X86: Add a square root microop and the SSE sqrt instruction. 
--HG--
extra : convert_revision : ddc6e7e95111189d43f75bf84cd3d82433d982b3
 2007-09-06 16:18:34 -07:00
Gabe Black
4478487c37 X86: Add SSE comparison instructions and microops and move some FP microops to be with the other ones. 
--HG--
extra : convert_revision : ee0b5acde08d12c51a5282efb58d1ac72e0779af
 2007-09-06 16:09:28 -07:00
Gabe Black
fea46ee6e3 X86: Implement an SSE xor microop and instruction. 
--HG--
extra : convert_revision : 949737d0f5d6fe4aa77cc4680d0c88caab3e8174
 2007-09-04 23:44:37 -07:00
Gabe Black
6c689a3b4b X86: Make the movfp microop use FloatRegBits instead of FloatRegs. 
This fixes a problem where interpreting arbitrary bits as floating point would
change what the value was. These values are legitimate because the fp
registers could be used to move around arbitrary data.

--HG--
extra : convert_revision : f1d7159ba137702b5722cc7c1b64ed7dd06c21de
 2007-09-04 23:42:55 -07:00
Gabe Black
26ba7cc3b2 X86: Add tracing to the floating point register file. 
--HG--
extra : convert_revision : f452d9179b929b980cf9e2d1e3de0431c51c5f4a
 2007-09-04 23:40:47 -07:00
Gabe Black
760240176a X86: Hook in the fp arithmetic instructions. Stale python made it work before. 
--HG--
extra : convert_revision : af27f26ae810ebaae13faa572c5b4eb074620d91
 2007-09-04 23:38:34 -07:00
Gabe Black
d2fc4ee625 X86: Implement some SSE fp microops and instructions. 
--HG--
extra : convert_revision : 7e0595ef542fbfb701bfac7e9ac4648349a92b26
 2007-09-04 23:33:50 -07:00
Gabe Black
8e3b199cb8 X86: Add some SSE floating point/integer conversion microops. 
--HG--
extra : convert_revision : 2a1aa16709db940f5f40bbd84ca082f26b03b9c5
 2007-09-04 23:32:18 -07:00
Gabe Black
af4c04c426 X86: Add floating point micro registers. 
--HG--
extra : convert_revision : 442a5f8b9216638e4e6898f89eacb8695719e20f
 2007-09-04 23:31:40 -07:00
Gabe Black
310912cf2c X86: Fix a typo in the microassembly for the cqo instruction. 
--HG--
extra : convert_revision : ddf739e591e4414ade37b806a88f3c11292627e2
 2007-09-04 23:23:51 -07:00
Gabe Black
aaee21afdb X86: Implement idiv and propogate the mul corner case fix. 
--HG--
extra : convert_revision : 348aa081067728afa14dc5b609fc7e26dbc5fad5
 2007-09-04 23:23:13 -07:00
Gabe Black
b0b4038ee9 X86: Fix a corner case where mul would overwrite an original register value it still needed. 
--HG--
extra : convert_revision : 86ee0e2bf716d52c34ee731727d6366935f103ed
 2007-09-04 23:22:08 -07:00
Gabe Black
e1e7605213 X86: Add in a file with floating point indexing which -should- have been in an earlier changeset. 
--HG--
extra : convert_revision : bf05f81df5e5b1de1ecd8ab7a6ef751922418987
 2007-09-04 23:21:41 -07:00
Gabe Black
9da070ce8a X86: Major rework of how regop microops are generated. 
The new implementation uses metaclass, and gives a lot more precise control
with a lot less verbosity. The flags/no flags reg/imm variants are all handled
by the same python class now which supplies a constructor to the right C++
class based on context.

--HG--
extra : convert_revision : 712e3ec6de7a5a038da083f79635fd7a687d56e5
 2007-08-31 22:28:07 -07:00
Gabe Black
9277545ba6 Microassembler: Pass the actual mnemonic used to the macroop add_micro function 
--HG--
extra : convert_revision : acaee747ab30747d602c1f4ac5f0c2b2573a2a9b
 2007-08-31 22:26:02 -07:00
Gabe Black
941675690c X86: Get x86 to compile again after the simobject constructor change. 
--HG--
extra : convert_revision : 17a3e16e849bee88892223f0c993b19c15daa554
 2007-08-31 13:02:58 -07:00
Miles Kaufmann
54cc0053f0 params: Deprecate old-style constructors; update most SimObject constructors. 
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
 2007-08-30 15:16:59 -04:00
Gabe Black
f67cd04673 X86: Fix the sra microop to get the sign bit from the right operand. 
--HG--
extra : convert_revision : 71e58dd6dd6918ee403f2e332c47e29acdace464
 2007-08-29 20:39:41 -07:00
Gabe Black
c1a776de8a X86: Implement the movaps instruction. 
--HG--
extra : convert_revision : 2aeb1c05205f8ea8f7484e8bacf3fbbc581defd2
 2007-08-29 20:38:22 -07:00
Gabe Black
3da3190f07 X86: Implement the movsd instruction. 
--HG--
extra : convert_revision : a5a73e0ddd39144d2aeeb9cc6a299516752fd4c2
 2007-08-29 20:37:44 -07:00
Gabe Black
f0b20ff970 X86: Implement the movlpd instruction. 
--HG--
extra : convert_revision : dddb20fe48c0ae9de7cd0ba1a1467ecb690056c1
 2007-08-29 20:37:16 -07:00
Gabe Black
3b97b6e0e2 X86: Add an fp move microop. 
--HG--
extra : convert_revision : a9d6d3568cd2c6a65df91bf56ee1e43523f04630
 2007-08-29 20:36:44 -07:00
Gabe Black
22830c0747 X86: Add load and store microops that use the fp registers. 
--HG--
extra : convert_revision : 153a055e888d8c47d59758a599dbd38f63008137
 2007-08-29 20:36:12 -07:00
Gabe Black
34f3c9d196 X86: Add operands to handle floating point registers. 
--HG--
extra : convert_revision : 2e8289dbd3f5dda1221014d4ed0e9450f60de0cf
 2007-08-29 20:35:30 -07:00
Gabe Black
bc3635a110 X86: Flesh out register indexing constants. 
--HG--
extra : convert_revision : 56eedc076bbb7962c3976599a15ed93c7cb154c0
 2007-08-29 20:34:52 -07:00
Gabe Black
6204d00940 X86: Make the fp accessors not panic. 
--HG--
extra : convert_revision : c6d08863049a3f8755c53e1f49ce19ad6a2dedc7
 2007-08-29 20:34:00 -07:00
Gabe Black
61b1c53a2a X86: Make x86 syscall return just stuff the return value in eax. 
--HG--
extra : convert_revision : 800d8a2398d5750c03c642264577c9c772684266
 2007-08-29 20:29:18 -07:00
Gabe Black
c593cfbdeb X86: More two byte opcode decoding. I missed two groups in the last changeset. 
--HG--
extra : convert_revision : 1a2813b2e7d3e0e02c8f1474f372de5cf16e7d7b
 2007-08-28 19:36:51 -07:00
Gabe Black
fbab5c9bd3 X86: Hook in an implementation for lseek. 
--HG--
extra : convert_revision : d2424e73fa8ce56248c4edbda9db2714c4b0a92e
 2007-08-28 17:34:15 -07:00
Gabe Black
37f1ff95e0 X86: More fully decode two byte opcodes. 
This includes the most of the SSE stuff, but not some of the "groups" of
instructions.

--HG--
extra : convert_revision : 4725c34f3d73971ae1763611685c5877b6c51412
 2007-08-28 17:18:13 -07:00
Gabe Black
a3367adaff Address translation: De-templatize the GenericTLB class. 
--HG--
extra : convert_revision : b605a90a4a1071e39f49085a839fdcd175e09fdb
 2007-08-28 14:30:50 -07:00
Gabe Black
703d10705c Alpha: Fixes to get alpha to compile again. 
--HG--
extra : convert_revision : 9541cf6dae1fb1a1c6025898692b2e04fcf55c6d
 2007-08-27 18:30:02 -07:00
Gabe Black
8253ff2ba9 MIPS: Fixes to get mips to compile. 
--HG--
extra : convert_revision : 23561eda853a51046ae56c23a88466230c3e83f2
 2007-08-27 18:29:15 -07:00
Gabe Black
25ad253643 SPARC: Fixes to get SPARC to compile again. 
--HG--
extra : convert_revision : dab20c49fec9c2d385ca59b9ab627c2d3dddfe76
 2007-08-27 18:26:36 -07:00
Gabe Black
8d1c7a83d7 X86: Make the Ruflag microop work correctly, and make the code a little clearer. 
--HG--
extra : convert_revision : c551f51cdda46df99370363ed2d70916db8413eb
 2007-08-26 20:41:36 -07:00
Gabe Black
ac5ec1542e X86: Return values for some cpuid functions that match what my development machine returns. 
--HG--
extra : convert_revision : e6619da11f43bbe025ceabd06387dd24e1cd883b
 2007-08-26 20:40:42 -07:00
Gabe Black
8b738f7f12 X86: Make the microassembler accept lines which are just labels. 
The labels on these lines will be associated with whatever the next microop
is.

--HG--
extra : convert_revision : 80c260e48ec1c16e6325061608e37c95a0610cfa
 2007-08-26 20:39:55 -07:00
Gabe Black
03880cf828 X86: Make cpuid actually consider the eax parameter and return different values. 
--HG--
extra : convert_revision : 527c1cacdd20ab162859bba7f9a6bed33afa2d4f
 2007-08-26 20:38:42 -07:00
Gabe Black
9c99f5f825 X86: Fix the sign extension microop so it extends zeros correctly. 
--HG--
extra : convert_revision : 9d7ca286ba7709175fa75226320601acce4ced98
 2007-08-26 20:37:41 -07:00
Gabe Black
506bf83595 X86: Implement cmps (string compare) 
--HG--
extra : convert_revision : 0d6b783b2246b8ad8d91e4c63e407307ee11c651
 2007-08-26 20:36:46 -07:00
Gabe Black
00d9036c62 X86: Make shift instructions set some of the flags they're supposed to. 
The flag mechanism for microops needs to be fleshd out a little more to allow
for custom flag calculation methods for certain microops. Shift is an example
where the rules for calculating OF and CF are unique.

--HG--
extra : convert_revision : 91981a00c1efd05db702fffa9cea51f912583013
 2007-08-26 20:35:48 -07:00
Gabe Black
9b49a78cfd Address translation: Make the page table more flexible. 
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
 2007-08-26 20:33:57 -07:00
Gabe Black
fcd04f953c X86: Remove x86 code that attempted to fix misaligned accesses. 
--HG--
extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
 2007-08-26 20:30:36 -07:00
Gabe Black
537239b278 Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
 2007-08-26 20:24:18 -07:00
Gabe Black
f738afb865 SPARC: Make sure unaligned access are caught on cached translations as well. 
--HG--
extra : convert_revision : 5c1f3f585817a19a771164f809dfc2fdc1ab3fb2
 2007-08-26 20:15:29 -07:00
Gabe Black
ca84d953b9 SPARC: Make nops have the IsNop flag set. 
In O3, a nop is used to carry faults down the pipeline that didn't originate
from an instruction. If the instruction doesn't do anything, that is just
returns NoFault, but doesn't have IsNop set, the NoFault will overwrite the
fault that's being sent down and nothing will happen.

--HG--
extra : convert_revision : 54d99002b550ca0e1cf14603f588dc1038e3e535
 2007-08-13 16:11:27 -07:00
Gabe Black
e99c56f971 SPARC: Move tlb state into the tlb. 
Each "strand" may need to have a private copy of this state, but I couldn't
find anywhere in the spec that said that after looking briefly.
This prevents writes to the thread context in o3 which was causing the
pipeline to be flushed and stopping any forward progress. The other ASI
accessible state will probably need to be accessed differently if/when we get
O3 full system up and running.

--HG--
extra : convert_revision : fa7fba812d7f76564ef4a23818e60f536710d557
 2007-08-13 16:06:50 -07:00
Gabe Black
26853e11c0 SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault ASI accesses work. 
--HG--
extra : convert_revision : 3321bb91da02c1bec27fa34d0ba945cc976b6491
 2007-08-13 16:02:47 -07:00
Vincentius Robby
1caed14654 alpha: Quick fix for things related to TLB MRU cache. 
simple-timing test for ALPHA_FS breaks.

--HG--
extra : convert_revision : 5a1b05cddd480849913da81a3b3931fec16485a8
 2007-08-08 18:38:19 -04:00
Vincentius Robby
13d10e844c alpha: Make the TLB cache to actually work. 
Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
 2007-08-08 14:18:09 -04:00
Gabe Black
ef32494e72 Alpha: Fix an off by one error with the tlb caching mechanism. 
--HG--
extra : convert_revision : e17f7a0d58a2e59b2e270f0827db33d0a29365e0
 2007-08-07 21:51:12 -07:00
Gabe Black
0fd999ca40 Merge with head. 
--HG--
extra : convert_revision : ae7b3df573368c29a66d5b027ecad9ffb3a99104
 2007-08-07 15:31:36 -07:00
Gabe Black
cd3f0646ca X86: Added some missing parenthesis in the condition code calculation function. 
--HG--
extra : convert_revision : 663021070a4bcc795bb44e1839b8bcec686a42f0
 2007-08-07 15:26:50 -07:00
Gabe Black
24541780c6 X86: Implemented and hooked in SCAS (scan string) 
Fixed the asz assembler symbol.
Adjusted the condion checks to have appropriate options.
Implemented the SCAS microcode.
Attached SCAS into the decoder.

--HG--
extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
 2007-08-07 15:25:41 -07:00
Gabe Black
d79a591608 X86: Add a format to handle string instructions which can use the repe and repne prefixes. 
--HG--
extra : convert_revision : 205fbbb947258bc0ef2915e22d5b32a3df1a1ce2
 2007-08-07 15:23:01 -07:00
Gabe Black
60c61cb2b1 X86: Overhaul of ruflags to get it to work correctly. 
--HG--
extra : convert_revision : 00a36a80a1945806aac9fa7d9d6a3906465dcad2
 2007-08-07 15:21:13 -07:00
Gabe Black
fb6cdf09cb X86: Make a microcode branch microop. 
Also some touch up for ruflag.

--HG--
extra : convert_revision : 829947169af25ca6573f53b9430707101c75cc23
 2007-08-07 15:19:26 -07:00
Gabe Black
cae8d20633 Merge with head. 
--HG--
extra : convert_revision : 3edb9f03353b18b4c9f062bccf11e79cfb3c15f2
 2007-08-04 20:27:23 -07:00
Gabe Black
30e777a5d3 X86: Implement microops and instructions that manipulate the flags register. 
--HG--
extra : convert_revision : 566841577bf4a98cac0b65292fe0f7daf89a9203
 2007-08-04 20:24:18 -07:00
Gabe Black
802f13e6bd X86: Make 64 bit unaligned accesses work as well as the other sizes. 
There is a fundemental flaw in how unaligned accesses are supported, but this
is still an improvement.

--HG--
extra : convert_revision : 1c20b524ac24cd4a812c876b067495ee6a7ae29f
 2007-08-04 20:22:20 -07:00
Gabe Black
b9793c2506 X86: Make the open flags correct. 
--HG--
extra : convert_revision : 2dc81345176d1de247a567d1f748e2b2bd05f829
 2007-08-04 20:18:20 -07:00
Gabe Black
fc6b2cceb4 X86: Make fixed register operands ignore register index extensions from the REX prefix. 
The only cases where this was the correct behavior are now handled with the
"B" operand type, and doing things this way was breaking some instructions,
notably a shift.

--HG--
extra : convert_revision : 072346d4f541edaceba7aecc26ba8d2cd756e481
 2007-08-04 20:17:31 -07:00
Gabe Black
6f3bb03a3f X86: Implement the cmpxchg instruction. 
--HG--
extra : convert_revision : b9e172bcb9551edf65c63f26dfa07d771edf3e1e
 2007-08-04 20:15:27 -07:00
Gabe Black
e410a925df X86: Start implementing segmentation support. 
Make instructions observe segment prefixes, default segment rules, segment
base addresses.
Also fix some microcode and add sib and riprel "keywords" to the x86
specialization of the microassembler.

--HG--
extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
 2007-08-04 20:12:54 -07:00
Gabe Black
ced6cbcccf X86: Create a base enum value for indexing into a region of the miscregs. 
This lets you index into a group of registers without having to know
explicitly which one is the lowest in that group.

--HG--
extra : convert_revision : e3cad25a1c5910955204c37177b049ca9834cfd9
 2007-08-04 20:07:42 -07:00
Gabe Black
0e6be2a9b1 X86: Add the arch_prctl system call and fix up some microcoding. 
The arch_prctl system call is used to set and get the FS and GS segment
bases. The FS segment is use for TLS, so glibc needs to be able to set it
up.

--HG--
extra : convert_revision : 79501491a15967a7a862add846ff88a934fb1b37
 2007-08-04 20:02:41 -07:00
Vincentius Robby
2898d76827 alpha: Implement a cache for recently used page table entries 
--HG--
extra : convert_revision : 1bb80d71fa91e500a68390e5dc17464ce7136fba
 2007-08-04 14:25:35 -04:00
Steve Reinhardt
3afc625975 merge from head 
--HG--
extra : convert_revision : 21f7afe2719c00744c0981212c1ee6e442238e01
 2007-08-03 03:51:30 -04:00
Gabe Black
f4b89cd897 X86: Get rid of some debug warnings. 
Get rid of some warnings that were accidentally committed.

--HG--
extra : convert_revision : e800dbce253f6ba759932ca47d64bf98129e4177
 2007-08-02 16:28:01 -07:00
Gabe Black
fa9e4d110a Merge with head. 
--HG--
extra : convert_revision : 7700f475caa676948175cdf126ee018b0c4ad35c
 2007-08-02 15:14:36 -07:00
Gabe Black
4af5740afd X86: Finally get the x86 initial stack frame right. 
After very carefully reading through the Linux source, I'm pretty confident I now know -exactly- how the initial stack frame is constructed, filled, and aligned.

--HG--
extra : convert_revision : 3c654ade7e458bdd5445026860f11175f383a65f
 2007-08-02 15:12:18 -07:00
Gabe Black
85b661e35d X86: Fix special case with SIB index register and REX prefix. 
--HG--
extra : convert_revision : b305708a722f2a08cb55c4548c5616fcbe6c5d68
 2007-08-02 15:09:12 -07:00
Ali Saidi
31a9114a3d merge, no manual changes 
--HG--
extra : convert_revision : 8504bddf1f73a4186cebc03c3e52e42ea38361fc
 2007-08-02 15:38:06 -04:00
Ali Saidi
acb91c2dfa Linux Support: make sure that when we get the stack page for thread info we're doing a 64bit not 
--HG--
extra : convert_revision : c581921dd601fc72fd2d45b961c7440755b0331c
 2007-08-02 14:34:58 -04:00
Gabe Black
e719a3e4c0 Fix how the "cmd" parameter is set in se.py and remove hack in x86 process initialization code. 
--HG--
extra : convert_revision : 1fc741eea956ebfa4cef488eef4333d1f50617a6
 2007-08-01 18:19:23 -07:00
Nathan Binkert
f20ba92a76 merge: mips fix to getArgument 
--HG--
extra : convert_revision : 0e97c80ca9bdd354f537bf5d036e024da0081306
 2007-08-01 16:58:22 -07:00
Nathan Binkert
a3e70f4957 mips: make getArgument inline so mips will link properly 
--HG--
extra : convert_revision : 7fdbf1f35a5fcbd8704bf02aafcb3ea069626ce3
 2007-08-01 16:57:29 -07:00
Gabe Black
baa1182513 Merge with head. 
--HG--
extra : convert_revision : 646d559a10706521b1918d2378d0f99ab5255c77
 2007-08-01 16:00:33 -07:00
Gabe Black
458dfc8b3e Merge with head. 
--HG--
extra : convert_revision : f677debfd636d79bc5097eb45331601d3253743d
 2007-08-01 15:54:25 -07:00
Gabe Black
c032a535ab MIPS: Files which are needed for the MIPS fix. 
--HG--
extra : convert_revision : ae710fa8e4e9f57c19cd7277b1b59efd0af40b6a
 2007-08-01 15:53:39 -07:00
Gabe Black
8da3e0548e Merge with head. 
--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b
 2007-08-01 15:12:07 -07:00
Gabe Black
5b5e2fd6cd X86: Hide the irrelevant portions of the address components for load and store microops. 
--HG--
extra : convert_revision : a5ac6fefa09882f0833537e23f1ac0477bc89bb9
 2007-08-01 14:34:59 -07:00
Ali Saidi
84cd78e96f Merge Gabe and my changes to arch/mips/utility.hh 
--HG--
extra : convert_revision : d5a9d74ee6edf71524ba5c03fb7f054cf9722213
 2007-08-01 17:05:03 -04:00
Ali Saidi
fae60c164e Arguments: Get rid of duplicate code for the Arguments class in each architecture. 
Move the argument files to src/sim and add a utility.cc file with a function
getArguments() that returns the given argument in the architecture specific fashion.
getArguments() was getArg() is the architecture specific Argument class and has had
all magic numbers replaced with meaningful constants. Also add a function to the
Argument class for testing if an argument is NULL.

--HG--
rename : src/arch/alpha/arguments.cc => src/sim/arguments.cc
rename : src/arch/alpha/arguments.hh => src/sim/arguments.hh
extra : convert_revision : 8b93667bafaa03b52aadb64d669adfe835266b8e
 2007-08-01 16:59:14 -04:00
Gabe Black
239d124e83 MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc 
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.

--HG--
extra : convert_revision : 66ef7762024b72bb91147a5589a0779e279521e0
 2007-08-01 13:55:47 -07:00
Gabe Black
e5e5b0119d X86: Fix for compilation bug with new cache code. 
--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
 2007-08-01 12:49:58 -07:00
Gabe Black
4b29d22386 X86: Get rid of initialization of R11 
R11 is just junk after the start of exectuion because we're "returning" from
an execve call and linux destroys the contents of rcx and r11 on system calls.

--HG--
extra : convert_revision : 6bf69a50ce56e0355dfdd41524163874340beec0
 2007-08-01 12:00:32 -07:00
Gabe Black
4bdabe1254 Add a flag to indicate an instruction triggers a syscall in SE mode. 
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
 2007-07-31 17:34:08 -07:00
Gabe Black
55ade789d3 X86: Add operand type information to the fnstcw and fldw instruction placeholders. 
These are the only floating point instructions that get used in my simple hello world test. These instructions are for setting up the floating point control register. Their not being implemented doesn't affect anything because floating point isn't used.

--HG--
extra : convert_revision : 4dfb9ef2a5665f034946c504978029e8799e64cd
 2007-07-31 14:55:06 -07:00
Steve Reinhardt
c4c8a12186 Merge from head. 
--HG--
extra : convert_revision : af16bc685ea28e44b8120f16b72f60a21d68c1e2
 2007-07-31 00:37:07 -04:00
Gabe Black
ae3e1d22fc X86: Add decoding for x87 floating point. 
--HG--
extra : convert_revision : 08f0f4a3d77a2c5eb9b5ca0cae7d0be9a72febec
 2007-07-30 17:54:01 -07:00
Gabe Black
463e8a7516 X86: Attach the "DIV" instruction implementation to the decoder. 
--HG--
extra : convert_revision : 8aef1c8d1ced2db998ed0d31241cadc17e19eadd
 2007-07-30 15:44:48 -07:00
Gabe Black
595ff465e5 X86: Remove a naming conflict between the register index parameters and the "picked" register values. 
--HG--
extra : convert_revision : 7b2c1be509478153ebf396841e4cbeccee3e03d1
 2007-07-30 15:44:21 -07:00
Gabe Black
77482dc439 X86: __pad0 should be a 4 byte pad, not a 4 long array of 4 byte pads. 
--HG--
extra : convert_revision : e0d5ab617bc95d5d714fa9fcdf0a448874aef886
 2007-07-30 15:43:20 -07:00
Gabe Black
f02bb63894 X86: Turn on the exit_group, exit, munmap, and write syscalls. 
--HG--
extra : convert_revision : e358c18cd999a8e274108e06502c3324c2d12d3b
 2007-07-30 15:42:42 -07:00
Gabe Black
43f0be5253 X86: Use an mmap base address that matches what an actual machine uses. 
--HG--
extra : convert_revision : 98521797bbc6360301b3c6a6b1b8e28236ef570e
 2007-07-30 15:42:04 -07:00
Gabe Black
890e583163 X86: Set up RIP relative LEA instructions operands correctly. 
--HG--
extra : convert_revision : 820cafadd550487c0d62c5082261b0886fce4f0d
 2007-07-30 15:41:08 -07:00
Gabe Black
44c3419e1a X86: Implement unsigned divide. The non-byte version ignores rdx which it shouldn't. 
--HG--
extra : convert_revision : 07e5509fb8ed9d73c144d6f52951ebc02e7c0032
 2007-07-30 15:40:39 -07:00
Gabe Black
74fcf117dd X86: Allow RIP relative decode on -all- memory forms of operands. 
--HG--
extra : convert_revision : 8af62cda2ce1c4acfa26a028a4f7506647bc27f7
 2007-07-30 15:39:25 -07:00
Gabe Black
65db30992c X86: Take into account the regular registers and the microcode registers when decided whether or not to fold. 
--HG--
extra : convert_revision : 26feec984dec61799c4afb03a4503a53c35872c5
 2007-07-30 15:38:40 -07:00
Gabe Black
9536120845 X86: Fix up the stat structure. This probably still isn't right. 
--HG--
extra : convert_revision : 2e2a22cdf3abe648c9e1309b9070cfd10fc4a8b8
 2007-07-30 13:31:59 -07:00
Gabe Black
a1b193f026 X86: Hook in the new instructions. 
--HG--
extra : convert_revision : c4233001b35b52161083482841593ec28da6ff7d
 2007-07-30 13:31:27 -07:00
Gabe Black
ab8ba813c9 X86: Turn on some system calls, and make the kernel version match my development machine. 
--HG--
extra : convert_revision : 2f1969a45aa82708dc4cddef09c01306f76f0a81
 2007-07-30 13:30:41 -07:00
Gabe Black
9e2b1f8630 X86: Make sure FP_Base_DepTag is big enough to avoid trouble. 
--HG--
extra : convert_revision : 7e0a83d5deb7fc9aaa69b7d024ea6ae6890df133
 2007-07-30 13:29:56 -07:00
Gabe Black
18be07289f X86: Implement a stub CPUID function which is hardcode to return certain values. 
--HG--
extra : convert_revision : 4085e04fd13e834646106faa55726d07d9631f42
 2007-07-30 13:29:33 -07:00
Gabe Black
dbc979b9e2 X86: Force jumps to use 64 bit operand size. 
--HG--
extra : convert_revision : 1c3685e7f4d07d5b4ded6c78b794964f51a358a9
 2007-07-30 13:28:31 -07:00
Gabe Black
bae96272a1 X86: Make instructions use pick, and implement/adjust some multiplication microops and instructions. 
--HG--
extra : convert_revision : 5c56f6819ee07d936b388b3d1810a3b73db84f9c
 2007-07-30 13:28:05 -07:00
Gabe Black
fad96cd0fc X86: Make merge and pick work with high bytes. Fix a sizing issue in pick. 
--HG--
extra : convert_revision : 4ddc2ca8c23bb7e90a646329ebf27a013ac5e3d6
 2007-07-30 13:26:48 -07:00
Gabe Black
0d31a41304 X86: Make register names in disassembly reflect high bytes. 
--HG--
extra : convert_revision : e2891581e5504de0a2c8e5932fd22425cafd4fc7
 2007-07-30 13:26:14 -07:00
Gabe Black
31a862b8f1 X86: missed a file which adds a "fold" bit. 
--HG--
extra : convert_revision : 2c8eea425221d069a9bb888c8f18839843061899
 2007-07-30 13:25:38 -07:00
Gabe Black
da84aa95a9 Make the register indices use the appropriate "fold" bit. 
--HG--
extra : convert_revision : 89e15e2ef1f709f2c09238b78f94505ce8ef146d
 2007-07-30 13:25:00 -07:00
Gabe Black
d8beeff324 X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded". 
--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
 2007-07-30 13:23:33 -07:00
Gabe Black
9b5421dcba X86: Missed a file for adding a bit to indicate that an REX prefix was present. 
--HG--
extra : convert_revision : f1bbd5165a7415d0daf27660575d30c41510f531
 2007-07-30 13:20:08 -07:00
Gabe Black
4b3a20cdec X86: Implement LEAVE 
--HG--
extra : convert_revision : c642d5018ece82c644e1cfa389b2d3dbd6ab5ffd
 2007-07-30 13:19:11 -07:00
Gabe Black
e70ffb0117 X86: Add a bitfield to indicate whether or not an REX prefix was present. 
--HG--
extra : convert_revision : 9c4802f6c6e4eaab36aac900e2c7576682cb0f33
 2007-07-30 13:17:34 -07:00
Gabe Black
7309d5ee45 X86: Make logic instructions flag setting work. 
The instructions now ask for the appropriate flags to be set, and the microops do the "right thing" with the CF and OF flags, namely zero them.

--HG--
extra : convert_revision : 85138a832f44c879bf8a11bd3a35b58be6272ef3
 2007-07-29 13:51:40 -07:00
Gabe Black
1af50a9e8b X86: Make arithmetic instructions set the appropriate flags. 
--HG--
extra : convert_revision : 3bdef3876c7b86bc93365edee876b74a201d625f
 2007-07-29 13:50:10 -07:00
Steve Reinhardt
08474ccf68 Merge Gabe's changes from head. 
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
 2007-07-29 13:25:14 -07:00
Gabe Black
5e34c62b3b X86: Initial stack frame fixes and constant shuffling. 
The initial stack frame for x86 is now substantially more correct. The fixes made here can be back ported to SPARC and possible the other ISAs as well. The auxiliary vector types were moved to the LiveProcess base class because they are independent of ISA. Some of the types may only apply to Linux, though, so they may have to be moved.

--HG--
extra : convert_revision : 89ace35fcc8eb9586d2fee8eeccbc3686499ef24
 2007-07-29 01:33:06 -07:00
Gabe Black
e5f5890365 X86: Make limm use merge and allow overriding the data size. 
--HG--
extra : convert_revision : c6057226b8ff8f272612a9d3bf7d1d9ba90c819b
 2007-07-29 01:30:28 -07:00
Gabe Black
33847f8c83 X86: return -return_value.value() on failure. 
--HG--
extra : convert_revision : d8e1486ff075b2917be62a0008f83fd6c9e4c09a
 2007-07-29 01:27:34 -07:00
Gabe Black
d995575342 X86: Fix popa and push with the stack pointer. 
POPA used st instead of ld, and it didn't skip rsp. push rsp needs to store the -original- value of the stack pointer.

--HG--
extra : convert_revision : 376370c99b6ab60fb2bc4cd4f0a6dce71153ad06
 2007-07-29 01:26:47 -07:00
Gabe Black
3dcd848ec3 X86: Fix a bug with merge 
Merge was returning the value to merge in, not the actual result of the merge.

--HG--
extra : convert_revision : 230b4b5064037d099ae7859edabdf5be84603849
 2007-07-29 01:24:57 -07:00
Gabe Black
dc86f3229c X86: Fix a comment and adjust the stack base address. 
The stack base on my development machine starts one page below where it needs to. I don't know why it does, but I've duplicated it in m5.

--HG--
extra : convert_revision : c4783ba885b90f17e843f61e07af0bc3330a74bc
 2007-07-28 21:18:53 -07:00
Gabe Black
fe46e28b14 Merge with head. 
--HG--
extra : convert_revision : 3c1ff2585c9b20649792344b4180f6d82cef9c1b
 2007-07-28 21:04:45 -07:00
Gabe Black
e996ff7497 X86: Fix up auxiliary vectors. 
The type constants should go into an architecture independent spot since they are universal to all Linux elf binaries. The right value for some of the vectors needs to be determined. Also, x86 does not store argc or argv_array_base in registers like some other architectures.

--HG--
extra : convert_revision : 8d3f6a3e028d881d3c41e8ddf4f29d25738b529c
 2007-07-28 20:33:42 -07:00
Nathan Binkert
142362b703 merge whitespace changes 
--HG--
extra : convert_revision : 20e8aa51935dc23ac3c7e6da2cb7a4e62c9a3a7c
 2007-07-28 17:06:32 -07:00
Nathan Binkert
c27e23f2e8 style: Check/Fix whitespace on SCons files 
--HG--
extra : convert_revision : 46e6b2dd8e1984cbab0ea24c94760794734c0f95
 2007-07-28 16:49:20 -07:00
Nathan Binkert
f0fef8f850 Merge python and x86 changes with cache branch 
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
 2007-07-26 23:15:49 -07:00
Gabe Black
d1e533a1e2 X86: Fix argument register indexing. 
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.

--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
 2007-07-26 22:13:14 -07:00
Gabe Black
876849724d X86: Hook in shift and rotate by one instructions, and NOT. 
--HG--
extra : convert_revision : b3ab74e09f5cd02671cc6425c8cb8638bd58cbee
 2007-07-26 22:10:59 -07:00
Gabe Black
edaaf1ebf1 X86: Fix pc relative versions of add and subtract. 
--HG--
extra : convert_revision : c7e578aae8d36aa5d279fc27d6d7d28ed0a54181
 2007-07-26 22:10:21 -07:00
Gabe Black
647a3270d1 X86: Implement rotate-by-one instructions, and make register rotates use registers. 
--HG--
extra : convert_revision : 701691951688ecefdc6450d31076b45e9af15324
 2007-07-26 22:09:41 -07:00
Gabe Black
9e975a7e08 X86: Implement shift-by-one instructions, and make register shifts use registers. 
--HG--
extra : convert_revision : ce4af3e56b45821e0a8b27f288b532d2f9dd3336
 2007-07-26 22:09:24 -07:00
Gabe Black
c0670187c5 X86: Add functions to read and write to an exec context. 
These functions take care of calling the thread contexts read and write functions with the right sized data type, and handle unaligned accesses.

--HG--
extra : convert_revision : b4b59ab2b22559333035185946bae3eab316c879
 2007-07-26 22:08:35 -07:00
Gabe Black
57428b8b0b X86: Fix carry calculation for subtraction based microops. 
The carry flag should be calculated using the -complement- of the second operand, not it's negation. The carry in which is part of computing the 2's complement may induce a carry, but if you've already caused the carry before you get the carry computing logic involved, it will miss it.

--HG--
extra : convert_revision : 318cf86929664fc52ed9e023606a9e892eba635c
 2007-07-26 22:06:30 -07:00
Gabe Black
749ed15b60 Add functions for mmap and brk. 
--HG--
extra : convert_revision : 3d0340a2aae87b3462d6562b34ac7e02c685c1ef
 2007-07-26 22:04:33 -07:00
Gabe Black
7d826f632c Implement NOT 
--HG--
extra : convert_revision : 09cbed6332224d06644d401f21178eb7914993df
 2007-07-26 22:03:19 -07:00
Gabe Black
26b1c455e0 Merge with head. 
--HG--
extra : convert_revision : 4a34b3f91c4fc90055596245ae3efec45ea33888
 2007-07-24 15:48:40 -07:00
Gabe Black
02c39000bf Hook in a bunch of new instructions, fix a few minor bugs, and expand out one of the prefix multiplexed opcode groups. 
--HG--
extra : convert_revision : b5afd54a180a8fbdf9a892b1a2316fcf0d11afc6
 2007-07-24 15:43:38 -07:00
Gabe Black
93365f7d1a Add a tgt_iovec structure to support writev, change the name of X86Linux to X86Linux64, add some syscalls. 
--HG--
extra : convert_revision : 9c13e9c68f331fe6c4a9abd96f7aee0f064101fc
 2007-07-24 15:42:11 -07:00
Gabe Black
4bb1c5ba0c Add a special case for "test" which needs an immediate even though everything else with it's opcode doesn't. 
Also made some spacing consistent.

--HG--
extra : convert_revision : 72a317f29c11705782e19840bef24354214d3143
 2007-07-24 15:37:16 -07:00
Gabe Black
97c4258383 The groups of instructions hanging off opcode 71h, 72h, and 73h all need a byte immediate 
--HG--
extra : convert_revision : 9559047adfec1490c2d40065442a579549624fcc
 2007-07-24 15:19:02 -07:00
Gabe Black
69f4a6dc86 Make the shift and rotate microops mask the shift/rotate amount correctly. 
--HG--
extra : convert_revision : 31c5d3fa8ef0d37494d0e35cef31be6056d5d93f
 2007-07-24 15:10:53 -07:00
Gabe Black
15f57bd7cb Fix immediate shifts. Implement register shifts. 
--HG--
extra : convert_revision : 0b83422ad3c190021e46cada07e64d8d57d29859
 2007-07-24 15:10:20 -07:00
Gabe Black
66911a1fab Fix immediate rotates and add register ones. 
--HG--
extra : convert_revision : a6b9cee59019ea0f906c8a8e76eeb2cd73093671
 2007-07-24 15:08:56 -07:00
Gabe Black
d961846e8c Clean out part of an old comment. 
--HG--
extra : convert_revision : 6a6b2a06576ebe7383f7ce0e4e9f96bc96b84b56
 2007-07-24 15:08:09 -07:00
Gabe Black
340ce8e680 Implement cmov. 
--HG--
extra : convert_revision : 2e92623b53c1fe8b4da3fef3486c0dcd8d5ef9f5
 2007-07-24 15:07:35 -07:00
Gabe Black
28614addff Implement cdqe and cqo, which are also called cbw and cwde, and cwd and cdq respectively, depending on the operand size. 
--HG--
extra : convert_revision : 67ac035c68608d7260c21ce32009b344f3834e46
 2007-07-24 15:07:03 -07:00
Gabe Black
f8f7f994b8 Implement setcc. 
--HG--
extra : convert_revision : 7a47b9971fe9e4ac638b275fb56fdcba08c2d671
 2007-07-24 15:05:17 -07:00
Gabe Black
1cec0a3249 Get rid of an old comment. 
--HG--
extra : convert_revision : 1b86a7f60489bc65a03919b27afd4dfbe4e09bba
 2007-07-24 15:04:53 -07:00
Gabe Black
7e52393432 Get rid of an old comment 
--HG--
extra : convert_revision : 4d626721ad54af9cbf5b0c07a3a6e8a05e4e9ab5
 2007-07-24 15:03:43 -07:00
Nathan Binkert
abc76f20cb Major changes to how SimObjects are created and initialized. Almost all 
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
 2007-07-23 21:51:38 -07:00
Gabe Black
ecf2621f4f Implement pusha, popa, three operand imul, hook them into the decoder, and clean up the decoder a little. 
--HG--
extra : convert_revision : c1b8f0f433f629e4104e2b04addcdaabf57595e3
 2007-07-23 11:20:57 -07:00
Gabe Black
85f9415a67 Make the operand size reflect the size specifier on the operand tags, and implement NEG 
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
 2007-07-23 01:07:49 +00:00
Steve Reinhardt
d5c74657c9 Merge more changes in from head. 
--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72
 2007-07-22 08:10:59 -07:00
Steve Reinhardt
03730edc45 Merge Gabe's changes with mine. 
--HG--
extra : convert_revision : f50ed42e7acb3f11e610fd6976eaa8df0c6ba2ab
 2007-07-22 10:40:45 -04:00
Gabe Black
2cd454d102 Add the "open" syscall. 
--HG--
extra : convert_revision : d405ed5d3738639809dd2887955db9253138ccbb
 2007-07-22 02:43:03 +00:00
Gabe Black
47b0242618 Fixed immediate byte accounting bug. 
--HG--
extra : convert_revision : ee5275da14a2923b9a525ae5b5c582c15df4608a
 2007-07-22 02:34:52 +00:00
Gabe Black
bff4f765f5 Fixed displacement size bug. 
--HG--
extra : convert_revision : c39249ef598c1bd555098d688381dc62541a07c0
 2007-07-22 02:23:03 +00:00
Gabe Black
f7ff068b30 Implemented and hooked in xchg, rotate with carry, and ret instructions 
--HG--
extra : convert_revision : a8e67b0ab4072308f01e0df7f7ee05b31f605a35
 2007-07-21 19:29:39 -07:00
Gabe Black
ee6fbdc28b Implement rotate with carry microops. 
--HG--
extra : convert_revision : 1d7ff6611e5b4766a5257c1e73681fabbe5f6d76
 2007-07-21 19:27:38 -07:00
Gabe Black
fc1b7d62b7 Fixed the distinction between far and near versions of jmp, call and ret. Implemented some shifts, rotates, and pushes. 
--HG--
extra : convert_revision : fcb06189ff213e82da16ac43231feb308cb3a285
 2007-07-20 23:16:03 -07:00
Gabe Black
009df5ff1e Fixed line number accounting 
--HG--
extra : convert_revision : 4c046493b98ce4a766c2121710d70650cb6a801e
 2007-07-20 23:12:26 -07:00
Gabe Black
75f6c6a016 Implement UD2 and replace the place holder in the decoder. 
--HG--
extra : convert_revision : 16d0d2b2ddad8759698fa4aa668c22063307c72b
 2007-07-20 18:27:02 -07:00
Gabe Black
8dd93f32e4 Make the "name" function const. 
--HG--
extra : convert_revision : eb71bc3edd92a544a5333786635fce550aaef233
 2007-07-20 18:24:46 -07:00
Gabe Black
9093cb79a1 Implement adc and sbb instructions and microops. 
--HG--
extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa
 2007-07-20 17:17:11 -07:00
Gabe Black
c3669b8925 Implement the rest of the conditional jump instructions and hook them into the decoder. 
--HG--
extra : convert_revision : 8d1d6abce29371def560e1c3f31dabb4de01366f
 2007-07-20 17:02:39 -07:00
Gabe Black
231cc3effb Make the decoder take advantage of the new "B" operand format which takes a register index from the opcode itself. 
--HG--
extra : convert_revision : 35f9be6559ee9833049eda1817982efdde7082be
 2007-07-20 16:48:59 -07:00
Gabe Black
1ed6a8ed79 Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops. 
--HG--
extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
 2007-07-20 16:39:07 -07:00
Gabe Black
705a22b999 Hook in newly implemented instructions. 
--HG--
extra : convert_revision : 53319d2363211af407dabaa2b63ad8a4df09c369
 2007-07-20 15:05:37 -07:00
Gabe Black
dfcb2ffa46 Comment, implement, fix, and trim the move microassembly. 
--HG--
extra : convert_revision : aa5ee7270e740bfbe42e70c4dfccc4c91ecacb33
 2007-07-20 15:04:41 -07:00
Gabe Black
fcc23891bb Implement jnbe. 
--HG--
extra : convert_revision : cdbf1ff5ed3a63787cbd2187a8a3455a41cc5085
 2007-07-20 15:03:36 -07:00
Gabe Black
79b3208aa5 Appended _NEAR to the near version of call and return. 
--HG--
extra : convert_revision : 70adb38d59ff7b5d103e58a9f0773dfb911fec6d
 2007-07-20 15:03:03 -07:00
Gabe Black
f09847c7a6 Make load and store ops use the appropriate sized data access. 
--HG--
extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
 2007-07-20 15:02:09 -07:00
Gabe Black
d926de462a Implement the increment and decrement instructions, and the two operand form of signed multiplication. 
--HG--
extra : convert_revision : d87df4b1b5470bed1d963dfe8e2ffa1403718342
 2007-07-20 14:59:14 -07:00
Gabe Black
ec5f66190e Fix code that computes displacement size. 
--HG--
extra : convert_revision : a9be3eb2b90b88086936aeb4dcf87ec7b58a48cb
 2007-07-20 14:57:34 -07:00
Gabe Black
5d882984d1 Add a bitfield to decode based on what prefixes are used. 
--HG--
extra : convert_revision : 7ff4998b3249ccfe86ae9cbcc63fb910683707f5
 2007-07-20 14:57:04 -07:00
Gabe Black
dcfaa348b1 Add a parameter type to read a register index from the opcode itself. 
--HG--
extra : convert_revision : d2b5468ebf5df5a6ccadb57a30c52c8d16417b9a
 2007-07-20 14:55:16 -07:00
Gabe Black
0baae59c09 Fix carry flag for subtracts, and clean up code slightly. 
--HG--
extra : convert_revision : 668f5d5aeba888488b41284de6c72a0d055c4ef4
 2007-07-20 14:53:38 -07:00
Gabe Black
0781609693 Fixed width parameter and provided a parameter to flip the carry bit on subtract. 
--HG--
extra : convert_revision : d01bb791b000a2fdfc8600f8fb2f8aadd52b0b63
 2007-07-20 14:52:44 -07:00
Gabe Black
cfadef74d1 x86 fixes 
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.

--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
 2007-07-19 15:15:47 -07:00
Gabe Black
09f056a1ef Check for the two opcode prefix correctly and add in some instructions. 
--HG--
extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97
 2007-07-18 17:51:05 -07:00
Gabe Black
f6d326d6fc Hook near returns into the decoder. 
--HG--
extra : convert_revision : b38d4417552991e44f5d1de1f35d5d1ad8f32340
 2007-07-18 17:48:16 -07:00
Gabe Black
dbf361128a Implement near returns. 
--HG--
extra : convert_revision : 3d6e8a976d31cb016a4b78200716b0ece155137a
 2007-07-18 17:47:40 -07:00
Gabe Black
99310a1d93 Make instructions that conditionally set registers set them to their old value if they don't actually execute. 
--HG--
extra : convert_revision : 36e63dd0c6ac1a3e1133c7985cf5507b83e9ee45
 2007-07-18 17:46:38 -07:00
Gabe Black
776283cff8 Fix the overload which prints ExtMachInst in X86. 
--HG--
extra : convert_revision : 2ef8ee71999f36b09270ba9526c2846beda65051
 2007-07-18 17:45:43 -07:00
Gabe Black
05a33a443f Make store microops actually store instead of load. 
--HG--
extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
 2007-07-18 17:45:06 -07:00
Gabe Black
e209fce9de Fix a comment to refer to the right type of instruction. 
--HG--
extra : convert_revision : dd441d8fbaed1ed8b2b66e3ad0275009bd4dcef4
 2007-07-18 17:44:12 -07:00
Gabe Black
17f3da6c29 Fix the panic in the "error" format for x86, 
--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
 2007-07-18 17:43:30 -07:00
Gabe Black
6c54b654a8 Implement some forms of add. 
--HG--
extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7
 2007-07-18 16:33:56 -07:00
Gabe Black
bafb7ee5c1 Fix the operand types in a section of the decoder. 
--HG--
extra : convert_revision : c37600fd65b44817eed2ba653f9d4f08a9869874
 2007-07-18 16:26:52 -07:00
Gabe Black
b949458d4c Make the data size used by regops overridable in the microassembly. 
--HG--
extra : convert_revision : 84d850aa5340c9d02d03502704b063215f6e2140
 2007-07-18 16:26:17 -07:00
Gabe Black
387f00e3dd Fill out the miscreg file and add types to miscregs.hh 
--HG--
extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
 2007-07-18 16:12:39 -07:00
Gabe Black
5cca5ca3d9 Hook x86 nop into the decoder. 
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
 2007-07-18 16:11:52 -07:00
Gabe Black
3bd42af99e Implement the x86 nop to be a "fault" microop which returns "NoFault". 
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
 2007-07-18 16:10:44 -07:00
Gabe Black
dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst. 
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
 2007-07-18 16:09:35 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const. 
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
 2007-07-18 16:09:00 -07:00
Gabe Black
85f32920fb Calculate the correct address size. 
--HG--
extra : convert_revision : 6bd9d5a01ba6600781e3678e0403dca524fb2cba
 2007-07-17 20:54:55 -07:00
Gabe Black
e524240d68 Make disassembled x86 register indices reflect their size. 
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
 2007-07-17 18:12:33 -07:00
Gabe Black
2e80f71dcd Implemented jnz. 
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
 2007-07-17 16:55:33 -07:00
Gabe Black
62ffc71fab Use limm to set up immediate value for subtract instruction. 
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
 2007-07-17 16:50:13 -07:00
Gabe Black
d77d4c04b7 Implement the jz instruction. 
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
 2007-07-17 15:36:45 -07:00
Gabe Black
c4004482a5 Make "test" set some condition codes. 
It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
 2007-07-17 15:35:34 -07:00
Gabe Black
a6757095c3 Add in support for condition code flags. 
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
 2007-07-17 15:33:18 -07:00
Gabe Black
cf846d5205 Add in operand which holds the condition code bits of the flag register. 
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
 2007-07-17 15:28:48 -07:00
Gabe Black
bbf7163dd9 Add symbols for each of the flags a microop could set and each condition it could check. 
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
 2007-07-17 15:27:28 -07:00
Gabe Black
cbc24d6600 Actually include miscregs.hh 
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
 2007-07-17 13:30:23 -07:00
Gabe Black
b0643a08a3 Create a file to describe misc registers. 
Define bitfields, indices, etc.

--HG--
extra : convert_revision : 8fffdc4cf796d304b12b317d8bddf5685bd50cf4
 2007-07-17 13:29:40 -07:00
Gabe Black
aad11bf879 Add a spot for the condition code portion of the flag register. 
This is stored in the integer register file so that it can be renamed, but it should be a misc reg.

--HG--
extra : convert_revision : eee48f24dd80b145f14427482047c4d8af2521ab
 2007-07-17 13:26:06 -07:00
Gabe Black
873b762d4b Move bitunion code into it's own file. 
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
 2007-07-14 17:28:26 -07:00
Gabe Black
4f7809d5e6 Pull some hard coded base classes out of the isa description. 
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
 2007-07-14 17:14:19 -07:00
Steve Reinhardt
288f9cf7d2 Merge from head. 
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
 2007-07-14 12:23:47 -07:00
Steve Reinhardt
e5ecfa2745 Disable PrintThreadInfo since it causes a panic when using VPtr. 
See Flyspray #281.

--HG--
extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
 2007-07-14 12:22:04 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event" 
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
 2007-06-30 17:45:58 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are 
now encoded in cmd field.

--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
 2007-06-30 10:16:18 -07:00
Korey Sewell
738ecc495b fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... 
src/arch/mips/isa/decoder.isa:
    commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
    edit fp format
src/arch/mips/isa/formats/mem.isa:
    fix for basic store instructions

--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
 2007-06-29 15:13:50 -04:00
Korey Sewell
e28cbc98a0 o3cpu build for mips 
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
 2007-06-28 05:30:46 -04:00
Korey Sewell
ac19e0c505 FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality... 
src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
 2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565 add Control Bitfield class 
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
 2007-06-22 20:09:46 -04:00
Korey Sewell
753adb38d5 mips import pt. 1 
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
 2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
 2007-06-22 17:44:33 -04:00
Gabe Black
70d6044527 Make symbols for regular registers. 
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
 2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59 Get rid of an unnecessary include file. 
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
 2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

src/cpu/o3/fetch_impl.hh:
    hand merge

--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
 2007-06-21 20:35:25 +00:00
Gabe Black
25e385e0cf Use the new symbols to clean up the assembler. 
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
 2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053 Needed for last change set to work :P 
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
 2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083 Define symbols for the x86 specialization of the microassembler. 
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
 2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3 Fix a comment. 
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
 2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols. 
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
 2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958 Add in code that lays the ground work for setting flags. 
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
 2007-06-21 13:48:44 +00:00
Gabe Black
77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores. 
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
 2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e Fix a newly introduced bug where the predecoder wasn't picking up all the displacement. 
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
 2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014 X86 probably doesn't need a window save area. 
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
 2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c Fix a typo in one of the operand type tags. 
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
 2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1 Comment out some unnecessary debug output. 
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
 2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282 Forgot to check these in... 
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
 2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1 Comment out some unnecessary debug statements. 
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
 2007-06-20 19:04:38 +00:00
Gabe Black
a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
 2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro

src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Hand merge

--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
 2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction. 
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
 2007-06-19 22:40:10 +00:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. 
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
 2007-06-19 18:17:34 +00:00
Gabe Black
d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL. 
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
 2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85 Make an error message a little more descriptive. 
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
 2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70 Renovate the "fault" microop implementation. 
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
 2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list. 
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
 2007-06-19 14:26:42 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
 2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst. 
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
 2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names. 
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
 2007-06-19 14:14:17 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output. 
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
 2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
 2007-06-18 14:15:00 +00:00
Gabe Black
3ceb0a46ae Add in some microregs. 
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
 2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future. 
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
 2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm. 
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
 2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect. 
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
 2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place. 
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
 2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
 2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method. 
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
 2007-06-14 16:52:19 -04:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode. 
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
 2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst. 
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
 2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement. 
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
 2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. 
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
 2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly. 
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
 2007-06-14 13:45:37 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. 
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
 2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names. 
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
 2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP" 
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
 2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though. 
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
 2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly. 
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
 2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up. 
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
 2007-06-12 17:35:11 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix. 
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
 2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well. 
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
 2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes. 
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
 2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions. 
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
 2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86. 
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
 2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype. 
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
 2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things. 
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
 2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst 
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
 2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs 
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
 2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent. 
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
 2007-06-12 16:21:47 +00:00
Gabe Black
1493ceda8f Fix another outdated comment. 
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
 2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments. 
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
 2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment. 
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
 2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment. 
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
 2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft. 
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
 2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little. 
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
 2007-06-08 17:06:34 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
 2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler. 
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
 2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR. 
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
 2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst. 
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
 2007-06-08 16:06:22 +00:00
Gabe Black
dba02f703b Make limm (load immediate) microop 
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
 2007-06-04 19:53:06 +00:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
 2007-06-04 15:59:20 +00:00
Gabe Black
6e8a06b237 Clean things up 
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
 2007-06-01 16:24:51 +00:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly. 
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
 2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor 
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
 2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops 
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
 2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name 
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
 2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments 
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
 2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
 2007-05-31 20:45:04 +00:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor. 
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
 2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler 
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
 2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
 2007-05-31 13:50:35 +00:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix 
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
 2007-05-27 19:21:17 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
 2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated. 
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
 2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3 
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
 2007-05-24 21:54:51 -07:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
 2007-05-18 13:36:47 -07:00
Gabe Black
6d199f0b25 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
 2007-05-09 22:04:58 -07:00
Gabe Black
4ad1b58fdd Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
 2007-05-09 20:50:46 -07:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault 
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
 2007-05-09 15:37:46 -04:00
Gabe Black
dc1c9e0300 Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed. 
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
 2007-05-08 13:02:19 +00:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted 
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
 2007-05-01 18:12:58 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized, 
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
 2007-04-27 13:59:17 -07:00
Gabe Black
cca881a531 Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
 2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
 2007-04-23 11:34:39 -04:00
Gabe Black
cea5435760 Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used. 
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
 2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f fixes for solaris compile 
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
 2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
 2007-04-21 17:50:47 -04:00
Gabe Black
5a3dcc172a Make register indexes larger so they can actually hold all the legal values. Oops! 
--HG--
extra : convert_revision : 7689b2e1f7468e4acb8be0f242f74002c79e7960
 2007-04-14 17:08:24 +00:00
Gabe Black
3140dd88bc Make the fsr a serializing register. Other control registers probably need this as well. 
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
 2007-04-14 17:07:24 +00:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
 2007-04-11 15:30:09 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu. 
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
 2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message. 
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
 2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
 2007-04-11 12:25:00 +00:00
Gabe Black
798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions. 
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
 2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit. 
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
 2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. 
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
 2007-04-10 17:13:26 +00:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
 2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here. 
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
 2007-04-09 01:08:05 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
 2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
 2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa 
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
 2007-04-06 16:55:56 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. 
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
 2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function 
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
 2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code. 
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
 2007-04-06 15:15:36 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution. 
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
 2007-04-04 23:19:32 +00:00
Gabe Black
4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: 
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
 2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case 
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
 2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7 Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function. 
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
 2007-04-04 14:27:00 +00:00
Gabe Black
6010c6ded4 Added all the different variations of the register names. 
--HG--
extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
 2007-04-04 14:25:36 +00:00
Gabe Black
93d4c624c5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 7be8ebe55a7b11552d78701520f93aa86db1e501
 2007-04-03 15:01:36 +00:00
Gabe Black
61c56ffeaf A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented. 
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
 2007-04-03 15:01:09 +00:00
Gabe Black
0ce6936e7d Zero out ModRM if the byte isn't there, and fix some displacement size stuff. 
--HG--
extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
 2007-04-03 14:56:24 +00:00
Ali Saidi
c46e946c94 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 2f7f50f4ad31f741c0c67db96e49d30ca078fc94
 2007-03-29 22:01:34 -04:00
Ali Saidi
8ca218cab5 get rid of CWP bounds warning... 
--HG--
extra : convert_revision : 74df09341c091c2d6ca9b46c6a3521f22b48acf4
 2007-03-29 15:57:11 -04:00
Gabe Black
7fcc9d2106 Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. 
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
 2007-03-29 17:57:19 +00:00
Gabe Black
e67a207ad3 Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself. 
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
 2007-03-29 17:57:18 +00:00
Gabe Black
77ce05f478 Fidget with the syntax of the MultiOp format in anticipation of making it actually work. 
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
 2007-03-29 00:50:54 -07:00
Gabe Black
fd77212b72 Add code to generate register and immediate based integer op microop classes. 
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
 2007-03-29 00:49:53 -07:00
Gabe Black
0d5f6167ff Allow "let" blocks to add code to the output files. 
--HG--
extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
 2007-03-29 00:47:46 -07:00
Kevin Lim
4bad33ce9d Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
 2007-03-24 14:00:16 -04:00
Gabe Black
e7bbd85ae6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
 2007-03-23 21:47:03 -04:00
Kevin Lim
047f77102b Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

src/cpu/base_dyn_inst.hh:
    Hand merge.  Line is no longer needed because it's handled in the ISA.

--HG--
extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
 2007-03-23 13:20:19 -04:00
Kevin Lim
2330adfa28 Make hardware loads/stores serializing; they need to avoid certain out-of-order interactions in the 21264. 
--HG--
extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
 2007-03-23 13:14:05 -04:00
Gabe Black
e3d3ab4513 Add structure based bitfield syntax to the isa_parser. This is primarily useful for x86. 
--HG--
extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
 2007-03-22 04:10:57 +00:00
Gabe Black
39182808bc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
 2007-03-22 04:10:56 +00:00
Gabe Black
276f6d794d Add a junk operand. With no operands, the parser breaks. 
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
 2007-03-21 21:09:24 +00:00
Gabe Black
bbffaa8ee0 Start implementing groups of instructions which do the same thing on different sets of inputs. 
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
 2007-03-21 21:07:43 +00:00
Gabe Black
1707aa750f put the int register count in intregs.hh 
--HG--
extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
 2007-03-21 21:04:54 +00:00
Gabe Black
0a80d06dea Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are. 
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
 2007-03-21 19:19:53 +00:00
Gabe Black
3efec59fc5 Missed a const 
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
 2007-03-21 19:15:40 +00:00
Gabe Black
63e2d3dcbf Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
 2007-03-21 01:18:55 -04:00
Gabe Black
475d36ee93 Ignore "time" and "times" syscalls. 
--HG--
extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
 2007-03-20 23:53:52 -04:00
Gabe Black
e7b015cee1 Added syntax for structure oriented extMachInsts. 
--HG--
extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
 2007-03-20 06:08:52 +00:00
Gabe Black
7c0825ccf9 Compile fixes for SPARC_FS. 
src/arch/alpha/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Put in a missing include
src/cpu/exetrace.cc:
    Convert the legion lockstep stuff from makeExtMI to the predecoder object.

--HG--
extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
 2007-03-18 23:09:51 -04:00
Gabe Black
a1f92af0fb The syntax used for twin stores was confusing the parser so it's now broken down farther. 
--HG--
extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
 2007-03-17 21:23:03 -04:00
Gabe Black
3ccaee976a Make the SPARC branch instructions use ExtMachInsts in their constructors. This isn't necessary since they don't use the extended fields, but it's more consistent and more correct. 
--HG--
extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
 2007-03-16 10:55:50 +00:00
Gabe Black
9ad3f1e479 Refactor things a little. 
--HG--
extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
 2007-03-15 19:16:39 +00:00
Gabe Black
f4eee4fb81 File with the predecoder in it. 
src/arch/x86/predecoder.cc:
    File for the x86 predecoder process function.

--HG--
extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
 2007-03-15 19:16:38 +00:00
Gabe Black
ae9bed4f8f Split the x86 "process" predecoder method into it's own file. 
--HG--
extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
 2007-03-15 19:16:37 +00:00
Gabe Black
6cdd434f7f Changed warns to DPRINTFs and multiply by 8 where needed. 
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
 2007-03-15 16:13:40 +00:00
Gabe Black
075df1469f Added immediate value support, and fixed alot of bugs. This won't support 3 byte opcodes. 
--HG--
extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
 2007-03-15 15:29:39 +00:00
Gabe Black
4379e54b52 Compile fix 
--HG--
extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
 2007-03-15 03:17:00 +00:00
Gabe Black
32368a2bd6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/arch/mips/utility.hh:
src/arch/x86/SConscript:
    Hand merge

--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
 2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86. 
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
 2007-03-15 02:47:42 +00:00
Gabe Black
ff90b8c1aa Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
 2007-03-13 15:03:34 -04:00
Gabe Black
ce18d900a1 Replaced makeExtMI with predecode. 
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.

--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
 2007-03-13 16:13:21 +00:00
Ali Saidi
a068d6db0f fix interrupting during a quisce on sparc 
src/arch/sparc/ua2005.cc:
    fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
    check if were suspended and interrupt at the guess time
src/base/traceflags.py:
    add trace flag for Iob
src/cpu/simple/base.cc:
    Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
    add some Dprintfs

--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
 2007-03-13 00:05:52 -04:00
Gabe Black
1f3c3aa234 Fix mulscc. 
--HG--
extra : convert_revision : 405f10f14f2f6666a7bef01bfb0cf90ff14cef24
 2007-03-12 17:07:10 -04:00
Ali Saidi
1356fb953d Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : c6fbe09348b606b94bbb35f911dea94353f076f9
 2007-03-12 13:56:30 -04:00
Ali Saidi
9ad24e2248 move hver code to ua2005.cc 
src/arch/sparc/miscregfile.cc:
    this code should be in readFSreg
src/arch/sparc/ua2005.cc:
    move code froh miscregfile to ua2005.cc

--HG--
extra : convert_revision : fa450b04ad73ab6f6e25d66fa0368054263f09f9
 2007-03-12 13:56:09 -04:00
Gabe Black
b3bdce81fd Add the rename syscall. 
--HG--
extra : convert_revision : 67e92b166599bd20b7ce90d073f2fd7502f810ec
 2007-03-12 01:54:15 -04:00
Gabe Black
57650a201e Fix the mnemonic and the branch displacement field size of the branch on floating point condition codes with prediction. 
--HG--
extra : convert_revision : 812950e92b7e0f34f370a1472c20f52e3ef214b1
 2007-03-12 01:47:49 -04:00
Gabe Black
6a7e4a5904 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 725999a0a5bde6e065bad87b42e973c5c627c69f
 2007-03-11 18:19:38 -04:00
Gabe Black
26c0426e44 Make sttw and sttwa use the twin memory operations. 
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
 2007-03-11 18:12:33 -04:00
Nathan Binkert
1aef5c06a3 Rework the way SCons recurses into subdirectories, making it 
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
 2007-03-10 23:00:54 -08:00
Gabe Black
52ec0fe3d9 Merge zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test

--HG--
extra : convert_revision : dc02bb6b4e5cc7f0260da80a71b9713f75566a29
 2007-03-10 20:52:55 -05:00
Gabe Black
7e363e14f7 Fix bounds check for the cwp 
--HG--
extra : convert_revision : 097e6b0c80d71417329b2a4cd118046aa5ed777a
 2007-03-10 19:29:31 -05:00
Gabe Black
91e8729c28 Added implementations of the fpop2 instructions. 
--HG--
extra : convert_revision : 1fc88b499334bb4ba44375347d0062843587b6cf
 2007-03-10 19:26:54 -05:00
Gabe Black
df1ea2cf05 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
 2007-03-09 18:32:13 -05:00
Gabe Black
03ff1c3167 Split the syscall table, SPARC specific syscall implementations, and the 32 bit syscall table into it's own file. Corrected problems with the stat structure. These should be tested on 64 bit x86 and SPARC machines. 
--HG--
extra : convert_revision : 5d9fe19e031b92e111069c6b89c3dbeb29975b8a
 2007-03-09 17:14:24 -05:00
Ali Saidi
58f69391ca implement ipi stufff for SPARC 
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
    add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
    handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
    some constants for the strand status register
src/arch/sparc/ua2005.cc:
    properly implement the strand status register
src/dev/sparc/iob.cc:
    implement ipi generation properly
src/sim/system.cc:
    call into the ISA to start the CPU (or not)

--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
 2007-03-09 16:56:39 -05:00
Ali Saidi
1158da37fb Panic if any CMT registers are accessed 
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
    add CMT ASI registers
src/arch/sparc/tlb.cc:
    Panic if any of the CMT registers are being accessed

--HG--
extra : convert_revision : b9a94281e2074a576ac21d042b756950d509e758
 2007-03-08 21:49:13 -05:00
Gabe Black
c40d95e4c4 Fixed an off-by-one error. 
--HG--
extra : convert_revision : 498fef18cf339cabc2c00e4758bc8a0da857daca
 2007-03-08 00:55:16 -05:00
Gabe Black
46051c5f65 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : becba8537b11ee4ef33bbf129bef2ca047403df5
 2007-03-08 00:42:30 -05:00
Gabe Black
5caf721074 Fix up the SPARC initial stack frame to match an actual 32 bit process. 
--HG--
extra : convert_revision : 3995744c3bf955a370b18f6e88de1bfb82f79843
 2007-03-08 00:29:37 -05:00
Ali Saidi
87fb0eb8de I missed a couple of WithEffects, this should do it 
--HG--
extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915
 2007-03-07 21:51:44 -05:00
Gabe Black
54fc750924 Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures. 
--HG--
extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
 2007-03-07 20:04:46 +00:00
Ali Saidi
49527ab553 Merge zizzer:/bk/newmem 
into  zeep.pool:/tmp/newmem

--HG--
extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
 2007-03-07 15:04:44 -05:00
Ali Saidi
689cab36c9 *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
 2007-03-07 15:04:31 -05:00
Gabe Black
05c86ec0d7 Get X86 to load an elf and start a process for it. 
src/arch/x86/SConscript:
    Add in process source files.
src/arch/x86/isa_traits.hh:
    Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
    Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
    An X86 process class.
src/base/loader/elf_object.cc:
    Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
    Add an x86 traceflag
src/sim/process.cc:
    Add in code to create an x86 process.
src/arch/x86/intregs.hh:
    A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
    A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
    An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
    The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
    The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
    An x86 hello world test binary.

--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
 2007-03-06 15:42:30 +00:00
Gabe Black
992fda55f9 Fill out a stub version of the vtophys header file. 
--HG--
extra : convert_revision : 2c10a80a2f73207539e3f98b4a3b864d431f5035
 2007-03-05 17:59:04 +00:00
Gabe Black
296891b1c5 Add in NumGDBRegs so the constructor to the base class can get all it's arguments. 
--HG--
extra : convert_revision : fcec1ad134b53a419a952e556ed75cb1559a1127
 2007-03-05 17:58:15 +00:00
Gabe Black
a473d50e4c Reorganize the floating point register file a little. 
--HG--
extra : convert_revision : 643c147b77e931d49ac559681d4bbda737f6e1c7
 2007-03-05 17:57:26 +00:00
Gabe Black
a46e100bd9 Add some new source files. 
--HG--
extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7
 2007-03-05 17:56:26 +00:00
Gabe Black
a41b86ba01 Stub decoder. This is probably even farther from finished than it looks... 
--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
 2007-03-05 16:16:28 +00:00
Gabe Black
a0294c10cd Added missing include. 
--HG--
extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
 2007-03-05 16:11:07 +00:00
Gabe Black
ecfc622451 Added LargestRead type for x86. I might have picked the wrong type. 
--HG--
extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
 2007-03-05 16:10:11 +00:00
Gabe Black
78e5406f19 Stub implementation for x86. 
--HG--
extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
 2007-03-05 16:09:09 +00:00
Gabe Black
05ba90b726 Stub implementation for x86 
--HG--
extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
 2007-03-05 16:08:18 +00:00
Gabe Black
58d30df676 Added fault generation functions. I would still like to see these go away. The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures. 
--HG--
extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
 2007-03-05 16:07:01 +00:00
Gabe Black
7730af9503 Added stub implementations or prototypes for all the functions in this file. 
--HG--
extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
 2007-03-05 14:55:09 +00:00
Gabe Black
b2d356a6b2 Added in a missing include. 
--HG--
extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
 2007-03-05 14:53:51 +00:00
Gabe Black
7ed7d6e80d Filled in a stub header file for setting the result of a syscall. 
--HG--
extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
 2007-03-05 14:53:15 +00:00
Gabe Black
43b8f51bb8 Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha. 
--HG--
extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
 2007-03-05 14:52:28 +00:00
Gabe Black
2e6cf12963 Filled in a stub header file for remote gdb 
--HG--
extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
 2007-03-05 14:51:21 +00:00
Gabe Black
aa5f42b10d Correct a typo 
--HG--
extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
 2007-03-05 14:50:33 +00:00
Gabe Black
0e9db1a2e5 Make the constructor (and all the other functions) public 
--HG--
extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
 2007-03-05 14:49:52 +00:00
Gabe Black
b832e6740f Various touch ups 
--HG--
extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
 2007-03-05 14:49:07 +00:00
Gabe Black
ecc1066f43 Added a missing include. 
--HG--
extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
 2007-03-05 14:48:18 +00:00
Gabe Black
ec8b49cc5f Added a missing include. 
--HG--
extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
 2007-03-05 14:47:42 +00:00
Gabe Black
8a33c8dce4 Fix up the remote gdb include gaurds so it doesn't use the same symbol as Alpha does. 
--HG--
extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
 2007-03-05 14:46:49 +00:00
Gabe Black
30e700600c x86 register file includes. 
--HG--
extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
 2007-03-05 12:23:14 +00:00
Gabe Black
b9b29525a6 Include the x86 specific traits file. 
--HG--
extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
 2007-03-05 12:21:20 +00:00
Gabe Black
9e93feea10 Stub x86 Fault class which just panics. 
--HG--
extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
 2007-03-05 12:20:34 +00:00
Gabe Black
385eb586ce A new file for x86 specific parameters. This could be implemented as a sim object? 
--HG--
extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
 2007-03-05 12:19:54 +00:00
Gabe Black
be29612fbe Add in a declaration of class Checkpoint rather than expecting it to come from some other include. 
--HG--
extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
 2007-03-05 12:19:11 +00:00
Gabe Black
6a19b64de2 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
 2007-03-05 11:00:44 +00:00
Nathan Binkert
ba042842c6 Don't use the exact same name as a system header #define 
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
 2007-03-04 19:26:49 -08:00
Ali Saidi
82874eefca Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
 2007-03-03 19:03:22 -05:00
Ali Saidi
36f43ff6a5 Implement Niagara I/O interface and rework interrupts 
configs/common/FSConfig.py:
    Use binaries we've compiled instead of the ones that come with Legion
src/arch/alpha/interrupts.hh:
    get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number
src/arch/sparc/asi.cc:
    Add AsiIsInterrupt() to AsiIsMmu()
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
    Add InterruptVector type
src/arch/sparc/interrupts.hh:
    rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared
src/arch/sparc/isa_traits.hh:
    Add the "interrupt" trap types to isa traits
src/arch/sparc/miscregfile.cc:
    add names for all the misc registers and possible post an interrupt when TL is changed.
src/arch/sparc/miscregfile.hh:
    Add a helper function to post an interrupt when pil < some set softint
src/arch/sparc/regfile.cc:
src/arch/sparc/regfile.hh:
    InterruptLevel shouldn't really live here, moved to interrupt.hh
src/arch/sparc/tlb.cc:
    Add interrupt ASIs to TLB
src/arch/sparc/ua2005.cc:
    Add checkSoftInt to check if a softint needs to be posted
    Check that a tickCompare isn't scheduled before scheduling one
    Post and clear interrupts on queue writes and what not
src/base/bitfield.hh:
    Add an helper function to return the msb that is set
src/cpu/base.cc:
src/cpu/base.hh:
    get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending
src/cpu/intr_control.cc:
src/cpu/intr_control.hh:
src/dev/alpha/tsunami_cchip.cc:
src/python/m5/objects/IntrControl.py:
    Make IntrControl have a system pointer rather than using a cpu pointer to get one
src/dev/sparc/SConscript:
    add iob to SConsscrip
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out:
    update config.ini/out for intrcntrl not having a cpu pointer anymore

--HG--
extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
 2007-03-03 17:22:47 -05:00
Gabe Black
5498d52985 Filled in with basic x86 stuff. Some things are missing, wrong, or nonsensical for x86. 
--HG--
extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39
 2007-03-03 17:19:52 +00:00
Gabe Black
0150515ac3 Filled in with basic x86 information. Some things are missing, wrong, or non-sensical in x86. 
--HG--
extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
 2007-03-03 17:18:29 +00:00
Gabe Black
10871b7342 Add build hooks for x86. 
--HG--
extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
 2007-03-03 16:01:48 +00:00
Gabe Black
23dc5099a4 Implement the _llseek syscall. It's Linux only, so we'll actually use the lseek syscall. 
--HG--
extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
 2007-03-03 03:34:55 +00:00
Gabe Black
477afcaf5b Fix some issues with 32 bit processes. 
--HG--
extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
 2007-03-03 03:34:54 +00:00
Ali Saidi
4e8d2d1593 make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way as the twin 64 bit loads 
src/arch/isa_parser.py:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/operands.isa:
src/base/bigint.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
src/mem/packet_access.hh:
    make ldtw(a) Twin 32 bit load work correctly

--HG--
extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42
 2007-03-02 22:34:51 -05:00
Gabe Black
d8ada247f4 Forgot to commit this new file last earlier. 
--HG--
extra : convert_revision : f2d80ae551b7e29426141d5c9fe355b43a0b9c7d
 2007-03-02 14:43:27 +00:00
Gabe Black
ececf101c7 Make the m5 psuedo instructions use the BasicOperate format 
--HG--
extra : convert_revision : f02da702ab9b99da124fac7e10a07386b04f3a0f
 2007-02-28 16:49:17 +00:00
Gabe Black
eb57b4f214 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32

--HG--
extra : convert_revision : 88d1401f6e6b7c82344abef2c81b3c22bf6a0499
 2007-02-28 16:39:42 +00:00
Gabe Black
29e5df890d Make trap instructions always generate TrapInstruction Fault objects which call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running. 
--HG--
extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94
 2007-02-28 16:36:38 +00:00
Gabe Black
99948060b2 The "hostname" variable isn't used in the process classes. It should be removed from the other ones as well. 
--HG--
extra : convert_revision : 0c07534de42d6c32ac26d9e43709111e3ab30d57
 2007-02-28 16:29:25 +00:00
Ali Saidi
f892608ff7 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : a4f80ce975a23ba9858e6bf2dbbfed8897dd1810
 2007-02-24 22:10:06 -05:00
Ali Saidi
cf0e202cba make m5 readfile work on solaris... we can have a solaris regression soon! 
src/arch/sparc/isa/decoder.isa:
    add readfile and break to sparc decoder
src/arch/sparc/isa/operands.isa:
    fix O0-O5 operands registers
util/m5/Makefile.sparc:
    Make sparc makefile compile a 64bit binary
util/m5/m5.c:
    readfile was in here twice, once will be sufficient I think
util/m5/m5op_sparc.S:
    implement readfile and debugbreak

--HG--
extra : convert_revision : 139b3f480ee6342b37b5642e072c8486d91a3944
 2007-02-24 22:05:01 -05:00
Gabe Black
6ae4cae971 Ali and I both made the same change and we only need it once. I liked mine a little better. 
--HG--
extra : convert_revision : 3a1b7856e6143ca089fd6e36492608377dfede19
 2007-02-23 01:05:34 +00:00
Gabe Black
187cc99e4e Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32

--HG--
extra : convert_revision : a7697ea8457a03318e3fcf34775bf3ecc4786e8a
 2007-02-23 01:05:33 +00:00
Gabe Black
34b4722aee Make the m5 pseudo instructions only work in FS. Also, make sure any undefined opcodes in impdep2 (which in SE is all of them) trap with an illegal_instruction exception. 
--HG--
extra : convert_revision : dd7848d0685e4cc6f5fd5e3b846a3f70b62ee30a
 2007-02-22 13:17:51 +00:00
Ali Saidi
63fef6b011 fix se compiling oops 
--HG--
extra : convert_revision : ce7ac94da0ed6bad457a8a9e4c949b0c3b09c2ae
 2007-02-22 01:11:04 -05:00
Ali Saidi
f01f8f1be6 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 4105ebbeca59206bece27f229ee810d594fb4310
 2007-02-21 21:06:29 -05:00
Ali Saidi
7a2ecf9e26 add pseduo instruction support for sparc 
util/m5/Makefile.alpha:
    Clean up to make it a bit easier to muck with
util/m5/Makefile.alpha:
    Make the makefile more reasonable
util/m5/Makefile.alpha:
    Remove authors from copyright.
util/m5/Makefile.alpha:
    Updated Authors from bk prs info
util/m5/Makefile.alpha:
    bk cp Makefile Makefile.alpha
src/arch/sparc/tlb.cc:
    Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate
src/arch/alpha/isa/decoder.isa:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
    Rename AlphaPseudo -> PseudoInst since it's all generic
src/arch/sparc/isa/bitfields.isa:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/includes.isa:
src/arch/sparc/isa/operands.isa:
    Add support for pseudo instructions in sparc
util/m5/Makefile.alpha:
util/m5/Makefile.sparc:
    split off alpha make file and sparc make file for m5 app
util/m5/m5.c:
    ivle and ivlb aren't used anymore
util/m5/m5op.h:
    stdint seems like a more generic better fit here
util/m5/m5op_alpha.S:
    move the op ids into their own header file since we can share them between sparc and alpha

--HG--
rename : util/m5/Makefile => util/m5/Makefile.sparc
rename : util/m5/m5op.S => util/m5/m5op_alpha.S
extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
 2007-02-21 21:06:17 -05:00
Nathan Binkert
06ae2d0445 Fix compile issues on gcc 4.1.x related to namespaces. 
This basically involves moving the builder code outside of any
namespace.  While we're at it, move a few braces outside of
a couple #if/#else/#endif blocks so it's easier to match up
the braces.

--HG--
extra : convert_revision : a7834532aadc63b0e0ff988dd5745049e02e6312
 2007-02-21 16:42:16 -08:00
Nathan Binkert
5000c4d878 #include needed for compile 
--HG--
extra : convert_revision : fda9ab0d04f77f27810018a8639d6ea8abb59326
 2007-02-21 10:13:10 -08:00
Ali Saidi
bd367d4825 implement vtophys and 32bit gdb support 
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/sparc/arguments.hh:
    move Copy* to vport since it's generic for all the ISAs
src/arch/sparc/isa_traits.hh:
    the Solaris kernel sets up a virtual-> real mapping for all memory starting at SegKPMBase
src/arch/sparc/pagetable.hh:
    add a class for getting bits out of the TteTag
src/arch/sparc/remote_gdb.cc:
    add 32bit support kinda.... If its 32 bit
src/arch/sparc/remote_gdb.hh:
    Add 32bit register offsets too.
src/arch/sparc/tlb.cc:
    cleanup generation of tsb pointers
src/arch/sparc/tlb.hh:
    add function to return tsb pointers for an address
    make lookup public so vtophys can use it
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
    write vtophys for sparc
src/base/bitfield.hh:
    return a mask of bits first->last
src/mem/vport.cc:
src/mem/vport.hh:
    move Copy* here since it's ISA generic

--HG--
extra : convert_revision : c42c331e396c0d51a2789029d8e232fe66995d0f
 2007-02-18 19:57:46 -05:00
Ali Saidi
e8cd54e805 fixup remote gdb support for sparc fs 
--HG--
extra : convert_revision : 5edf0ad492fe438d66bcf0ae469ef841cd71e157
 2007-02-15 15:24:08 -05:00
Steve Reinhardt
f55fd68f88 Update MIPS ISA description to work with new write result interface 
for store conditional.

--HG--
extra : convert_revision : 73efd2ca17994e0e19c08746441874a2ac8183af
 2007-02-13 08:09:09 -08:00
Ali Saidi
ca5cd68df4 fix compiling problems 
--HG--
extra : convert_revision : 9ecfd5a0a151c03503e42faf98240da12fd719b1
 2007-02-13 10:07:50 -05:00
Ali Saidi
49a9378718 make hver match legion 
--HG--
extra : convert_revision : 5bfe4b943ca5b3e30a7097a46cab4f93dadd714f
 2007-02-12 13:58:03 -05:00
Ali Saidi
b9005f3562 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

src/cpu/simple/atomic.cc:
    merge steve's changes in.

--HG--
extra : convert_revision : a17eda37cd63c9380af6fe68b0aef4b1e1974231
 2007-02-12 13:22:36 -05:00
Ali Saidi
b5a4d95811 rename store conditional stuff as extra data so it can be used for conditional swaps as well 
Add support for a twin 64 bit int load
Add Memory barrier and write barrier flags as appropriate
Make atomic memory ops atomic

src/arch/alpha/isa/mem.isa:
src/arch/alpha/locked_mem.hh:
src/cpu/base_dyn_inst.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_impl.hh:
    rename store conditional stuff as extra data so it can be used for conditional swaps as well
src/arch/alpha/types.hh:
src/arch/mips/types.hh:
src/arch/sparc/types.hh:
    add a largest read data type for statically allocating read buffers in atomic simple cpu
src/arch/isa_parser.py:
    Add support for a twin 64 bit int load
src/arch/sparc/isa/decoder.isa:
    Make atomic memory ops atomic
    Add Memory barrier and write barrier flags as appropriate
src/arch/sparc/isa/formats/mem/basicmem.isa:
    add post access code block and define a twinload format for twin loads
src/arch/sparc/isa/formats/mem/blockmem.isa:
    remove old microcoded twin load coad
src/arch/sparc/isa/formats/mem/mem.isa:
    swap.isa replaces the code in loadstore.isa
src/arch/sparc/isa/formats/mem/util.isa:
    add a post access code block
src/arch/sparc/isa/includes.isa:
    need bigint.hh for Twin64_t
src/arch/sparc/isa/operands.isa:
    add a twin 64 int type
src/cpu/simple/atomic.cc:
src/cpu/simple/atomic.hh:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
    add support for twinloads
    add support for swap and conditional swap instructions
    rename store conditional stuff as extra data so it can be used for conditional swaps as well
src/mem/packet.cc:
src/mem/packet.hh:
    Add support for atomic swap memory commands
src/mem/packet_access.hh:
    Add endian conversion function for Twin64_t type
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/request.hh:
    Add support for atomic swap memory commands
    Rename sc code to extradata

--HG--
extra : convert_revision : 69d908512fb34a4e28b29a6e58b807fb1a6b1656
 2007-02-12 13:06:30 -05:00
Steve Reinhardt
ad17b32651 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : 496428e23050122a8a0029e5fddea261bef5729e
 2007-02-12 09:27:32 -08:00
Steve Reinhardt
f78bc80bd7 Move store conditional result checking from SimpleAtomicCpu write 
function into Alpha ISA description.  write now just generically
returns a result value if the res pointer is non-null (which means
we can only provide a res pointer if we expect a valid result
value).

--HG--
extra : convert_revision : fb1c315515787f5fbbf7d1af7e428bdbfe8148b8
 2007-02-12 09:26:47 -08:00
Ali Saidi
8ffd12e807 merge my index fix and lisa's fix 
--HG--
extra : convert_revision : 5f2c7d46c96fa061bbfb66edf188d405ca600020
 2007-02-06 18:47:42 -05:00
Ali Saidi
ebb6972dd3 more fp fixes 
fix unaligned accesses in mmaped disk device

src/arch/sparc/isa/decoder.isa:
    get (ld|st)fsr ops working right. In reality the fp enable check needs to go higher up in the emitted code
src/arch/sparc/isa/formats/basic.isa:
    move the cexec into the aexec field
src/cpu/exetrace.cc:
    copy the exception state from legion when we get it wrong. We aren't going to get it right without an fp emulation layer
src/dev/sparc/mm_disk.cc:
src/dev/sparc/mm_disk.hh:
    fix unaligned accesses in the memory mapped disk device

--HG--
extra : convert_revision : aaa33096b08cf0563fe291d984a87493a117e528
 2007-02-06 15:52:33 -05:00
Ali Saidi
ecef27f172 more sparc fixes 
src/arch/sparc/isa/decoder.isa:
    fix rdgsr fault check
src/arch/sparc/tlb.cc:
    block asis are now supported

--HG--
extra : convert_revision : cf55d648d2c5184fab03b6fe057d0e33c1dfc393
 2007-02-02 19:02:27 -05:00
Ali Saidi
665ddde57a make interrupt code serialize itself and fix indenting 
--HG--
extra : convert_revision : d0bb23c7922568586b640084ac719e809cc8422f
 2007-02-02 18:05:21 -05:00
Ali Saidi
592f35ac0f fix mostly floating point related 
src/arch/sparc/floatregfile.cc:
    fix fp read/writing to registers... looking for suggestions on cleaner ways if anyone has them
src/arch/sparc/isa/decoder.isa:
    fix some fp implementations
src/arch/sparc/isa/formats/basic.isa:
    add new fp op class that 0 cexec in fsr and sets rounding mode for the up comming op
src/arch/sparc/isa/includes.isa:
    include the appropriate header files for the rounding code
src/arch/sparc/miscregfile.cc:
    print fsr out when it's read/written and the Sparc traceflgas in on
src/cpu/exetrace.cc:
    fix printing of float registers

--HG--
extra : convert_revision : 49faab27f2e786a8455f9ca0f3f0132380c9d992
 2007-02-02 18:04:42 -05:00
Lisa Hsu
17cbfe55fd Merge zizzer:/bk/newmem 
into  zed.eecs.umich.edu:/z/hsul/work/sparc/x86.m5

--HG--
extra : convert_revision : 62a0017a1147631513db7878f4e4d08fca776bc1
 2007-02-01 15:35:26 -05:00
Lisa Hsu
1e8bbb81cb only increment numPosted if an interrupt of that type hasn't been posted before. 
--HG--
extra : convert_revision : 6671c594b78d2e38449069157f39af96b81340f2
 2007-02-01 15:34:52 -05:00
Ali Saidi
5c7192daed make sparc fs less chatty 
src/SConscript:
    strip doesn't take a src and dest in solaris

--HG--
extra : convert_revision : 57f95eda0e3232475a5b55753ace3f3f0fced8b3
 2007-01-31 18:32:27 -05:00
Ali Saidi
36a1912bf0 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 276b640c5c5a51e88e9bd630960ad462d9f0cb8d
 2007-01-30 18:27:16 -05:00
Ali Saidi
fc79ace502 Make SPARC checkpointing work 
src/arch/sparc/floatregfile.cc:
    Fix serialization for fpreg
src/arch/sparc/intregfile.cc:
    fix serialization for intreg
src/arch/sparc/miscregfile.cc:
    fix serialization from miscreg
src/arch/sparc/pagetable.cc:
    fix serialization for page table
src/arch/sparc/regfile.cc:
    need to serialize nnpc
src/arch/sparc/tlb.cc:
    write serialization code for tlb
src/cpu/base.cc:
    provide a way to find the thread number a context is
    serialize the instruction counter
src/cpu/base.hh:
    provide a way to find the thread number a context is
    and given a thread number find a context pointer
src/cpu/cpuevent.hh:
    provide method to get thread context from a cpu event for serialization
src/dev/sparc/t1000.cc:
src/dev/sparc/t1000.hh:
    nothing to serialize in t1000
src/sim/serialize.cc:
src/sim/serialize.hh:
    Make findObj() work (it hasn't since we did the python conversion stuff)

--HG--
extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
 2007-01-30 18:25:39 -05:00
Gabe Black
cf0ba1dfb0 Merge zizzer:/bk/newmem 
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 7b332ee4c737206511d26db391117eb1fe5ea290
 2007-01-30 16:12:47 -05:00
Gabe Black
efb14c585b Implemented fbfss and fbpfcc instructions, and cleaned up branch code a little. 
src/arch/sparc/isa/base.isa:
    Added passesFpCondition function to help with fbfcc and fbpfcc instructions.
src/arch/sparc/isa/decoder.isa:
    Added fbfcc and fbpfcc instructions, and cleaned up branch code slightly.
src/arch/sparc/isa/formats/branch.isa:
    Minor cleanup.

--HG--
extra : convert_revision : 6586b46418f1f70bace41407f267fee30c657714
 2007-01-30 16:12:38 -05:00
Ali Saidi
8bc4925775 change std::isnan() to a using namespace std and isnan(). We need a better way to do this. 
--HG--
extra : convert_revision : 4f59ca8e6425db23f57a1f3f65a4874e483d0ecc
 2007-01-30 14:43:25 -05:00
Ali Saidi
e82e5b5084 use std:: for isnan() and fix decoding of fcmpe* 
--HG--
extra : convert_revision : 06be0f8572e26c3c7e761b482248304ce1afa038
 2007-01-30 11:22:22 -05:00
Gabe Black
a4a87daad1 Make clearSingleStep in SPARC a warning, and rephrase the panic for setSingleStep 
--HG--
extra : convert_revision : fde27a1faa6c03a24a4321a153dfa89a438f9a32
 2007-01-30 02:44:24 -05:00
Gabe Black
e3fad2dcea Make the FpUnimpl format actually write the Fsr. 
--HG--
extra : convert_revision : 84717cd3a8fa9fb85bd0693304e05ef475b05d07
 2007-01-30 00:21:18 -05:00
Gabe Black
230fc0a0d1 Added FpUnimpl format for quad precision and other purposefully unimplemented floating point ops. 
--HG--
extra : convert_revision : 356fec86c35560b20ea8eee80844602bbcec145f
 2007-01-30 00:08:42 -05:00
Gabe Black
a8b8962a4d Merge zizzer:/bk/newmem 
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 0e4a54c21f32fec13deaf00b5d61c258007f172b
 2007-01-29 22:57:18 -05:00
Gabe Black
4a16ea95c1 Fix the Frs?s operands to use single width by default, rather than double width. 
--HG--
extra : convert_revision : 36137ee025dc5c79665b041b43bd89505715ca70
 2007-01-29 22:54:28 -05:00
Gabe Black
1f7db14dd4 Add implementation for the fcmp instructions. These don't behave -quite- right with respect to quite NaNs, but hopefully we don't need to worry about the distinction. 
--HG--
extra : convert_revision : 67b6583a20530b7a393aa04d0b71031d3c72ecdd
 2007-01-29 22:52:54 -05:00
Gabe Black
a5cb9b51be Fix the FCMPCC bitfield. 
--HG--
extra : convert_revision : d2c538e7f469bd12a80eb8585c78d5325d6e6141
 2007-01-29 22:46:01 -05:00
Ali Saidi
7545b2b650 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 7b8b791815d1fb51cc7ad085307a640b2ee51642
 2007-01-29 14:44:45 -05:00