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gem5
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09f056a1ef
gem5
/
src
/
arch
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Gabe Black
09f056a1ef
Check for the two opcode prefix correctly and add in some instructions.
...
--HG-- extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97
2007-07-18 17:51:05 -07:00
..
alpha
Make name, isMachineCheckFault, and isAlignmentFault const.
2007-07-18 16:09:00 -07:00
mips
Make name, isMachineCheckFault, and isAlignmentFault const.
2007-07-18 16:09:00 -07:00
sparc
Make name, isMachineCheckFault, and isAlignmentFault const.
2007-07-18 16:09:00 -07:00
x86
Check for the two opcode prefix correctly and add in some instructions.
2007-07-18 17:51:05 -07:00
isa_parser.py
FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality...
2007-06-22 21:09:35 -04:00
isa_specific.hh
Add build hooks for x86.
2007-03-03 16:01:48 +00:00
micro_asm.py
Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols.
2007-06-21 15:26:01 +00:00
micro_asm_test.py
Add a second section to make sure the ROM is extended properly.
2007-05-31 22:21:21 +00:00
SConscript
Merge zizzer.eecs.umich.edu:/bk/newmem
2007-03-15 02:52:51 +00:00