SPARC: Long overdue cleanup of the condition code handlers.
--HG-- extra : convert_revision : ddc53a622a8f908fa48788f3b570f33fcfc25fff
This commit is contained in:
Gabe Black
parent
25b4874664
commit
b896ad584b
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@ -193,37 +193,23 @@ decode OP default Unknown::unknown()
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}
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format IntOpCc {
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0x10: addcc({{
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int64_t resTemp, val2 = Rs2_or_imm13;
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Rd = resTemp = Rs1 + val2;}},
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{{(Rs1<31:0> + val2<31:0>)<32:>}},
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{{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
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{{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}},
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{{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = op1 + op2;
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}});
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0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}});
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0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}});
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0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}});
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0x14: subcc({{
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int64_t val2 = Rs2_or_imm13;
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Rd = Rs1 - val2;}},
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{{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}},
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{{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}},
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{{(~(Rs1<63:1> + (~val2)<63:1> +
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(Rs1 | ~val2)<0:>))<63:>}},
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{{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = op1 - op2;
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}}, sub=True);
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0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}});
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0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}});
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0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}});
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0x18: addccc({{
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int64_t resTemp, val2 = Rs2_or_imm13;
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int64_t carryin = Ccr<0:0>;
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Rd = resTemp = Rs1 + val2 + carryin;}},
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{{(Rs1<31:0> + val2<31:0> + carryin)<32:>}},
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{{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
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{{((Rs1 & val2) | (~resTemp & (Rs1 | val2)))<63:>}},
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{{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = op1 + op2 + Ccr<0:>;
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}});
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0x1A: IntOpCcRes::umulcc({{
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uint64_t resTemp;
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Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>;
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@ -233,107 +219,80 @@ decode OP default Unknown::unknown()
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Rd = resTemp = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>);
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Y = resTemp<63:32>;}});
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0x1C: subccc({{
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int64_t resTemp, val2 = Rs2_or_imm13;
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int64_t carryin = Ccr<0:0>;
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Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}},
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{{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<31:>}},
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{{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}},
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{{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<63:>}},
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{{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = op1 - op2 - Ccr<0:>;
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}}, sub=True);
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0x1D: IntOpCcRes::udivxcc({{
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if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero;
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else Rd = Rs1.udw / Rs2_or_imm13.udw;}});
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0x1E: udivcc({{
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uint32_t resTemp, val2 = Rs2_or_imm13.udw;
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int32_t overflow = 0;
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if(val2 == 0) fault = new DivisionByZero;
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else
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{
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resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2;
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overflow = (resTemp<63:32> != 0);
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if(overflow) Rd = resTemp = 0xFFFFFFFF;
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else Rd = resTemp;
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} }},
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{{0}},
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{{overflow}},
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{{0}},
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{{0}}
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);
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0x1F: sdivcc({{
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int64_t val2 = Rs2_or_imm13.sdw<31:0>;
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bool overflow = false, underflow = false;
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if(val2 == 0) fault = new DivisionByZero;
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else
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{
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Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2;
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overflow = ((int64_t)Rd >= std::numeric_limits<int32_t>::max());
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underflow = ((int64_t)Rd <= std::numeric_limits<int32_t>::min());
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if(overflow) Rd = 0x7FFFFFFF;
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else if(underflow) Rd = ULL(0xFFFFFFFF80000000);
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} }},
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{{0}},
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{{overflow || underflow}},
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{{0}},
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{{0}}
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);
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0x1E: IntOpCcRes::udivcc({{
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uint32_t resTemp, val2 = Rs2_or_imm13.udw;
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int32_t overflow = 0;
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if(val2 == 0) fault = new DivisionByZero;
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else
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{
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resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2;
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overflow = (resTemp<63:32> != 0);
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if(overflow) Rd = resTemp = 0xFFFFFFFF;
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else Rd = resTemp;
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}
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}}, iv={{overflow}});
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0x1F: IntOpCcRes::sdivcc({{
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int64_t val2 = Rs2_or_imm13.sdw<31:0>;
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bool overflow = false, underflow = false;
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if(val2 == 0) fault = new DivisionByZero;
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else
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{
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Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2;
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overflow = ((int64_t)Rd >= std::numeric_limits<int32_t>::max());
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underflow = ((int64_t)Rd <= std::numeric_limits<int32_t>::min());
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if(overflow) Rd = 0x7FFFFFFF;
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else if(underflow) Rd = ULL(0xFFFFFFFF80000000);
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}
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}}, iv={{overflow || underflow}});
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0x20: taddcc({{
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int64_t resTemp, val2 = Rs2_or_imm13;
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Rd = resTemp = Rs1 + val2;
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int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}},
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{{((Rs1<31:0> + val2<31:0>)<32:0>)}},
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{{overflow}},
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{{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
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{{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = Rs1 + op2;
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}}, iv={{
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(op1 & mask(2)) || (op2 & mask(2)) ||
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findOverflow(32, res, op1, op2)
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}});
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0x21: tsubcc({{
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int64_t resTemp, val2 = Rs2_or_imm13;
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Rd = resTemp = Rs1 + val2;
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int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}},
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{{(Rs1<31:0> + val2<31:0>)<32:0>}},
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{{overflow}},
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{{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
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{{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = Rs1 - op2;
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}}, iv={{
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(op1 & mask(2)) || (op2 & mask(2)) ||
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findOverflow(32, res, op1, ~op2)
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}}, sub=True);
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0x22: taddcctv({{
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int64_t val2 = Rs2_or_imm13;
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Rd = Rs1 + val2;
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int32_t overflow = Rs1<1:0> || val2<1:0> ||
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(Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>);
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if(overflow) fault = new TagOverflow;}},
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{{((Rs1<31:0> + val2<31:0>)<32:0>)}},
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{{overflow}},
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{{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
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{{Rs1<63:> == val2<63:> && val2<63:> != Rd<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = op1 + op2;
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bool overflow = (op1 & mask(2)) || (op2 & mask(2)) ||
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findOverflow(32, res, op1, op2);
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if(overflow) fault = new TagOverflow;
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}}, iv={{overflow}});
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0x23: tsubcctv({{
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int64_t resTemp, val2 = Rs2_or_imm13;
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Rd = resTemp = Rs1 + val2;
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int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);
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if(overflow) fault = new TagOverflow;}},
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{{((Rs1<31:0> + val2<31:0>)<32:0>)}},
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{{overflow}},
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{{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
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{{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
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);
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int64_t res, op1 = Rs1, op2 = Rs2_or_imm13;
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Rd = res = op1 - op2;
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bool overflow = (op1 & mask(2)) || (op2 & mask(2)) ||
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findOverflow(32, res, op1, ~op2);
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if(overflow) fault = new TagOverflow;
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}}, iv={{overflow}}, sub=True);
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0x24: mulscc({{
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int32_t savedLSB = Rs1<0:>;
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int32_t savedLSB = Rs1<0:>;
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//Step 1
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int64_t multiplicand = Rs2_or_imm13;
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//Step 2
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int32_t partialP = Rs1<31:1> |
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((Ccr<3:3> ^ Ccr<1:1>) << 31);
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//Step 3
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int32_t added = Y<0:> ? multiplicand : 0;
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Rd = partialP + added;
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//Steps 4 & 5
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Y = Y<31:1> | (savedLSB << 31);}},
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{{((partialP<31:0> + added<31:0>)<32:0>)}},
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{{partialP<31:> == added<31:> && added<31:> != Rd<31:>}},
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{{((partialP >> 1) + (added >> 1) + (partialP & added & 0x1))<63:>}},
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{{partialP<63:> == added<63:> && partialP<63:> != Rd<63:>}}
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);
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//Step 1
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int64_t multiplicand = Rs2_or_imm13;
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//Step 2
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int32_t partialP = Rs1<31:1> |
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((Ccr<3:3> ^ Ccr<1:1>) << 31);
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//Step 3
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int32_t added = Y<0:> ? multiplicand : 0;
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int64_t res, op1 = partialP, op2 = added;
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Rd = res = partialP + added;
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//Steps 4 & 5
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Y = Y<31:1> | (savedLSB << 31);
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}});
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}
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format IntOp
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{
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@ -287,10 +287,10 @@ let {{
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_iz = ((Rd & 0xFFFFFFFF) == 0);
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_xn = (Rd >> 63) & 1;
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_xz = (Rd == 0);
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_iv = %(ivValue)s & 1;
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_ic = %(icValue)s & 1;
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_xv = %(xvValue)s & 1;
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_xc = %(xcValue)s & 1;
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_iv = %(iv)s & 1;
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_ic = %(ic)s & 1;
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_xv = %(xv)s & 1;
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_xc = %(xc)s & 1;
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Ccr = _ic << 0 | _iv << 1 | _iz << 2 | _in << 3 |
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_xc << 4 | _xv << 5 | _xz << 6 | _xn << 7;
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@ -305,6 +305,15 @@ let {{
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DPRINTF(Sparc, "xv = %%d\\n", _xv);
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DPRINTF(Sparc, "xc = %%d\\n", _xc);
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'''
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default_ic = "findCarry(32, res, op1, op2)"
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default_iv = "findOverflow(32, res, op1, op2)"
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default_xc = "findCarry(64, res, op1, op2)"
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default_xv = "findOverflow(64, res, op1, op2)"
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default_sub_ic = "!findCarry(32, res, op1, ~op2)"
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default_sub_iv = "findOverflow(32, res, op1, ~op2)"
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default_sub_xc = "!findCarry(64, res, op1, ~op2)"
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default_sub_xv = "findOverflow(64, res, op1, ~op2)"
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}};
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// Primary format for integer operate instructions:
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@ -318,7 +327,24 @@ def format IntOp(code, *opt_flags) {{
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}};
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// Primary format for integer operate instructions:
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def format IntOpCc(code, icValue, ivValue, xcValue, xvValue, *opt_flags) {{
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def format IntOpCc(code, ic=default_ic, iv=default_iv,
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xc=default_xc, xv=default_xv,
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sub=False, *opt_flags) {{
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if sub == "False":
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(def_ic, def_iv, def_xc, def_xv) = \
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(default_ic, default_iv, default_xc, default_xv)
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else:
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(def_ic, def_iv, def_xc, def_xv) = \
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(default_sub_ic, default_sub_iv, default_sub_xc, default_sub_xv)
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if ic == "default_ic":
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ic = def_ic
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if iv == "default_iv":
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iv = def_iv
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if xc == "default_xc":
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xc = def_xc
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if xv == "default_xv":
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xv = def_xv
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ccCode = calcCcCode % vars()
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(header_output,
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decoder_output,
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@ -328,11 +354,8 @@ def format IntOpCc(code, icValue, ivValue, xcValue, xvValue, *opt_flags) {{
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}};
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// Primary format for integer operate instructions:
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def format IntOpCcRes(code, *opt_flags) {{
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ccCode = calcCcCode % {"icValue":"0",
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"ivValue":"0",
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"xcValue":"0",
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"xvValue":"0"}
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def format IntOpCcRes(code, ic=0, iv=0, xc=0, xv=0, *opt_flags) {{
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ccCode = calcCcCode % {"ic" : ic, "iv" : iv, "xc" : xc, "xv" : xv}
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(header_output,
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decoder_output,
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exec_output,
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@ -41,6 +41,7 @@ output header {{
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#include "arch/sparc/faults.hh"
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#include "arch/sparc/isa_traits.hh"
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#include "arch/sparc/regfile.hh"
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#include "base/condcodes.hh"
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#include "base/misc.hh"
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#include "cpu/static_inst.hh"
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#include "mem/packet.hh"
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