X86: Add some SSE floating point/integer conversion microops.
--HG-- extra : convert_revision : 2a1aa16709db940f5f40bbd84ca082f26b03b9c5
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@ -201,8 +201,10 @@
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}
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// repne (0xF2)
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0x8: decode OPCODE_OP_BOTTOM3 {
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0x2: cvtsi2sd_Vq_Ed();
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0x4: cvttsd2si_Gd_Wq();
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// The size of the V operand should be q, not dp
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0x2: Inst::CVTSI2SD(Vdp,Edp);
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// The size of the W operand should be q, not dp
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0x4: Inst::CVTTSD2SI(Gdp,Wdp);
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0x5: cvtsd2si_Gd_Wq();
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default: Inst::UD2();
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}
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@ -53,7 +53,8 @@
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#
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# Authors: Gabe Black
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categories = ["move"]
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categories = ["move",
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"convert"]
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microcode = '''
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# SSE instructions
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86
src/arch/x86/isa/insts/sse/convert.py
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86
src/arch/x86/isa/insts/sse/convert.py
Normal file
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@ -0,0 +1,86 @@
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# Copyright (c) 2007 The Hewlett-Packard Development Company
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# All rights reserved.
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#
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# Redistribution and use of this software in source and binary forms,
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# with or without modification, are permitted provided that the
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# following conditions are met:
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#
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# The software must be used only for Non-Commercial Use which means any
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# use which is NOT directed to receiving any direct monetary
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# compensation for, or commercial advantage from such use. Illustrative
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# examples of non-commercial use are academic research, personal study,
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# teaching, education and corporate research & development.
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# Illustrative examples of commercial use are distributing products for
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# commercial advantage and providing services using the software for
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# commercial advantage.
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#
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# If you wish to use this software or functionality therein that may be
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# covered by patents for commercial use, please contact:
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# Director of Intellectual Property Licensing
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# Office of Strategy and Technology
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# Hewlett-Packard Company
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# 1501 Page Mill Road
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# Palo Alto, California 94304
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#
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# Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer. Redistributions
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# in binary form must reproduce the above copyright notice, this list of
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# conditions and the following disclaimer in the documentation and/or
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# other materials provided with the distribution. Neither the name of
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# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission. No right of
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# sublicense is granted herewith. Derivatives of the software and
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# output created using the software may be prepared, but only for
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# Non-Commercial Uses. Derivatives of the software may be shared with
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# others provided: (i) the others agree to abide by the list of
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# conditions herein which includes the Non-Commercial Use restrictions;
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# and (ii) such Derivatives of the software include the above copyright
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# notice to acknowledge the contribution from this software where
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# applicable, this list of conditions and the disclaimer below.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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microcode = '''
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def macroop CVTSI2SD_R_R {
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cvtf_i2d xmml, regm
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};
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def macroop CVTSI2SD_R_M {
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ld t1, seg, sib, disp
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cvtf_i2d xmml, t1
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};
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def macroop CVTSI2SD_R_P {
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rdip t7
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ld t1, seg, riprel, disp
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cvtf_i2d xmml, t1
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};
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def macroop CVTTSD2SI_R_R {
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cvtf_d2i reg, xmmlm
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};
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def macroop CVTTSD2SI_R_M {
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ldfp ufp1, seg, sib, disp
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cvtf_d2i reg, ufp1
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};
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def macroop CVTTSD2SI_R_P {
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rdip t7
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ldfp ufp1, seg, riprel, disp
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cvtf_d2i reg, ufp1
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};
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'''
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@ -221,6 +221,11 @@ let {{
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self.dataSize = 1
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elif self.size == 'd':
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self.dataSize = 4
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#This is for "double plus" which is normally a double word unless
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#the REX W bit is set, in which case it's a quad word. It's used
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#for some SSE instructions.
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elif self.size == 'dp':
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self.dataSize = "(REX_W ? 8 : 4)"
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elif self.size == 'q':
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self.dataSize = 8
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elif self.size == 'v':
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@ -251,7 +256,7 @@ let {{
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if not self.size:
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self.size = size
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else:
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if self.size is not size:
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if self.size != size:
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raise Exception, "Conflicting register sizes %s and %s!" %\
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(self.size, size)
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}};
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@ -636,4 +636,23 @@ let {{
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class Zext(RegOp):
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code = 'DestReg = bits(psrc1, imm8-1, 0);'
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# Conversion microops
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class ConvOp(RegOp):
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abstract = True
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def __init__(self, dest, src1):
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super(ConvOp, self).__init__(dest, src1, "NUM_INTREGS")
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#FIXME This needs to always use 32 bits unless REX.W is present
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class cvtf_i2d(ConvOp):
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code = 'FpDestReg = psrc1;'
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class cvtf_i2d_hi(ConvOp):
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code = 'FpDestReg = bits(SrcReg1, 63, 32);'
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class cvtf_d2i(ConvOp):
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code = '''
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int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
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DestReg = merge(DestReg, intSrcReg1, dataSize);
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'''
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}};
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