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X86: Added some new versions of MOV and a new argument type tag.

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--HG--
extra : convert_revision : e21b2062d68baa983c7c631b3e1fe3149de56427
This commit is contained in:
Gabe Black 2007-10-12 20:08:12 -07:00
parent d82d3bbda5
commit 0d6383b69e
3 changed files with 23 additions and 10 deletions
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20
src/arch/x86/isa/decoder/one_byte_opcodes.isa
View file

@ -325,17 +325,17 @@
default: lahf();
}
}
0x14: decode OPCODE_OP_BOTTOM3 {
0x0: mov_Al_Ob();
0x1: mov_rAX_Ov();
0x2: mov_Ob_Al();
0x3: mov_Ov_rAX();
0x4: StringInst::MOVS(Yb,Xb);
0x5: StringInst::MOVS(Yv,Xv);
0x6: StringTestInst::CMPS(Yb,Xb);
0x7: StringTestInst::CMPS(Yv,Xv);
}
format Inst {
0x14: decode OPCODE_OP_BOTTOM3 {
0x0: MOV(rAb, Ob);
0x1: MOV(rAv, Ov);
0x2: MOV(Ob, rAb);
0x3: MOV(Ov, rAv);
0x4: StringInst::MOVS(Yb,Xb);
0x5: StringInst::MOVS(Yv,Xv);
0x6: StringTestInst::CMPS(Yb,Xb);
0x7: StringTestInst::CMPS(Yv,Xv);
}
0x15: decode OPCODE_OP_BOTTOM3 {
0x0: TEST(rAb,Ib);
0x1: TEST(rAv,Iz);

10
src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
View file

@ -59,6 +59,16 @@ microcode = '''
# Regular moves
#
def macroop MOV_R_MI {
limm t1, imm
ld reg, seg, [1, t0, t1]
};
def macroop MOV_MI_R {
limm t1, imm
st reg, seg, [1, t0, t1]
};
def macroop MOV_R_R {
mov reg, reg, regm
};

3
src/arch/x86/isa/specialize.isa
View file

@ -172,6 +172,9 @@ let {{
elif opType.tag in ("I", "J"):
# Immediates
Name += "_I"
elif opType.tag == "O":
# Immediate containing a memory offset
Name += "_MI"
elif opType.tag in ("PR", "R", "VR"):
# Non register modrm settings should cause an error
env.addReg(ModRMRMIndex)