Gabe Black 9e975a7e08 X86: Implement shift-by-one instructions, and make register shifts use registers. ... --HG-- extra : convert_revision : ce4af3e56b45821e0a8b27f288b532d2f9dd3336		2007-07-26 22:09:24 -07:00
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alpha	Major changes to how SimObjects are created and initialized. Almost all	2007-07-23 21:51:38 -07:00
mips	Make name, isMachineCheckFault, and isAlignmentFault const.	2007-07-18 16:09:00 -07:00
sparc	Major changes to how SimObjects are created and initialized. Almost all	2007-07-23 21:51:38 -07:00
x86	X86: Implement shift-by-one instructions, and make register shifts use registers.	2007-07-26 22:09:24 -07:00
isa_parser.py	Fixed line number accounting	2007-07-20 23:12:26 -07:00
isa_specific.hh	Add build hooks for x86.	2007-03-03 16:01:48 +00:00
micro_asm.py	Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols.	2007-06-21 15:26:01 +00:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	Merge zizzer.eecs.umich.edu:/bk/newmem	2007-03-15 02:52:51 +00:00