Derek Hower
26990dc492
slicc: removed unused atomics code from StateMachine
2009-09-25 17:47:38 -05:00
Korey Sewell
25d1f2728a
inorder-debug: fix cpu tick debug message
2009-09-25 11:18:55 -04:00
Nathan Binkert
baca1f0566
isa_parser: Turn the ISA Parser into a subclass of Grammar.
...
This is to prepare for future cleanup where we allow SCons to create a
separate grammar class for each ISA
2009-09-23 18:28:29 -07:00
Nathan Binkert
bae6a4a4d9
ply grammar: Fixup Tokenizer class so you can get lexer arguments
2009-09-23 18:28:29 -07:00
Nathan Binkert
be0d74d6f6
ruby: Disable all debug output by default
2009-09-23 18:17:11 -07:00
Nathan Binkert
d9f39c8ce7
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
2009-09-23 08:34:21 -07:00
Nathan Binkert
2278363015
slicc: Pure python implementation of slicc.
...
This is simply a translation of the C++ slicc into python with very minimal
reorganization of the code. The output can be verified as nearly identical
by doing a "diff -wBur".
Slicc can easily be run manually by using util/slicc
2009-09-22 18:12:39 -07:00
Nathan Binkert
30d5d95b6a
params: small cleanup to param description internals
2009-09-22 15:24:16 -07:00
Nathan Binkert
e9288b2cd3
scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access
2009-09-22 15:24:16 -07:00
Nathan Binkert
9a8cb7db7e
python: Move more code into m5.util allow SCons to use that code.
...
Get rid of misc.py and just stick misc things in __init__.py
Move utility functions out of SCons files and into m5.util
Move utility type stuff from m5/__init__.py to m5/util/__init__.py
Remove buildEnv from m5 and allow access only from m5.defines
Rename AddToPath to addToPath while we're moving it to m5.util
Rename read_command to readCommand while we're moving it
Rename compare_versions to compareVersions while we're moving it.
--HG--
rename : src/python/m5/convert.py => src/python/m5/util/convert.py
rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
2009-09-22 15:24:16 -07:00
Nathan Binkert
0d58d32ad5
multiattrdict: make multilevel nesting work properly
2009-09-22 15:24:16 -07:00
Nathan Binkert
eec67312b5
attrdict: add pickle support to attrdict
2009-09-22 15:24:16 -07:00
Nathan Binkert
aa78db4ada
code_formatter: use __builtin__ which is correct, not __builtins__
2009-09-22 15:24:16 -07:00
Polina Dudnik
4f463b3a26
Atomics bug fix
2009-09-21 13:04:52 -05:00
Polina Dudnik
114d8724dd
Functionality migrated to sequencer.
2009-09-17 17:39:52 -05:00
Korey Sewell
b7094ec38b
mips: fix command line arguments
...
arguments were not being saved correctly into M5 memory
2009-09-17 15:59:43 -04:00
Korey Sewell
6f7e196113
inorder-mdu: multiplier latency fix
...
mdu was workign incorrectly for 4+ latency due to incorrectly assuming
multiply was finished the next stage
2009-09-17 15:45:27 -04:00
Gabe Black
931405da2f
X86: Fix the expected size of the immediate offset in MOV_MI.
2009-09-17 02:56:06 -07:00
Gabe Black
c876a781a5
X86: Sign extend the immediate of wripi like the register version.
2009-09-16 19:29:51 -07:00
Gabe Black
7a0ef6c36f
X86: Make the imm8 member of immediate microops really 8 bits consistently.
2009-09-16 19:28:57 -07:00
Gabe Black
239f1dea31
X86: Fix checking the NT bit during an IRET.
2009-09-16 19:28:30 -07:00
Gabe Black
eec6bfaa9d
X86: Fix setting the busy bit in the task descriptor in LTR.
2009-09-16 19:28:01 -07:00
Soumyaroop Roy
83eebe0464
inorder-smt: remove hardcoded values
...
allows for the 2T hello world example to work in inorder model
2009-09-16 09:47:38 -04:00
Vince Weaver
9b8e61beb3
Syscalls: Implement sysinfo() syscall.
2009-09-15 22:36:47 -07:00
Derek Hower
31a3ef03cb
ruby: improve libruby_issue_request feedback
2009-09-15 21:37:40 -05:00
Derek Hower
144459032a
removed isReady from the library interface
2009-09-15 20:49:54 -05:00
Derek Hower
20da0f788c
ruby: added broadcast mechanism
2009-09-15 20:39:00 -05:00
Derek Hower
a06cfa199f
ruby: added unified assert script
2009-09-15 11:32:11 -05:00
Derek Hower
803cf3b434
ruby: made configuration parameters uniform
2009-09-15 09:47:11 -05:00
Vince Weaver
0f569b4d9d
SPARC: Make resTemp in udivcc wide enough to hold all the bits we need.
2009-09-15 05:48:20 -07:00
Vince Weaver
9900ac95b5
[mq]: x86syscalls.patch
2009-09-15 05:30:08 -07:00
Korey Sewell
badb2382a8
inorder-alpha-fs: edit inorder model to compile FS mode
2009-09-15 01:44:48 -04:00
Derek Hower
11f3f83068
ruby:removed unused code from CacheMemory
2009-09-14 17:52:46 -05:00
Derek Hower
18e328cb63
ruby: configuration updates
2009-09-14 17:11:02 -05:00
Derek Hower
62b06f4a70
ruby: removed stray printf
2009-09-14 17:09:26 -05:00
Derek Hower
75c2baa81c
merge
2009-09-11 16:23:17 -05:00
Derek Hower
6fc2a4cadc
ruby: cleaned up unified MESI/MOESI configuration
2009-09-11 16:22:59 -05:00
Polina Dudnik
c7f0cf9803
Added new MESI files
2009-09-11 16:19:31 -05:00
Derek Hower
bd770274b0
merge
2009-09-11 14:17:21 -05:00
Polina Dudnik
8cdd7265ce
Config adjustments for MESI
2009-09-11 11:07:22 -05:00
Polina Dudnik
fc9ebc60db
Somayeh's MESI protocol with Polina's bug fixes
2009-09-11 11:04:55 -05:00
Polina Dudnik
7ef3e3b2c2
MI data corruption bug fix
2009-09-11 10:59:35 -05:00
Polina Dudnik
353a69eae7
Object print bug fix
2009-09-11 10:59:08 -05:00
Polina Dudnik
2af2e590e1
MOESI data corruption bug fix
2009-09-11 10:58:37 -05:00
Derek Hower
1e40ee4ea0
Automated merge with ssh://hg@m5sim.org/m5
2009-09-10 22:02:13 -05:00
Derek Hower
0637fe0bfd
ruby: removed SMT-related Sequencer assert
2009-09-10 21:19:54 -05:00
Derek Hower
ef87b6dc82
ruby: made randomization true by default
2009-09-10 21:19:34 -05:00
Derek Hower
26acdd4f34
protocol: made MI_example work with unordered networks
2009-09-10 21:18:09 -05:00
Derek Hower
e6e3ccf5c0
ruby: made L2 request/response latency based on cache latency by default
2009-09-10 13:32:16 -05:00
Derek Hower
3bb2fcfc84
ruby: made Locked read/write atomic requests within ruby
2009-09-09 12:39:10 -05:00
Polina Dudnik
ca0e0c3683
SCons fix to always make MemTest object
2009-09-01 10:38:25 -05:00
Derek Hower
edd522b30a
Automated merge with ssh://hg@m5sim.org/m5
2009-09-01 09:36:53 -05:00
Derek Hower
849bad7ad7
ruby: fixed config assertion failure
2009-09-01 09:35:48 -05:00
Polina Dudnik
041a8cefc7
[mq]: MOESI_patch
2009-08-31 16:38:22 -05:00
Polina Dudnik
a02dbd61f9
Reset the atomics flags if RMW_Read is not followed by a RMW_Read or RMW_Write
2009-08-28 15:09:41 -05:00
Polina Dudnik
95da6dc84c
imported patch mi_patch
2009-08-28 15:04:55 -05:00
Derek Hower
15aa180570
merge
2009-08-25 10:37:21 -05:00
Derek Hower
6cd552483b
Automated merge with ssh://hg@m5sim.org/m5
2009-08-25 10:10:23 -05:00
Derek Hower
03bf748ac7
ruby: CacheMemory tag lookup uses a hash instead of a loop
2009-08-25 10:09:47 -05:00
Gabe Black
e251b42c59
Merge with head.
2009-08-23 14:19:14 -07:00
Gabe Black
d0d597004f
X86: Preserve the NO_ACCESS flag when giving CDA a specialized interface.
2009-08-23 14:16:58 -07:00
Gabe Black
ce63e50364
Atomic CPU: Respect the NO_ACCESS request flag.
2009-08-23 14:15:15 -07:00
Polina Dudnik
a4fc1bad94
[mq]: first_patch
2009-08-21 15:52:46 -05:00
Nathan Binkert
890be77362
X86: fix some simple compile issues
...
static should not be used for constants that are not inside a class definition.
2009-08-21 09:10:25 -07:00
Gabe Black
f6bb7ec4eb
RTC: Make calls to writeData update the RTCs internal representation of time.
2009-08-20 23:09:03 -07:00
Gabe Black
da3c3bfa98
X86: Make the real time clock actually keep track of time.
2009-08-20 00:42:43 -07:00
Gabe Black
e8c0ca5cd1
X86: Fix the decoding for and fill out FST and FSTP.
2009-08-20 00:42:14 -07:00
Gabe Black
843d064668
X86: Add microassembler symbols for floating point stack register operands.
2009-08-20 00:41:27 -07:00
Gabe Black
bc67396ada
X86: Don't insist on binary encoding for the RTC since we implement BCD.
2009-08-20 00:40:14 -07:00
Derek Hower
efc1dddbd8
ruby: added random seed option to config scripts
2009-08-18 16:24:09 -05:00
Gabe Black
ed088ed15e
X86: Decode the immediate byte opcode extension for 3dNow! instructions.
2009-08-18 00:52:47 -07:00
Gabe Black
fd45c04cad
X86: Decode three byte opcodes.
2009-08-18 00:52:45 -07:00
Gabe Black
a1ea10d7ba
Merge with head.
2009-08-17 22:39:10 -07:00
Gabe Black
8f49cd1123
X86: Move the simulated date in X86_FS forward to 2012.
2009-08-17 20:25:15 -07:00
Gabe Black
9df74ab401
X86: Double check the two byte portion of the decoder and fix bugs/clean up.
2009-08-17 20:25:15 -07:00
Gabe Black
92867cac95
X86: Implement MOVNTI.
2009-08-17 20:25:15 -07:00
Gabe Black
6415252a0f
X86: Initialize the MXCSR in SE mode.
2009-08-17 20:25:14 -07:00
Gabe Black
56d87cdc08
X86: Implement MOVQ2DQ.
2009-08-17 20:25:14 -07:00
Gabe Black
317a9ac6d1
X86: Implement MOVDQ2Q.
2009-08-17 20:25:14 -07:00
Gabe Black
1606663aa9
X86: Implement the media instructions that convert fp values to ints.
2009-08-17 20:25:14 -07:00
Gabe Black
e3ef432a55
X86: Implement a microop for converting fp values to ints.
2009-08-17 20:25:14 -07:00
Gabe Black
123ea3b229
X86: Implement the instructions that compare fp values and write a mask as a result.
2009-08-17 20:25:14 -07:00
Gabe Black
288f428632
X86: Implement a microop that compares fp values and writes a mask as a result.
2009-08-17 20:25:14 -07:00
Gabe Black
87ad677209
X86: Implement the instructions that compare fp values and write to rflags.
2009-08-17 20:25:14 -07:00
Gabe Black
2c9ee52c37
X86: Implement a microop that compares fp values and writes to rflags.
2009-08-17 20:25:14 -07:00
Gabe Black
7d4db7266e
X86: Implement MOVSS.
2009-08-17 20:25:14 -07:00
Gabe Black
179fd4e536
X86: Implement LDMXCSR.
2009-08-17 20:25:14 -07:00
Gabe Black
b315c3effc
X86: Implement STMXCSR.
2009-08-17 20:25:13 -07:00
Gabe Black
7fbd9e1296
X86: Implement the shuffle media instructions.
2009-08-17 20:25:13 -07:00
Gabe Black
1fed0161d9
X86: Implement a shuffle media microop.
2009-08-17 20:25:13 -07:00
Gabe Black
d9970f139a
X86: Implement the mask move instructions.
2009-08-17 20:22:56 -07:00
Gabe Black
75528a497c
X86: Implement a mask move microop.
2009-08-17 20:22:56 -07:00
Gabe Black
90dc1abd0b
X86: Implement the instructions that move sign bits.
2009-08-17 20:22:56 -07:00
Gabe Black
90786e43fc
X86: Implement a microop that moves sign bits.
2009-08-17 20:22:56 -07:00
Gabe Black
4c23e631f2
X86: Implement the insert/extract instructions.
2009-08-17 20:22:56 -07:00
Gabe Black
c0e850c77a
X86: Fix a bug in the decoder where the insert/extract instructions go.
2009-08-17 20:22:56 -07:00
Gabe Black
965e546df3
X86: Extend mov2int and mov2fp so they can support insert and extract instructions.
2009-08-17 20:22:56 -07:00
Gabe Black
2beab367d7
X86: Implement the media average instructions.
2009-08-17 20:15:16 -07:00
Gabe Black
f6b12bfa8d
X86: Implement a media average microop.
2009-08-17 20:15:16 -07:00
Gabe Black
45bae0c70f
X86: Implement the multiply and add instructions.
2009-08-17 20:15:16 -07:00
Gabe Black
200fed31de
X86: Let the integer multiply microop use every other possible source value.
2009-08-17 20:15:16 -07:00
Gabe Black
cf2fc2613d
X86: Implement the media shifts that operate on 64 bits or less at a time.
2009-08-17 20:15:16 -07:00
Gabe Black
c8a0cf5df7
X86: Implement the media shift microops. These don't handle full 128 bit wide shifts.
2009-08-17 20:15:16 -07:00
Gabe Black
dabbc7d9d3
X86: Implement the sum of absolute differences instructions.
2009-08-17 20:15:16 -07:00
Gabe Black
470dcef229
X86: Implement a "sum of absolute differences" microop.
2009-08-17 20:15:16 -07:00
Gabe Black
31d29ee3f8
X86: Implement the media integer subtract instructions.
2009-08-17 20:15:15 -07:00
Gabe Black
a4437f8f14
X86: Implement an integer media subtract microop.
2009-08-17 20:15:15 -07:00
Gabe Black
c40698e315
X86: Implement the integer media multiply instructions.
2009-08-17 20:15:15 -07:00
Gabe Black
3424de2861
X86: Implement a media integer multiply microop.
2009-08-17 20:15:15 -07:00
Gabe Black
c76459e5a7
X86: Make larger blocks of instructions use the Inst format by default.
2009-08-17 20:04:03 -07:00
Gabe Black
5d834c28eb
X86: Implement the integer media max instructions.
2009-08-17 20:04:03 -07:00
Gabe Black
c9a954c77a
X86: Implement an integer media max microop.
2009-08-17 20:04:03 -07:00
Gabe Black
be6267e895
X86: Implement the integer media min instructions.
2009-08-17 20:04:03 -07:00
Gabe Black
e2759fe69c
X86: Add a media integer min microop.
2009-08-17 20:04:02 -07:00
Gabe Black
e678df6263
X86: Implement the media integer addition instructions.
2009-08-17 20:04:02 -07:00
Gabe Black
c278760da0
X86: Implement an integer media addition microop with optional saturation.
2009-08-17 20:04:02 -07:00
Gabe Black
f5ac4f51d9
X86: Implement the instructions that convert between forms of floating point.
2009-08-17 20:04:02 -07:00
Gabe Black
83df309a7e
X86: Implement a media microop that converts between floating point data types.
2009-08-17 20:04:02 -07:00
Gabe Black
35b0983ca9
X86: Implement the instructions that compare fp values and write masks as the result.
2009-08-17 20:04:02 -07:00
Gabe Black
f122c93faa
X86: Implement a microop that compares fp values and writes a mask as its result.
2009-08-17 20:04:02 -07:00
Gabe Black
df1b3fdcfb
X86: Implement the MOVDDUP instruction.
2009-08-17 18:50:29 -07:00
Gabe Black
cf9634a43f
X86: Implement many of the media mov instructions.
2009-08-17 18:44:44 -07:00
Gabe Black
ae64377afe
X86: Implement the media instructions that convert integer values to floating point.
2009-08-17 18:41:27 -07:00
Gabe Black
8e97cd9c8f
X86: Implement a media microop for converting integer values to floating point.
2009-08-17 18:41:25 -07:00
Gabe Black
b34b507fd8
X86: Implement the floating point media instructions.
2009-08-17 18:40:40 -07:00
Gabe Black
af3a53726b
X86: Implement a floating point media divide microop.
2009-08-17 18:40:38 -07:00
Gabe Black
fcb5b2226c
X86: Implement the floating point media multiply instructions.
2009-08-17 18:38:53 -07:00
Gabe Black
94e771e283
X86: Implement a floating point media multiply microop.
2009-08-17 18:38:51 -07:00
Gabe Black
dd81a34829
X86: Implement the floating point media subtract instructions.
2009-08-17 18:36:20 -07:00
Gabe Black
9fee8b75aa
X86: Implement a media floating point subtract microop.
2009-08-17 18:36:18 -07:00
Gabe Black
49c2610c04
X86: Implement the floating point media add instructions.
2009-08-17 18:35:06 -07:00
Gabe Black
df163284fc
X86: Implement a floating point media add microop.
2009-08-17 18:35:04 -07:00
Gabe Black
449db8a370
X86: Implement the media sqrt instructions.
2009-08-17 18:34:19 -07:00
Gabe Black
6a923c1c79
X86: Implement a media square root microop.
2009-08-17 18:34:16 -07:00
Gabe Black
09eed9ff62
X86: Implement the media floating point max instructions.
2009-08-17 18:33:28 -07:00
Gabe Black
8d37ce8652
X86: Implement the floating point media max microop.
2009-08-17 18:33:25 -07:00
Gabe Black
34f528bd95
X86: Implement the media floating point min instructions.
2009-08-17 18:32:12 -07:00
Gabe Black
1d706c0434
X86: Implement a floating point media min microop.
2009-08-17 18:32:09 -07:00
Gabe Black
e20c8a4b05
X86: Implement the pack instructions.
2009-08-17 18:32:08 -07:00
Gabe Black
1273277d3b
X86: Create a pack media microop.
2009-08-17 18:27:54 -07:00
Gabe Black
e6b5192c26
X86: Rename sel to ext for media microops.
2009-08-17 18:27:44 -07:00
Gabe Black
80b4456fec
X86: Move the MMX version of MOVD into the simd64 directory.
2009-08-17 18:27:30 -07:00
Gabe Black
63403bd562
X86: Implement the remaining unpack instructions.
2009-08-17 18:27:19 -07:00
Gabe Black
7b18f8a062
X86: Implement PANDN, ANDNPS, and ANDNPD.
2009-08-17 18:25:00 -07:00
Gabe Black
458521f055
X86: Implement a multimedia andn microop.
2009-08-17 18:24:58 -07:00
Gabe Black
3633392ec4
X86: Implement PAND, ANDPS, and ANDPD.
2009-08-17 18:24:18 -07:00
Gabe Black
ab49a34a4e
X86: Implement a multimedia and microop.
2009-08-17 18:24:16 -07:00
Gabe Black
83a78072df
X86: Implement POR, ORPD and ORPS.
2009-08-17 18:23:33 -07:00
Gabe Black
25c6b016a6
X86: Implement a media or microop.
2009-08-17 18:23:30 -07:00
Gabe Black
f9346d25c8
X86: Implement PXOR.
2009-08-17 18:23:04 -07:00
Gabe Black
69f0bf743c
X86: (Re)implement XORPS and XORPD.
2009-08-17 18:22:37 -07:00
Gabe Black
982b3ad1f0
X86: Implement a media xor microop.
2009-08-17 18:22:33 -07:00
Gabe Black
f3fb444af4
X86: Implement PUNPCKLQDQ.
2009-08-17 18:21:46 -07:00
Gabe Black
cfaeb5eaf7
X86: Implement PUNPCKHQDQ.
2009-08-17 18:21:09 -07:00
Gabe Black
aabbb22cca
X86: Implement PUNPCKHDQ.
2009-08-17 18:20:50 -07:00
Gabe Black
535ba241f8
X86: Implement PUNPCKHWD.
2009-08-17 18:19:43 -07:00
Gabe Black
093b5b3274
X86: Implement PUNPCKHBW.
2009-08-17 18:19:19 -07:00
Gabe Black
3ae2f03927
X86: Implement PUNPCKLDQ.
2009-08-17 18:19:01 -07:00
Gabe Black
673b19f5d4
X86: Implement PUNPCKLWD.
2009-08-17 18:18:40 -07:00
Gabe Black
ae4ee21ecd
X86: Implement the versions of PUNPCKLBW that use XMM registers.
2009-08-17 18:18:19 -07:00
Gabe Black
24496060e5
X86: Implement the MOVQ instruction.
2009-08-17 18:17:29 -07:00
Gabe Black
f1bfa9d6e4
X86: Implement the lfpimm microop.
2009-08-17 18:17:26 -07:00
Gabe Black
fca7cb83f0
X86: Implement the versions of MOVD that have an MMX source.
2009-08-17 18:16:07 -07:00
Gabe Black
247ed2379d
X86: Implement the versions of PUNPCKLBW that use MMX registers.
2009-08-17 18:15:42 -07:00
Gabe Black
ecc62e750e
X86: Implement an unpack microop.
2009-08-17 18:15:39 -07:00
Gabe Black
6457fb7003
X86: Implement the versions of MOVD that have an MMX destination.
2009-08-17 18:15:24 -07:00
Gabe Black
191590bcc4
X86: Ignore the size part of XMM/MMX operands. The instructions know what they want.
2009-08-17 18:15:23 -07:00
Gabe Black
33cb4c2f09
X86: Use suffixes to differentiate XMM/MMX/GPR operands.
2009-08-17 18:15:21 -07:00
Gabe Black
3a4438a868
X86: Add microcode assembler symbols for mmx registers.
2009-08-17 18:15:19 -07:00
Gabe Black
2f1001e95c
X86: Set up a media microop framework and create mov2int and mov2fp microops.
2009-08-17 18:15:18 -07:00
Gabe Black
cec4e3b39e
X86: Create base classes for use with media/SIMD microops.
2009-08-17 18:15:16 -07:00
Gabe Black
0b68fbdbe1
X86: Turn the DIV and IDIV microcode into templates and generate all the variants.
2009-08-17 18:15:14 -07:00
Gabe Black
a9b2bf5119
X86: Remove some FIXMEs from IDIV that have been fixed.
2009-08-17 18:15:13 -07:00
Gabe Black
3f2f3bede8
X86: Turn the CMPXCHG8B microcode into a template and generate each variant.
2009-08-17 18:15:00 -07:00
Polina Dudnik
c438b2e431
Branch Merge
2009-08-17 11:33:32 -05:00
Gabe Black
a43ae579dd
Merge with head.
2009-08-17 00:21:57 -07:00
Gabe Black
32c8514b45
X86: Fix a bug introduced to IDIV in a recent attempt to fix another bug.
2009-08-17 00:20:03 -07:00
Nathan Binkert
a6b39c07d9
code_formatter: Add a python class for writing code generator templates
2009-08-16 13:40:03 -07:00
Nathan Binkert
2ecaa99025
ply: add a base class called Grammar that encapsulates a ply grammar
2009-08-16 13:40:01 -07:00
Nathan Binkert
2334e6fdd5
orderdict: Use DictMixin and add orderdict to m5.util
2009-08-16 13:40:00 -07:00
Nathan Binkert
06c7ecb207
python: Make it possible to import the parts of m5 that are pure python
2009-08-16 13:39:59 -07:00
Polina Dudnik
6654fe02da
Made servicing_atomic a counter and added started writes:
...
a function for setting the flag to indicate that
the rmw_writes started issuing
2009-08-15 12:45:11 -05:00
Polina Dudnik
a8e11cf3bb
Bug fix: indicate when writes started coming in
2009-08-14 17:57:54 -05:00
Polina Dudnik
ee3226d973
Merge with current branch
2009-08-14 15:30:25 -05:00
Polina Dudnik
0b0f47ec16
Added proc_id to CacheMsg for SMT.
...
Not yet necessary, but in case each of the threads
is allowed to initiate an atomic, will come in handy
2009-08-14 15:30:07 -05:00
Polina Dudnik
de25decf37
Multi-line RMW handling
2009-08-14 14:24:15 -05:00
Polina Dudnik
4b924fd16c
SMT atomics modifications:
...
don't allow enquing from other threads if servicing and atomic for a thread
2009-08-14 14:06:14 -05:00
Derek Hower
bcaf93d182
Automated merge with ssh://hg@m5sim.org/m5
2009-08-13 10:37:37 -05:00
Derek Hower
db40cb8f51
ruby: config bugfix
2009-08-13 10:37:09 -05:00
Tushar Krishna
35082a67b6
ruby/network data_msg_size bug fix with updated stats
2009-08-11 15:19:04 -07:00
Brad Beckmann
b89add1e3f
merged Tushar's bug fix with public repository changes
2009-08-11 12:22:41 -07:00
Derek Hower
1c3efb48ad
Automated merge with ssh://hg@m5sim.org/m5
2009-08-09 13:59:14 -05:00
Derek Hower
1a452d228b
protocol: added recycle actions to MOESI DMA events
2009-08-09 13:58:40 -05:00
Gabe Black
c5fae51774
X86: Implement the CMPXCHG8B/CMPXCHG16B instruction.
2009-08-09 01:01:41 -07:00
Gabe Black
bbf117b20e
X86: Don't clobber the original dividend when doing signed divide.
2009-08-09 01:01:18 -07:00
Gabe Black
3b07a5829d
X86: Decode byte sized singed divide as byte sized.
2009-08-09 01:00:47 -07:00
Gabe Black
6e97feb8a5
X86: Make not taken conditional moves leave the destination alone. Adjust CMOVcc.
...
The manuals from both AMD and Intel say that when writing to a 32 bit
destination in 64 bit mode, the upper 32 bits of the register are filled with
zeros. They also both say that the CMOV instructions leave their destination
alone when their condition fails. Unfortunately, it seems that CMOV will zero
extend its destination register whether or not it was supposed to actually do
a move on both platforms. This seems to be the only case where this happens,
but it would be hard to say for sure.
2009-08-08 17:23:19 -07:00
Tushar Krishna
b952eb19c1
bug fix for data_msg_size in network/Network.cc
2009-08-07 13:59:40 -07:00
Gabe Black
7c606e3835
X86: (Re)Implemented SHRD.
2009-08-07 10:13:33 -07:00
Gabe Black
4f5270f946
X86: Implement SHLD.
2009-08-07 10:13:24 -07:00
Gabe Black
3a55fc5cac
X86: Implement shift right/left double microops.
...
This is my best guess as far as what these should do. Other existing microops
use implicit registers, mul1s and mul1u for instance, so this should be ok.
The microop that loads the implicit DoubleBits register would fall into one
of the microop slots for moving to/from special registers.
2009-08-07 10:13:20 -07:00
Gabe Black
62a2e85c9a
X86: Make the qaud width bswap instruction handle the fact that 32 bit operations zero extend.
2009-08-07 10:12:58 -07:00
Gabe Black
0526f453aa
X86: Use the right field when using legacy prefixes to distinguish instructions.
2009-08-07 10:12:52 -07:00
Gabe Black
2daba26359
X86: Don't truncate the immediate parameter for the ENTER instruction.
2009-08-07 10:12:29 -07:00
Gabe Black
2e3446a410
X86: Adjust the various sizes used for the enter and leave instructions.
2009-08-06 21:44:42 -07:00
Gabe Black
c7b894a06f
X86: Make scas compare its operands in the right order.
2009-08-06 21:44:41 -07:00
Gabe Black
011c1865ad
X86: Fix a copy/paste error for cmovnp.
2009-08-06 21:44:40 -07:00
Derek Hower
cbc52ef6c5
fixed MOESI_CMP_directory bug
2009-08-06 03:41:28 -05:00
Derek Hower
f5e0c56da2
protocol: fixed MOESI_CMP_directory bug
2009-08-06 01:15:55 -05:00
Derek Hower
a1b5a6320f
ruby: better configuration assert message
2009-08-06 01:15:23 -05:00
Derek Hower
dff7c9eaa0
merge
2009-08-05 14:23:32 -05:00
Derek Hower
fbf7391bb0
ruby: configuration supports multiple runs in same session
...
These changes allow to run Ruby-gems multiple times from the same
ruby-lang script with different configurations
2009-08-05 14:20:32 -05:00
Derek Hower
1276df51e2
protocol: made MI_example dma mapping generic
2009-08-05 14:17:23 -05:00
Gabe Black
60d4a0f6d7
Merge with head.
2009-08-05 03:12:39 -07:00
Gabe Black
da2df2fc25
X86: Make conditional moves zero extend their 32 bit destinations always.
2009-08-05 03:07:55 -07:00
Gabe Black
b64d0bdeda
X86: Fix condition code setting for signed multiplies with negative results.
2009-08-05 03:07:01 -07:00
Gabe Black
2914a8eb16
X86: Make the check for negative operands for sign multiply more direct.
2009-08-05 03:06:37 -07:00
Gabe Black
e2e0ae576a
X86: Make sure immediate values are truncated properly.
...
Register values will be "picked" which will assure they don't have junk beyond
the part we're using. Immediate values don't go through a similar process, so
we should truncate them explicitly.
2009-08-05 03:06:01 -07:00
Gabe Black
ef3896d851
X86: Use the new forced folding mechanism for the SAHF and LAHF instructions.
2009-08-05 03:04:17 -07:00
Gabe Black
664d50b439
X86: Fix the indexing for ah in byte division instructions.
2009-08-05 03:03:41 -07:00
Gabe Black
abe8fb3844
X86: Fix the indexing for ah in byte multiply instructions.
2009-08-05 03:03:28 -07:00
Gabe Black
df1abc4412
X86: Let microops force folding an index into the high byte of a register.
2009-08-05 03:03:07 -07:00
Gabe Black
c4140d7d60
X86: Handle rotate left with carry instructions that go all the way around or more.
2009-08-05 03:02:28 -07:00
Gabe Black
3990445354
X86: Set the flags on rotate left with carry instructions.
2009-08-05 03:02:05 -07:00
Gabe Black
d265f7683e
X86: Handle rotate right with carry instructions that go all the way around or more.
2009-08-05 03:01:49 -07:00
Gabe Black
77dc6b33ee
X86: Fix the overflow bit for rotate right with carry.
2009-08-05 03:01:23 -07:00
Gabe Black
c8b1a4583e
X86: Fix the computation of the bottom part of rotate right with carry.
2009-08-05 03:01:07 -07:00
Gabe Black
bab4597fc5
X86: Fix the computation of the upper part of rotate right with carry.
2009-08-05 03:00:43 -07:00
Gabe Black
4e4adcaaa8
X86: Set the flags for rotate right with carry instructions.
2009-08-05 03:00:23 -07:00
Gabe Black
64d7948692
X86: Handle rotating right all the way around or more.
2009-08-05 03:00:03 -07:00
Gabe Black
88041f75c4
X86: Set the flags on a rotate right instruction.
2009-08-05 02:59:39 -07:00
Gabe Black
029d360db2
X86: Make shifts/rotations that write to 32 bits of a register zero extend.
2009-08-05 02:59:25 -07:00
Gabe Black
7f9a3af250
X86: Handle left rotations that go all the way around or more.
2009-08-05 02:58:54 -07:00
Gabe Black
99adfd9dae
X86: Actually set the flags on a rotate left instruction.
2009-08-05 02:58:20 -07:00
Gabe Black
c087b60af3
X86: Fix the sar carry flag.
2009-08-05 02:58:03 -07:00
Gabe Black
860f0f8350
X86: Fix sign extension when doing an arithmetic shift right by 0.
2009-08-05 02:57:47 -07:00
Gabe Black
a238959c34
X86: Fix the carry flag for shr.
2009-08-05 02:56:49 -07:00
Gabe Black
22a5f66820
X86: Fix the carry flag for shl.
2009-08-05 02:56:38 -07:00
Gabe Black
df2c862a07
X86: Fix how the parity flag is computed.
...
It's only for the lowest order byte, and I had the polarity wrong.
2009-08-05 02:56:12 -07:00
Derek Hower
7f012ef8da
ruby: made mapAddressToRange based off a bit count
2009-08-04 23:05:37 -05:00
Derek Hower
33b28fde7a
slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers
...
This changeset contains a lot of different changes that are too
mingled to separate. They are:
1. Added MOESI_CMP_directory
I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller. I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.
2. DMA Sequencer uses a generic SequencerMsg
I will eventually make the cache Sequencer use this type as well. It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.
3. Parameterized Controllers
SLICC controllers can now take custom parameters to use for mapping,
latencies, etc. Currently, only int parameters are supported.
2009-08-04 12:52:52 -05:00
Derek Hower
c1e0bd1df4
slicc: generate html by default
2009-08-04 12:42:45 -05:00
Nathan Binkert
bd7af84d5e
slicc: better error messages when the python parser fails
2009-08-04 09:37:27 -07:00
Gabe Black
f5c21eaa1a
Merged with head.
2009-08-03 11:06:19 -07:00
Gabe Black
676dc6d292
X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement.
2009-08-03 11:01:40 -07:00
Derek Hower
ac15e42c17
Automated merge with ssh://hg@m5sim.org/m5
2009-08-03 11:39:08 -05:00
Gabe Black
38c2af17a5
X86: Set up the IDE device correctly, ie. with and using legacy ports.
2009-08-02 18:01:13 -07:00
Gabe Black
80aa771dbc
IDE: Configure the IDE control to reflect the initial value of the command register.
2009-08-02 18:01:09 -07:00
Gabe Black
aff57202b4
X86: Fix the high result of mul1s, and removed undefined shifts from the mult microops.
2009-08-02 08:39:29 -07:00
Steve Reinhardt
a13a706a20
Fix setting of INST_FETCH flag for O3 CPU.
...
It's still broken in inorder.
Also enhance DPRINTFs in cache and physical memory so we
can see more easily whether it's getting set or not.
2009-08-01 22:50:14 -07:00
Steve Reinhardt
1c28004654
Clean up some inconsistencies with Request flags.
2009-08-01 22:50:13 -07:00
Steve Reinhardt
c0755e6085
Rename internal Request fields to start with '_'.
...
The inconsistency was causing a subtle bug with some of the
constructors where the params had the same name as the fields.
This is also a first step to switching the accessors over to
our new "standard", e.g., getVaddr() -> vaddr().
2009-08-01 22:50:10 -07:00
Korey Sewell
aa75b9a7a7
merge mips fix and statetrace changes
2009-07-31 10:40:42 -04:00
Korey Sewell
60063cc700
mips: fix ll/sc pairs working incorrectly because of accidental clobber of LLFLAG
2009-07-31 09:34:29 -04:00
Nathan Binkert
3dd3de5feb
compile: fix accidental conversion of == into =
2009-07-30 17:42:57 -07:00
Gabe Black
4971331b4f
ARM: Mul and mla ignore the c and v flags, but we were setting them to 1.
2009-07-29 22:24:00 -07:00
Derek Hower
d9ff3021ba
ruby: fixed clearStats
2009-07-29 13:46:58 -05:00
Gabe Black
b066e717f4
ARM: Fix an instruction in the cmpxchg kernel provided routine.
...
The instruction was encoded as a load instead of the intended store.
2009-07-29 00:18:26 -07:00
Gabe Black
c2da5bae17
ARM: Get rid of a stray line in the set_tls handler.
2009-07-29 00:17:20 -07:00
Gabe Black
1e04b6281d
ARM: Make the ARM native tracer stop M5 if control diverges.
...
If the control flow of M5's executable and statetrace's target process get out
of sync even a little, there will be a LOT of output, very little of which
will be useful. There's also almost no hope for recovery. In those cases, we
might as well give up and not generate a huge, mostly worthless trace file.
2009-07-29 00:17:11 -07:00
Gabe Black
2871a13ab3
Simple CPU: Make the simple CPU handle the IntRegs trace flag.
2009-07-29 00:15:26 -07:00
Gabe Black
873112ea99
ARM: Make sure the target process doesn't run away from statetrace.
2009-07-29 00:14:43 -07:00
Ali Saidi
0a9eb59e6f
ARM: Ignore the "times" system call.
2009-07-29 00:09:46 -07:00
Ali Saidi
19a4fb0ff3
ARM: Fix an ioctl constant.
2009-07-29 00:09:44 -07:00
Derek Hower
469256d823
ruby: removed unused/incorrect profiler state
2009-07-27 21:43:43 -05:00
Ali Saidi
daf8718da9
ARM: Update some syscall constants and delete others that are Alpha only.
2009-07-27 00:54:55 -07:00
Gabe Black
d3f2992e39
ARM: Decode fstmx and fldmx instructions. We can ignore them for now.
2009-07-27 00:54:50 -07:00
Gabe Black
52b4a7c36f
ARM: Only send information that changed between statetrace and M5.
2009-07-27 00:54:30 -07:00
Gabe Black
90d3d3535b
imported patch nativetracestreamline.patch
2009-07-27 00:54:24 -07:00
Gabe Black
8ec235c7b1
ARM: Make native trace print out what instruction caused an error.
2009-07-27 00:54:09 -07:00
Gabe Black
c18d6cb1a7
ARM: Implement a basic version of the fmxr instruction.
2009-07-27 00:53:29 -07:00
Gabe Black
2828fa459d
ARM: Implement a basic version of the fmrx instruction.
2009-07-27 00:53:24 -07:00
Gabe Black
4079792f2b
ARM: Add in spots for the VFP control registers.
2009-07-27 00:53:10 -07:00
Gabe Black
b560acfe17
ARM: Fix the CLZ instruction.
2009-07-27 00:52:59 -07:00
Gabe Black
dc0df3f396
ARM: Initialize the CPSR so that we're in user mode.
2009-07-27 00:52:48 -07:00
Gabe Black
b8bf34be05
ARM: Set up the initial stack frame to match a recent Linux.
2009-07-27 00:52:31 -07:00
Gabe Black
ebc2897673
Elf: Add in some new aux vector type constants.
2009-07-27 00:52:19 -07:00
Gabe Black
a41e132007
ARM: Make native trace only print when registers are changing value.
...
When registers have incorrect values but aren't actively changing, it's likely
they're not being modified at all. The fact that they're still wrong isn't
very important.
2009-07-27 00:52:01 -07:00
Gabe Black
519ace4dfd
ARM: Add a native tracer.
...
--HG--
rename : src/arch/sparc/SparcNativeTrace.py => src/arch/arm/ArmNativeTrace.py
rename : src/arch/sparc/nativetrace.cc => src/arch/arm/nativetrace.cc
rename : src/arch/sparc/nativetrace.hh => src/arch/arm/nativetrace.hh
2009-07-27 00:51:35 -07:00
Ali Saidi
e7640227ca
ARM: Fix fstat/fstat64 structs to match EABI definitions.
2009-07-27 00:51:20 -07:00
Ali Saidi
99831ed938
ARM: Handle register indexed system calls.
2009-07-27 00:51:01 -07:00
Ali Saidi
0a18bc0d6c
ARM: Detect OABI binaries and complain that they're no-longer supported.
2009-07-27 00:50:55 -07:00
Gabe Black
ef4e8b04a6
SPARC: Fix a minor compile bug in native trace on gcc > 4.1.
2009-07-25 15:14:00 -07:00
Korey Sewell
44f80e7ca5
o3-smt: enforce numThreads parameter for SMT SE mode
2009-07-25 00:50:27 -04:00
Polina Dudnik
e7a3bda497
Fixed the licences plus minor fixes for compilation
2009-07-22 20:28:32 -05:00
Gabe Black
9ba2ed8532
MIPS: Small fix I forgot to qrefresh into my last change.
2009-07-22 01:57:55 -07:00
Gabe Black
7f0c07bf03
MIPS: Style/formatting sweep of the decoder itself.
2009-07-22 01:51:10 -07:00
Gabe Black
c874bfae3f
MIPS: Format the register index constants like the other ISAs.
...
Also a few more style fixes.
2009-07-21 23:38:26 -07:00
Derek Hower
c635d04642
Automated merge with ssh://m5sim.org//repo/m5
2009-07-21 21:27:54 -05:00
Derek Hower
7f34ee36ec
ruby: fixed sequencer RMW data bug
2009-07-21 19:42:09 -05:00
Derek Hower
80544cda8a
ruby: libruby_init now takes parsed Ruby-lang config text
...
libruby_init now expects to get a file that contains the output of
running a ruby-lang configuration, opposed to the ruby-lang
configuration itself.
2009-07-21 18:33:05 -05:00
Gabe Black
74584d79b6
MIPS: Get MIPS_FS to compile, more style fixes.
...
Some breakage was from my BitUnion change, some was much older.
2009-07-21 01:09:05 -07:00
Gabe Black
7548082d3b
MIPS: Many style fixes.
...
White space, commented out code, some other minor fixes.
2009-07-21 01:08:53 -07:00
Gabe Black
dc0a017ed0
isa_parser: Get rid of the now unused ControlBitfieldOperand.
2009-07-20 20:20:17 -07:00
Gabe Black
5161bc19d9
MIPS: Use BitUnions instead of bits() functions and constants.
...
Also fix style issues in regions around these changes.
2009-07-20 20:14:15 -07:00
Derek Hower
225de2eaff
merge
2009-07-20 09:41:28 -05:00
Derek Hower
e59d0e3e89
ruby: moved cache stats from Profiler to CacheMemory
...
Caches are now responsible for their own statistic gathering. This
requires a direct callback from the protocol on misses, and so all
future protocols need to take this into account.
2009-07-20 09:40:43 -05:00
Gabe Black
3e8e813218
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
...
--HG--
rename : src/cpu/nativetrace.cc => src/arch/sparc/nativetrace.cc
rename : src/cpu/nativetrace.hh => src/arch/sparc/nativetrace.hh
rename : src/cpu/NativeTrace.py => src/arch/x86/X86NativeTrace.py
2009-07-19 23:54:56 -07:00
Gabe Black
a3a795769a
Tracing: Add accessors so tracers can get at data in trace records.
2009-07-19 23:54:31 -07:00
Gabe Black
f0cb698a87
X86: Move a displaced comment back to where it goes.
2009-07-19 23:51:47 -07:00
Gabe Black
563654275f
X86: Add some misc registers for FP control state.
2009-07-19 23:51:41 -07:00
Derek Hower
308419b947
scons: removed RubyConfig from scons
2009-07-19 12:34:11 -05:00
Derek Hower
7cd2d8f687
ruby: removed all refs to old RubyConfig
2009-07-18 18:20:03 -05:00
Derek Hower
4bd7fe4c53
ruby: removed dead files
2009-07-18 18:18:37 -05:00
Derek Hower
f3d8d29342
ruby: removed dead files
2009-07-18 18:17:48 -05:00
Derek Hower
926ab6e6db
merge
2009-07-18 17:40:20 -05:00
Derek Hower
4b7ea4cb51
ruby: fixed dma sequencer bug
...
The DMASequencer was still using a parameter from the old RubyConfig,
causing an offset error when the requested data wasn't block aligned.
This changeset also includes a fix to MI_example for a similar bug.
2009-07-18 17:03:51 -05:00
Derek Hower
340845b139
ruby: better debug print for DataBlock
2009-07-18 16:58:33 -05:00
Derek Hower
7433029cd5
slicc: made coherence profilers per-controller
2009-07-18 16:54:45 -05:00
Gabe Black
d85cd08113
X86: Set up a named constant for the "fold bit" for int register indices.
2009-07-17 18:49:22 -07:00
Gabe Black
7b6587fc9c
X86: Tame the wilds of def operands.
2009-07-17 00:29:56 -07:00
Gabe Black
df378285f8
X86: Shift some register flattening work into the decoder.
2009-07-17 00:29:42 -07:00
Polina Dudnik
e557b4beb5
merge
2009-07-16 15:40:48 -05:00
Gabe Black
e9eccf7225
X86: Add range checks for miscreg indexing utility functions.
2009-07-16 09:30:14 -07:00
Gabe Black
ba6b8389ee
X86: Take limitted advantage of the compilers type checking for microop operands.
2009-07-16 09:29:29 -07:00
Gabe Black
80c834ccac
X86: Fix a number of places where the wrong form of a microop was used.
2009-07-16 09:27:56 -07:00
Gabe Black
3f9b0cc5ca
X86: Fix x87 stack register indexing.
2009-07-16 09:26:38 -07:00
Polina Dudnik
23a405f5d8
Tester update
2009-07-15 10:46:22 -05:00
Gabe Black
6262b31515
Merge with head.
2009-07-14 18:06:30 -07:00
Jack Whitham
fce4412d76
ARM: Fix the "open" flag constants.
2009-07-14 21:03:33 -07:00
Polina Dudnik
289cd00326
Changed the state machine to generate code such that multiple processors can make atomic requests at once
2009-07-13 18:39:32 -05:00
Polina Dudnik
5f551d9ca2
1. Got rid of unused functions in DirectoryMemory
...
2. Reintroduced RMW_Read and RMW_Write
3. Defined -2 in the Sequencer as well as made a note about mandatory queue
Did not address the issues in the slicc because remaking the atomics altogether to allow
multiple processors to issue atomic requests at once
2009-07-13 17:22:29 -05:00
Derek Hower
100da6b326
merge
2009-07-13 14:49:51 -05:00
Derek Hower
d51445490d
regression: updated memtest-ruby stats
...
This also includes a change to the default Ruby random seed, which was
previously set using the wall clock. It is now set to 1234 so that
the stat files don't change for the regression tester.
2009-07-13 14:45:15 -05:00
Polina Dudnik
9a675a0391
Changes to add tracing and replaying command-line options
...
Trace is automatically ended upon a manual checkpoint
2009-07-13 12:50:10 -05:00
Polina Dudnik
b28058917c
Locked requests should actually be converted to ST rather than ATOMIC, because ATOMIC is for RMW.
2009-07-13 12:11:17 -05:00
Polina Dudnik
7a6bf67e47
Added atomics implementation which would work for MI_example
2009-07-13 12:06:23 -05:00
Polina Dudnik
c66af9f474
Minor fixes for compiling
2009-07-13 11:59:13 -05:00
Polina Dudnik
7606c71ea5
Replaced RMW with Locked. RMW will be used for the coherence-aided atomics other than LLSC
2009-07-13 11:37:56 -05:00
Polina Dudnik
faf823f947
Moved the lock check and clearing the lock into makeRequest
2009-07-13 11:34:38 -05:00
Polina Dudnik
86ce60e5cd
Forgot to replace one of the RubyRequest_RMW
2009-07-13 11:25:23 -05:00
Polina Dudnik
226981b2a6
Reintegrated Derek's functional implementation of atomics with a minor change: don't clear lock on failure
2009-07-13 11:13:29 -05:00
Gabe Black
60577eb4ca
ISAs: Get rid of the IControl operand type.
...
A separate operand type is not necessary to use two bitfields to generate the
index.
2009-07-10 01:21:04 -07:00
Gabe Black
64fe7af51a
SPARC: Set up a lookup table for integer register flattening.
...
Using a look up table changed the run time of the SPARC_FS solaris boot
regression from:
real 14m45.951s
user 13m57.528s
sys 0m3.452s
to:
real 12m19.777s
user 12m2.685s
sys 0m2.420s
2009-07-10 01:01:47 -07:00
Gabe Black
9993ca8280
X86: Fold the MiscRegFile all the way into the ISA object.
2009-07-09 20:29:02 -07:00
Gabe Black
60d47aa5f9
SPARC: Fold the MiscRegFile all the way into the ISA object.
2009-07-09 20:28:50 -07:00
Gabe Black
de7f462219
MIPS: Fold the MiscRegFile all the way into the ISA object.
2009-07-09 20:28:39 -07:00
Gabe Black
e14c408b62
ARM: Fold the MiscRegFile all the way into the ISA object.
2009-07-09 20:28:27 -07:00
Gabe Black
5643a222e3
Alpha: Missed a file in an earlier changeset.
2009-07-09 00:20:41 -07:00
Gabe Black
c9a27d85b9
Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.
2009-07-08 23:02:22 -07:00
Gabe Black
3d39b62132
Alpha: Pull the MiscRegFile fully into the ISA object.
2009-07-08 23:02:22 -07:00
Gabe Black
b398b8ff1b
Registers: Add a registers.hh file as an ISA switched header.
...
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08 23:02:21 -07:00
Gabe Black
997f36c711
Registers: Collapse ARM and MIPS regfile directories.
...
--HG--
rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh
rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc
rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc
rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08 23:02:21 -07:00
Gabe Black
aa031e1c11
Alpha: Move reg_redir into its own files, and move some constants into regfile.hh.
2009-07-08 23:02:21 -07:00
Gabe Black
5c37d10624
Registers: Eliminate the ISA defined RegFile class.
2009-07-08 23:02:21 -07:00
Gabe Black
9bf22992ee
Alpha: Get rid of function prototypes with no implementations.
2009-07-08 23:02:21 -07:00
Gabe Black
43345bff6c
Registers: Move the PCs out of the ISAs and into the CPUs.
2009-07-08 23:02:21 -07:00
Gabe Black
1b29f1621d
ARM, Simple CPU: Fix an index and add assert checks.
2009-07-08 23:02:21 -07:00
Gabe Black
0338c83c9d
MIPS: Get rid of an orphaned MIPS .cc file.
2009-07-08 23:02:21 -07:00
Gabe Black
6ebce9d65a
Alpha: Phase out Alpha's intregfile.hh and intregfile.cc.
2009-07-08 23:02:21 -07:00
Gabe Black
faa6ebebe1
SPARC: Phase out SPARC's intregfile.hh.
2009-07-08 23:02:20 -07:00
Gabe Black
ecde884404
X86: Phase out x86's intregfile.hh.
2009-07-08 23:02:20 -07:00
Gabe Black
301df68c73
MIPS: Phase out MIPS's int_regfile.hh.
2009-07-08 23:02:20 -07:00
Gabe Black
27b6148f47
ARM: Flush out the ARM's int_regfile.hh.
2009-07-08 23:02:20 -07:00
Gabe Black
a480ba00b9
Registers: Eliminate the ISA defined integer register file.
2009-07-08 23:02:20 -07:00
Gabe Black
0cb180ea0d
Registers: Eliminate the ISA defined floating point register file.
2009-07-08 23:02:20 -07:00
Gabe Black
25884a8773
Registers: Get rid of the float register width parameter.
2009-07-08 23:02:20 -07:00
Gabe Black
32daf6fc3f
Registers: Add an ISA object which replaces the MiscRegFile.
...
This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
2009-07-08 23:02:20 -07:00
Gabe Black
3e2cad8370
ARM: Use custom read/write code to alias R15 with the PC.
2009-07-08 23:02:20 -07:00
Gabe Black
b8b7c7314a
ISA parser: Allow alternative read/write code for operands.
2009-07-08 23:02:19 -07:00
Gabe Black
95392d3fb8
ARM: Move the remaining microops out of the decoder and into the ISA desc.
2009-07-08 23:02:19 -07:00
Gabe Black
1d4f338b39
ARM: Move the memory microops out of the decoder and into the ISA desc.
2009-07-08 23:02:19 -07:00
Gabe Black
70a75ceb84
ARM: Move the integer microops out of the decoder and into the ISA desc.
2009-07-08 23:02:19 -07:00
Gabe Black
4eb18cc07a
ARM: Improve memory instruction disassembly.
2009-07-08 23:02:19 -07:00
Gabe Black
2fb8d481ab
ARM: Tune up predicated instruction decoding.
2009-07-08 23:02:19 -07:00
Gabe Black
ddcf084f16
ARM: Get rid of the MemAcc and EAComp static insts.
2009-07-08 23:02:19 -07:00
Gabe Black
cae870eded
ARM: Get rid of end_addr in the ArmMacroStore constructor.
2009-07-08 23:02:19 -07:00
Gabe Black
311f77f33d
ARM: Add an AddrMode2 format for memory instructions that use address mode 2.
2009-07-08 23:02:19 -07:00
Gabe Black
826a3582ea
ARM: Don't always update CPSR.
2009-07-08 23:02:19 -07:00
Gabe Black
17f0943398
ARM: Add an AddrMode3 format for memory instructions that use address mode 3.
2009-07-08 23:02:19 -07:00
Gabe Black
dac0cb5c7e
ARM: Add load/store double instructions.
2009-07-08 23:02:10 -07:00
Gabe Black
1ca0688c4c
ARM: Add operands for the load/store double instructions.
2009-07-08 23:02:01 -07:00
Gabe Black
d029110fa1
X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.
2009-07-08 23:01:54 -07:00
Derek Hower
15afc87f7c
slicc: fixed MI_example bug. The directory wasn't deallocating the TBE, leading to a leak. Also increased the default max TBE size to 256 to allow memtest to pass the regression.
2009-07-08 08:40:32 -05:00
Derek Hower
6a83bd5a03
ruby: set the default values of the debug object so that nothing is printed
2009-07-08 00:34:40 -05:00
Derek Hower
2f9d8bff5b
slicc: Fixed MI_example bug. The directory was not writing data to DRAM after a PUTX.
2009-07-08 00:31:33 -05:00
Derek Hower
96c36afea9
removed stray debug print
2009-07-07 23:01:35 -05:00
Nathan Binkert
7ffb8e5914
automerge
2009-07-06 15:54:18 -07:00
Nathan Binkert
da704f52e5
ruby: Fix RubyMemory to work with the newer ruby.
2009-07-06 15:49:47 -07:00
Nathan Binkert
a7904e2cf3
ruby: apply some fixes that were overwritten by the recent ruby import.
2009-07-06 15:49:47 -07:00
Nathan Binkert
5b080ae046
slicc: update parser.py for changes in slicc language.
2009-07-06 15:49:47 -07:00
Nathan Binkert
1f6933503d
scons: update SCons files for changes in ruby.
2009-07-06 15:49:47 -07:00
Nathan Binkert
92de70b69a
ruby: Import the latest ruby changes from gems.
...
This was done with an automated process, so there could be things that were
done in this tree in the past that didn't make it. One known regression
is that atomic memory operations do not seem to work properly anymore.
2009-07-06 15:49:47 -07:00
Nathan Binkert
05f6a4a6b9
ruby: replace strings that were missed in original ruby import.
2009-07-06 15:49:47 -07:00
Gabe Black
240e214236
SPARC: Fix the parenthesis in inUserMode.
2009-07-05 16:07:09 -07:00
Jack Whitham
a223a065e6
ARM: Fix how address mode bits are handled.
2009-07-02 23:23:06 -07:00
Jack Whitham
a738006397
ARM: Fix the code snippet for mla.
2009-07-02 23:22:58 -07:00
Nathan Binkert
7daed385bf
typo: correct spelling
2009-07-02 16:48:22 -07:00
Nathan Binkert
6fd3987b3f
attrdict: correct delattr
2009-07-02 16:48:22 -07:00
Gabe Black
26c70ce2cb
ARM: Make DataOps select from a set of ways to set the c and v flags.
2009-07-01 22:17:06 -07:00
Gabe Black
148c265cf3
ARM: Get rid of some bitfields that aren't used. A few may need to be readded.
2009-07-01 22:16:51 -07:00
Gabe Black
7172e26cc4
ARM: Add a findLsbSet function and use it to implement clz.
2009-07-01 22:16:36 -07:00
Gabe Black
f5141c23fd
ARM: Add defaults for DataOp flag code.
2009-07-01 22:16:19 -07:00
Gabe Black
22a1ac22f4
ARM: Get rid of the val2 variable.
2009-07-01 22:16:05 -07:00
Gabe Black
ce9cb1ecb5
ARM: Centralize the declaration of resTemp.
2009-07-01 22:15:39 -07:00
Gabe Black
776a06fd39
ARM: Add a DataImmOp format similar to DataOp.
2009-07-01 22:12:10 -07:00
Gabe Black
4f98171479
ARM: Decode some media instructions. These are untested.
2009-07-01 22:11:54 -07:00
Gabe Black
b8f064c88c
ARM: Use the new DataOp format to simplify the decoder.
2009-07-01 22:11:39 -07:00
Gabe Black
f409d7819d
ARM: Add in some new artificial fields that make decoding a little easier.
2009-07-01 22:11:27 -07:00
Gabe Black
1f0c0a6688
ARM: Recognize the IntRegs trace flag.
2009-07-01 22:11:12 -07:00
Gabe Black
065cb59427
ARM: Add a DataOp format so data op definitions can be aggregated.
2009-07-01 22:10:58 -07:00
Gabe Black
1ea14b8fac
ARM: Show more information when disassembling data processing intstructions.
...
This will need more work, but it should be a lot closer.
2009-06-27 00:30:23 -07:00
Gabe Black
56f1845471
ARM: Show branch targets relative to the nearest symbol.
2009-06-27 00:29:30 -07:00
Gabe Black
a4ac3fad7a
ARM: Write a function for printing mnemonics and predicates.
2009-06-27 00:29:12 -07:00
Gabe Black
38d8bc64ba
ARM: Fill out the printReg function.
2009-06-26 22:01:34 -07:00
Jack Whitman
7b5386d390
ARM: Fix signed multiply long and add some unimplemented loads.
2009-06-24 21:22:52 -07:00
Jack Whitman
853a0858f3
ARM: Link register is trashed by non-executed branch and link operations.
2009-06-24 21:22:46 -07:00
Jack Whitman
6dd4272804
ARM: Added unimplemented load/store multiple instructions.
2009-06-23 23:23:25 -07:00
Gabe Black
d744525273
ARM: Simplify some utility functions.
2009-06-21 22:51:13 -07:00
Gabe Black
5c2a362cb7
ARM: Move util functions out of the isa desc.
2009-06-21 22:50:33 -07:00
Gabe Black
d4a03f1900
ARM: Simplify the ISA desc by pulling some classes out of it.
2009-06-21 17:21:25 -07:00
Gabe Black
2a39570b78
ARM: Remove the currently unecessary FPAOp class.
2009-06-21 17:14:51 -07:00
Gabe Black
d1d733f636
ARM: Make inst bitfields accessible outside of the isa desc.
2009-06-21 16:41:21 -07:00
Gabe Black
47e71d674a
ARM: Don't downconvert ExtMachInsts to MachInsts.
2009-06-21 16:41:07 -07:00
Gabe Black
f1657a890e
BitUnion: Add more constiness.
2009-06-21 16:40:33 -07:00
Gabe Black
7e4f132369
ARM: Get rid of a few more unused operands.
2009-06-21 09:48:51 -07:00
Gabe Black
4415e2dcd6
ARM: Get rid of unnecessary Re operand.
2009-06-21 09:48:44 -07:00
Gabe Black
7d4ef8a398
ARM: Clear out some inherited hangers on in util.isa and utility.hh.
2009-06-21 09:43:55 -07:00
Gabe Black
5bc1373050
ARM: Get rid of unnecessary fp_enable_checks.
2009-06-21 09:41:04 -07:00
Gabe Black
3964709711
ARM: Adjust simplify rotate_imm slightly.
2009-06-21 09:38:54 -07:00
Gabe Black
c20ce20e4c
ARM: Make the isa parser aware that CPSR is being used.
2009-06-21 09:37:41 -07:00
Gabe Black
71e0d1ded2
ARM: Pull some static code out of the isa desc and create miscregs.hh.
2009-06-21 09:21:07 -07:00
Gabe Black
19a1966079
ARM: Get rid of unused postacc_code.
2009-06-21 09:16:55 -07:00
Nathan Binkert
e1eacc8d92
scons: Make shared library builds work again
...
Compile gzstream as position independent code
use the PIC version of date for shared libs...oops
2009-06-12 21:19:16 -07:00
Nathan Binkert
d3d8a5a83b
copyright: I missed some copyrights during ruby integration
2009-06-10 00:41:56 -07:00
Gabe Black
b394242240
ARM: Hook in the mmap2 system call. Make ArmLinuxProcess handle 5,6 syscall params.
2009-06-09 23:41:45 -07:00
Gabe Black
c913c64be2
ARM: Add a memory_barrier function to the "comm page".
...
This function doesn't actually provide a memory barrier (I don't think they're
implemented) and instead just returns.
2009-06-09 23:41:35 -07:00
Gabe Black
3ff1e922c2
ARM: Add a cmpxchg implementation to the "comm page".
...
This implementation does what it's supposed to (I think), but it's not atomic
and doesn't have memory barriers like the kernel's version.
2009-06-09 23:41:03 -07:00
Gabe Black
37ac2871d5
ARM: Implement TLS. This is not tested.
2009-06-09 23:39:07 -07:00
Gabe Black
5daeefc505
ARM: Make ArmLinuxProcess understand "ARM private" system calls.
2009-06-09 23:38:50 -07:00
Gabe Black
fbf4dc9da2
ARM: Update the kernel version M5 reports to 2.6.16.19
2009-06-09 23:37:41 -07:00
Nathan Binkert
baa0d695b2
cleanup: Make use of types properly and make the loop a little more clear.
2009-06-05 17:01:19 -07:00
Nathan Binkert
c76a8b1c15
scons: Make it so that the processing of trace flags does not depend on order
2009-06-05 15:20:09 -07:00
Nathan Binkert
a01437ab03
types: need typename keyword to get the type.
2009-06-05 11:40:02 -07:00
Nathan Binkert
6faf377b53
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
Nathan Binkert
4e34266245
move: put predictor includes and cc files into the same place
...
--HG--
rename : src/cpu/2bit_local_pred.cc => src/cpu/pred/2bit_local.cc
rename : src/cpu/o3/2bit_local_pred.hh => src/cpu/pred/2bit_local.hh
rename : src/cpu/btb.cc => src/cpu/pred/btb.cc
rename : src/cpu/o3/btb.hh => src/cpu/pred/btb.hh
rename : src/cpu/ras.cc => src/cpu/pred/ras.cc
rename : src/cpu/o3/ras.hh => src/cpu/pred/ras.hh
rename : src/cpu/tournament_pred.cc => src/cpu/pred/tournament.cc
rename : src/cpu/o3/tournament_pred.hh => src/cpu/pred/tournament.hh
2009-06-04 21:50:20 -07:00
Nathan Binkert
e30c62ad99
style: cleanup style
2009-06-04 21:41:46 -07:00
Nathan Binkert
b08c361911
swig: %include Event before PythonEvent so python gets the subclass correct.
...
Before this change, some versions of swig would cause PythonEvent to be
derived from object instead of Event
2009-06-01 16:38:57 -07:00
Nathan Binkert
a0104b6ff6
request: add accessor and constructor for setting time other than curTick
2009-05-29 15:30:16 -07:00
Gabe Black
7f50ea05ac
X86: Keep track of more descriptor state to accomodate KVM.
2009-05-28 23:27:56 -07:00
Nathan Binkert
47877cf2db
types: add a type for thread IDs and try to use it everywhere
2009-05-26 09:23:13 -07:00
Gabe Black
d93392df28
X86: Really set up the GDT and various hidden/visible segment registers.
2009-05-26 02:23:08 -07:00
Steve Reinhardt
b3d0a01eb3
igbe: Fix descriptor cache bug.
2009-05-20 21:52:32 -07:00
Nathan Binkert
8d2e51c7f5
includes: sort includes again
2009-05-17 14:34:52 -07:00
Nathan Binkert
709d859530
includes: use base/types.hh not inttypes.h or stdint.h
2009-05-17 14:34:51 -07:00
Nathan Binkert
eef3a2e142
types: Move stuff for global types into src/base/types.hh
...
--HG--
rename : src/sim/host.hh => src/base/types.hh
2009-05-17 14:34:50 -07:00
Nathan Binkert
cbf237897f
stats: tidy up the Distribution type a little bit
2009-05-13 07:18:03 -07:00
Nathan Binkert
cfa9c78100
stats: fancy is a bad name
2009-05-13 07:18:02 -07:00
Nathan Binkert
74c595d739
stats: clean up the code for printing stats
2009-05-13 07:18:01 -07:00
Korey Sewell
97a04b16eb
mips-merge: merge hello world regress for inorder cpu
...
w/latest changes
2009-05-13 02:02:05 -04:00
Nathan Binkert
5207586b26
ruby: deal with printf warnings and convert some to cprintf
2009-05-12 22:33:05 -07:00
Nathan Binkert
016d472c46
ruby: remove random uint typedef and use unsigned
2009-05-12 22:33:05 -07:00
Nathan Binkert
7389dc63b2
ruby: Make ruby's Map use hashmap.hh to simplify things.
2009-05-12 22:33:05 -07:00
Nathan Binkert
82c9e6a5fc
gcc: work around a bogus gcc error
2009-05-12 22:33:05 -07:00
Nathan Binkert
0c2b9cf90d
slicc: work around improper initialization of a global in slicc.
2009-05-12 22:33:05 -07:00
Nathan Binkert
d923ce0f8c
slicc: clean up the slicc environment so things build properly on mac.
2009-05-12 22:33:04 -07:00
Korey Sewell
1f4c954590
inorder-mips: Remove eaComp & memAcc; use 'visible' eaComp
...
Inorder expects eaComp to be visible through StaticInst object. This mirrors a similar change
to ALPHA... Needs to be done for SPARC and whatever other ISAs want to use InOrderCPU
2009-05-13 01:26:46 -04:00
Korey Sewell
bc69e7947c
arch-mips: add regWidth constant to float regfile
2009-05-13 01:26:38 -04:00
Korey Sewell
a032d91016
cpus: add InOrderCPU to default build
...
regressions need this so they build the model
2009-05-12 20:55:21 -04:00
Korey Sewell
5d810c30e6
alpha-isa: add mt.hh so it can compile with inorder
2009-05-12 20:18:34 -04:00
Korey Sewell
6c88730540
inorder-resources: delete events
...
make sure unrecognized events in the resource pool are deleted and also delete resource events in destructor
2009-05-12 15:01:16 -04:00
Korey Sewell
db2b721380
inorder-tlb-cunit: merge the TLB as implicit to any memory access
...
TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst
since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory
and the result is checked before it's sent out to memory.
* * *
2009-05-12 15:01:16 -04:00
Korey Sewell
3a057bdbb1
inorder-tlb: squash insts in TLB correctly
...
TLB had a bug where if it was stalled and waiting , it would not squash all instructions older than squashed instruction correctly
* * *
2009-05-12 15:01:16 -04:00
Korey Sewell
f1c97e830b
inorder-faults: ignore unalign translation faults for prefetches
2009-05-12 15:01:16 -04:00
Korey Sewell
fe4cd9847d
inorder-stc: update interface to handle store conditionals
2009-05-12 15:01:15 -04:00
Korey Sewell
6211fe5d2e
inorder-float: Fix storage of FP results
...
inorder was incorrectly storing FP values and confusing the integer/fp storage view of floating point operations. A big issue was knowing trying to infer when were doing single or double precision access
because this lets you know the size of value to store (32-64 bits). This isnt exactly straightforward since alpha uses all 64-bit regs while mips/sparc uses a dual-reg view. by getting this value from
the actual floating point register file, the model can figure out what it needs to store
2009-05-12 15:01:15 -04:00
Korey Sewell
3603dd25ef
inorder-fetch: update model to use predecoder
2009-05-12 15:01:15 -04:00
Korey Sewell
c9a03f549b
inorder-mem: clean up allocation/deletion of requests/packets
...
* * *
2009-05-12 15:01:15 -04:00
Korey Sewell
1c7e988272
inorder-mem: skeleton support for prefetch/writehints
2009-05-12 15:01:15 -04:00
Korey Sewell
f41df0ee08
inorder-o3: allow both to compile together
...
allow InOrder and O3CPU to be compiled at the same time: need to make branch prediction filed shared by both models
2009-05-12 15:01:14 -04:00
Korey Sewell
5127ea226a
inorder-unified-tlb: use unified TLB instead of old TLB model
2009-05-12 15:01:14 -04:00
Korey Sewell
98b1452058
inorder-miscregs: Fix indexing for misc. reg operands and update result-types for better tracing of these types of values
2009-05-12 15:01:14 -04:00
Korey Sewell
2012202b06
inorder/alpha-isa: create eaComp object visible to StaticInst through ISA
...
Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead, create eaComp that is visible from StaticInst object. Gives InOrder model capability of generating address without actually initiating access
* * *
2009-05-12 15:01:14 -04:00
Korey Sewell
b569f8f0ed
inorder-bpred: edits to handle non-delay-slot ISAs
...
Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline
2009-05-12 15:01:14 -04:00
Korey Sewell
1c8dfd9254
inorder-alpha-port: initial inorder support of ALPHA
...
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions
* * *
Remove namespace from header file. Causes compiler issues that are hard to find
* * *
Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time
* * *
Expose memory access size and flags through instruction object
(temporarily memAccSize and memFlags to get TLB stuff working.)
2009-05-12 15:01:13 -04:00
Korey Sewell
63db33c4b1
isa-parser: made a few changes, but not author-worthy
2009-05-12 15:01:13 -04:00
Nathan Binkert
f21e80ec72
ruby: assert(false) should be panic.
...
This also fixes some compiler warnings
2009-05-11 16:32:32 -07:00
Nathan Binkert
c2c68c66b7
stats: remove a few compat leftovers
2009-05-11 11:18:09 -07:00
Nathan Binkert
20f1da8b96
python: pull out common code from main that processes arguments
2009-05-11 11:18:09 -07:00
Nathan Binkert
5de3b2b6f0
stats: forgot an include for the mysql stuff
2009-05-11 11:18:09 -07:00
Nathan Binkert
5b752c1e31
scons: add include guards to info.hh
2009-05-11 11:18:09 -07:00
Nathan Binkert
cf6b4ef734
ruby: add RUBY sticky option that must be set to add ruby to the build
...
Default is false
2009-05-11 10:38:46 -07:00
Daniel Sanchez
93f2f69657
ruby: Working M5 interface and updated Ruby interface.
...
This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu>
RubyMemory is now both a driver for Ruby and a port for M5. Changed
makeRequest/hitCallback interface. Brought packets (superficially)
into the sequencer. Modified tester infrastructure to be packet based.
and Ruby can be used together through the example ruby_se.py
script. SPARC parallel applications work, and the timing *seems* right
from combined M5/Ruby debug traces. To run,
% build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c
tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t
2009-05-11 10:38:46 -07:00
Steve Reinhardt
ebf2f5aadd
ruby: Check stderr and not stdin before hanging on an assert.
2009-05-11 10:38:46 -07:00
Polina Dudnik
7769cc9092
ruby: decommission code
...
1. Set.* and BigSet.* are replaced with OptBigSet.* which was renamed Set.*
2. Decomissioned all bloom filters
3. Decomissioned ruby/simics directory
2009-05-11 10:38:46 -07:00
Derek Hower
0ccf8f35a5
ruby: removed dead functions from the sequencer
2009-05-11 10:38:46 -07:00
Polina Dudnik
29f82f265a
ruby: Removed g_SIMULATING flag
...
1. removed checks from tester files
2. removed else clause in Sequencer and DirectoryMemory else clause is
needed by the tester, it is up to Derek to revive it elsewhere when he
gets to it
Also:
1. Changed m_entries in DirectoryMemory to a map
2. And replaced SIMICS_read_physical_memory with a call to now-dummy
Derek's-to-be readPhysMem function
2009-05-11 10:38:46 -07:00
Polina Dudnik
b271090923
ruby: Remove transactional access types (e.g. LD_XACT) from CacheRequestType
...
1. Modified enumeration
2. Also modified profiler
3. Remove transactions from Tester
4. Edited XACT_MEM out of Synthetic Driver
2009-05-11 10:38:46 -07:00
Polina Dudnik
9f34659c52
ruby: reordered Debug and RubyConfig::init to fix segfault
...
due to uninitialized output file pointer.
2009-05-11 10:38:46 -07:00
Dan Gibson
8cbf8df5b7
ruby: Disabled RubyEventQueue's deletion of its home-grown priority heap.
...
Temporarily to fix unusual memory problem.
2009-05-11 10:38:46 -07:00
Nathan Binkert
7311fd7182
ruby: Migrate all of ruby and slicc to SCons.
...
Add the PROTOCOL sticky option sets the coherence protocol that slicc
will parse and therefore ruby will use. This whole process was made
difficult by the fact that the set of files that are output by slicc
are not easily known ahead of time. The easiest thing wound up being
to write a parser for slicc that would tell me. Incidentally this
means we now have a slicc grammar written in python.
2009-05-11 10:38:46 -07:00
Nathan Binkert
e40b8e34c8
ruby: clean up a few warnings
2009-05-11 10:38:45 -07:00
Dan Gibson
8b9f70b9e4
ruby: Fixed some unresolved references.
2009-05-11 10:38:45 -07:00
Nathan Binkert
24da30e317
ruby: Make ruby #includes use full paths to the files they're including.
...
This basically means changing all #include statements and changing
autogenerated code so that it generates the correct paths. Because
slicc generates #includes, I had to hard code the include paths to
mem/protocol.
2009-05-11 10:38:45 -07:00
Dan Gibson
d8c592a05d
ruby: remove unnecessary code.
...
1) Removing files from the ruby build left some unresovled
symbols. Those have been fixed.
2) Most of the dependencies on Simics data types and the simics
interface files have been removed.
3) Almost all mention of opal is gone.
4) Huge chunks of LogTM are now gone.
5) Handling 1-4 left ~hundreds of unresolved references, which were
fixed, yielding a snowball effect (and the massive size of this
delta).
2009-05-11 10:38:45 -07:00
Derek Hower
6ceaffd724
ruby: Cleaned up sequencer. Removed LogTM specific code.
2009-05-11 10:38:45 -07:00
Derek Hower
3d2acc547c
ruby: added Packet interface to makeRequest and isReady.
...
Also pushed Packet usage into the Sequencer
2009-05-11 10:38:45 -07:00
Nathan Binkert
e1915f16d1
ruby: fold the debugging options into Debug.cc
2009-05-11 10:38:45 -07:00
Derek Hower
6e8373fad6
ruby: Renamed Ruby's EventQueue to RubyEventQueue
...
--HG--
rename : src/mem/ruby/eventqueue/EventQueue.cc => src/mem/ruby/eventqueue/RubyEventQueue.cc
rename : src/mem/ruby/eventqueue/EventQueue.hh => src/mem/ruby/eventqueue/RubyEventQueue.hh
rename : src/mem/ruby/eventqueue/EventQueueNode.cc => src/mem/ruby/eventqueue/RubyEventQueueNode.cc
rename : src/mem/ruby/eventqueue/EventQueueNode.hh => src/mem/ruby/eventqueue/RubyEventQueueNode.hh
2009-05-11 10:38:45 -07:00
Daniel Sanchez
ab5e4a22b3
ruby: Removed System name clash by renaming ruby's System to RubySystem
2009-05-11 10:38:44 -07:00
Nathan Binkert
84a18e7fdc
ruby: rename config.include to config.hh and clean up the macro stuff.
...
I did the macro cleanup because I was worried that the SCons scanner
would get confused. This code will hopefully go away soon anyway.
--HG--
rename : src/mem/ruby/config/config.include => src/mem/ruby/config/config.hh
2009-05-11 10:38:44 -07:00
Nathan Binkert
b05da09cd6
ruby: strip out some unused defines
2009-05-11 10:38:44 -07:00
Nathan Binkert
2f30950143
ruby: Import ruby and slicc from GEMS
...
We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
2009-05-11 10:38:43 -07:00
Korey Sewell
c70241810d
cpus: fix cpu progress event
...
this was double scheduling itself (once in constructor and once in cpu code). also add support for stopping / starting
progress events through repeatEvent flag and also changing the interval of the progress event as well
2009-05-05 02:51:31 -04:00
Nathan Binkert
dc35d2f125
scons: re-work the *Source functions to take more information.
...
Start by turning all of the *Source functions into classes
so we can do more calculations and more easily collect the data we need.
Add parameters to the new classes for indicating what sorts of flags the
objects should be compiled with so we can allow certain files to be compiled
without Werror for example.
2009-05-04 16:58:24 -07:00
Gabe Black
7146eb79f1
X86: Precompute the default and alternate address and operand size and the stack size.
2009-04-26 16:49:24 -07:00
Gabe Black
b6bfe8af26
X86: Split out the internal memory space from the regular translate() and precompute mode.
2009-04-26 16:48:44 -07:00
Gabe Black
4ee34dfb4e
X86: Centralize updates to the handy M5 reg.
2009-04-26 16:47:48 -07:00
Gabe Black
06b3e3c303
X86: Implement lowest priority interrupts more correctly.
...
Lowest priority interrupts are now delivered based on a rotating offset into
the list of potential recipients. There could be parasitic cases were a
processor gets picked on and ends up at that rotating offset all the time, but
it's much more likely that the group will stay consistent and the pain will be
distributed evenly.
2009-04-26 02:09:54 -07:00
Gabe Black
2f34a7eaeb
X86: Tell the function that sends int messages who to send to instead of figuring it out itself.
2009-04-26 02:09:27 -07:00
Gabe Black
88ab4bb257
X86: Make the local APICs register themselves with the IO APIC.
...
This is a hack so that the IO APIC can figure out information about the local
APICs. The local APICs still have no way to find out about each other.
Ideally, when the local APICs update state that's relevant to somebody else,
they'd send an update to everyone. Without being able to do a broadcast, that
would still require knowing who else there is to notify. Other broadcasts are
implemented using assumptions that may not always be true.
2009-04-26 02:09:13 -07:00
Gabe Black
c5e2cf841d
X86: Record the initial APIC ID which identifies an APIC in M5.
...
The ID as exposed to software can be changed. Tracking those changes in M5
would be cumbersome, especially since there's no guarantee the IDs will remain
unique.
2009-04-26 02:06:21 -07:00
Gabe Black
8d84f81e70
X86, Config: Make makeX86System consider the number of CPUs, and clean up interrupt assignment.
2009-04-26 02:04:32 -07:00
Gabe Black
9d0fa27d09
SPARC: Tighten up the clone system call and SPARCs copyRegs.
2009-04-24 23:11:21 -07:00
Steve Reinhardt
7c056e44e5
request: reorganize flags to group related flags together.
2009-04-23 06:44:32 -07:00
Gabe Black
ee7055c289
X86: Put the StoreCheck flag with the others, and don't collide with other flags.
2009-04-23 01:43:00 -07:00
Nathan Binkert
b4816037ba
stats: expose statistics to python
2009-04-22 13:38:01 -07:00
Nathan Binkert
aa9b4e6a68
stats: Move flags into info.hh and use base/flags.hh to manage the flags
2009-04-22 13:38:01 -07:00
Nathan Binkert
8c3eb1a192
stats: Shuffle around info stuff so it can be accessed separately
2009-04-22 13:38:00 -07:00
Nathan Binkert
4d9f25b75c
stats: Rename the info classes to hopefully make things a bit clearer
...
FooInfoBase became FooInfo
FooInfo became FooInfoProxy
2009-04-22 13:38:00 -07:00
Nathan Binkert
ca3d82b38a
stats: remove simplescalar compatibility for printing
2009-04-22 10:25:14 -07:00
Nathan Binkert
61a68371be
stats: fix initialization bug in distribution text output
2009-04-22 06:44:29 -07:00
Steve Reinhardt
e7fa4f2f8e
i8254xGBe: major style overhaul.
...
Moved DescCache template functions from .hh to .cc file.
Also fixed lots of line-wrapping problems, and some irregular indentation.
2009-04-22 01:58:53 -04:00
Steve Reinhardt
6629d9b2bc
mem: use single BadAddr responder per system.
...
Previously there was one per bus, which caused some coherence problems
when more than one decided to respond. Now there is just one on
the main memory bus. The default bus responder on all other buses
is now the downstream cache's cpu_side port. Caches no longer need
to do address range filtering; instead, we just have a simple flag
to prevent snoops from propagating to the I/O bus.
2008-07-16 11:10:33 -07:00
Nathan Binkert
4d001e43da
Automated merge with ssh://m5sim.org//repo/m5
2009-04-21 16:04:55 -07:00
Nathan Binkert
fcc142463d
pseudo: only include kernel stats if FULL_SYSTEM.
2009-04-21 15:40:26 -07:00
Nathan Binkert
43c7698f49
arm: include missing file for arm
2009-04-21 15:40:26 -07:00
Nathan Binkert
50f1570352
arm: Unify the ARM tlb. We forgot about this when we did the rest.
...
This code compiles, but there are no tests still
2009-04-21 15:40:25 -07:00
Steve Reinhardt
03b3925e58
syscall_emul: style fixes (mostly wrapping overly long lines)
2009-04-21 08:17:36 -07:00
Steve Reinhardt
52b6764f31
syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.
2009-04-21 08:17:36 -07:00
Daniel Sanchez
b0e9654f86
Commit m5threads package.
...
This patch adds limited multithreading support in syscall-emulation
mode, by using the clone system call. The clone system call works
for Alpha, SPARC and x86, and multithreaded applications run
correctly in Alpha and SPARC.
2009-04-21 08:17:36 -07:00
Nathan Binkert
b0489d18ed
SCons: Export export_vars so SConsopts files can add to them
2009-04-21 08:17:36 -07:00
Steve Reinhardt
97b6947eb7
Minor tweaks for future Ruby compatibility.
2009-04-21 08:17:36 -07:00
Steve Reinhardt
eb3b6935d3
request: add PREFETCH flag.
2009-04-21 08:17:10 -07:00
Steve Reinhardt
3083268d60
request: rename INST_READ to INST_FETCH.
2009-04-20 18:54:02 -07:00
Steve Reinhardt
7f8ea68a30
request: split public and private flags into separate fields.
...
This frees up needed space for more public flags. Also:
- remove unused Request accessor methods
- make Packet use public Request accessors, so it need not be a friend
2009-04-20 18:40:00 -07:00
Gabe Black
9e9a34fed1
Mem: Fill out the comment that describes the LOCKED request flag.
2009-04-19 22:00:24 -07:00
Gabe Black
bd6f2bb538
Mem: Change isLlsc to isLLSC.
2009-04-19 21:44:15 -07:00
Gabe Black
089b384086
X86: Fix the functions that manipulate large bit arrays in the local APIC.
2009-04-19 13:47:15 -07:00
Gabe Black
eee74ba427
X86: Fix up a copyright.
2009-04-19 13:17:35 -07:00
Gabe Black
6910baa015
X86: Fix how the TLB handles the storecheck flag.
2009-04-19 04:57:51 -07:00
Gabe Black
0a6ff60caa
X86: Recognize and handle the lock legacy prefix.
2009-04-19 04:57:28 -07:00
Gabe Black
61edc9ba66
X86: Implement a locking version of XADD.
2009-04-19 04:56:49 -07:00
Gabe Black
209cfc89fd
X86: Implement a locking version of BTC.
2009-04-19 04:56:45 -07:00
Gabe Black
e475cf85f0
X86: Implement a locking version of BTR.
2009-04-19 04:56:43 -07:00
Gabe Black
43f58927d6
X86: Implement a locking version of CMPXCHG.
2009-04-19 04:56:40 -07:00
Gabe Black
b493906eb9
X86: Implement a locking version of BTS.
2009-04-19 04:56:36 -07:00
Gabe Black
985d959ea6
X86: Implement a locking version of DEC.
2009-04-19 04:56:34 -07:00
Gabe Black
4f2d4f466a
X86: Implement a locking version of INC.
2009-04-19 04:56:31 -07:00
Gabe Black
2394f73f90
X86: Implement a locking version of NEG.
2009-04-19 04:56:28 -07:00