MIPS: Phase out MIPS's int_regfile.hh.

src/arch/mips/regfile.cc

@@ -37,7 +37,6 @@
 #include "arch/mips/types.hh"
 #include "arch/mips/isa_traits.hh"
 #include "arch/mips/mt.hh"
-#include "arch/mips/regfile/int_regfile.hh"
 #include "arch/mips/regfile/misc_regfile.hh"
 #include "sim/faults.hh"
 

src/arch/mips/regfile/int_regfile.hh

@@ -1,70 +0,0 @@
-/*
- * Copyright (c) 2006 The Regents of The University of Michigan
- * Copyright (c) 2007 MIPS Technologies, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Korey Sewell
- */
-
-#ifndef __ARCH_MIPS_REGFILE_INT_REGFILE_HH__
-#define __ARCH_MIPS_REGFILE_INT_REGFILE_HH__
-
-#include "arch/mips/types.hh"
-#include "arch/mips/isa_traits.hh"
-#include "base/misc.hh"
-#include "base/trace.hh"
-#include "sim/faults.hh"
-
-class Checkpoint;
-
-namespace MipsISA
-{
-    enum MiscIntRegNums {
-       LO = NumIntArchRegs,
-       HI,
-       DSPACX0,
-       DSPLo1,
-       DSPHi1,
-       DSPACX1,
-       DSPLo2,
-       DSPHi2,
-       DSPACX2,
-       DSPLo3,
-       DSPHi3,
-       DSPACX3,
-       DSPControl,
-       DSPLo0 = LO,
-       DSPHi0 = HI
-    };
-
-    //@TODO: Implementing ShadowSets needs to
-    //edit this value such that:
-    //TotalArchRegs = NumIntArchRegs * ShadowSets
-    const int TotalArchRegs = NumIntArchRegs;
-
-} // namespace MipsISA
-
-#endif

src/arch/mips/regfile/regfile.hh

@@ -35,7 +35,6 @@
 #include "arch/mips/types.hh"
 #include "arch/mips/isa_traits.hh"
 //#include "arch/mips/mt.hh"
-#include "arch/mips/regfile/int_regfile.hh"
 //#include "cpu/base.hh"
 #include "sim/faults.hh"
 
@@ -71,6 +70,30 @@ namespace MipsISA
         Cause_Field = 11
     };
 
+    enum MiscIntRegNums {
+       LO = NumIntArchRegs,
+       HI,
+       DSPACX0,
+       DSPLo1,
+       DSPHi1,
+       DSPACX1,
+       DSPLo2,
+       DSPHi2,
+       DSPACX2,
+       DSPLo3,
+       DSPHi3,
+       DSPACX3,
+       DSPControl,
+       DSPLo0 = LO,
+       DSPHi0 = HI
+    };
+
+    //@TODO: Implementing ShadowSets needs to
+    //edit this value such that:
+    //TotalArchRegs = NumIntArchRegs * ShadowSets
+    const int TotalArchRegs = NumIntArchRegs;
+
+
     class RegFile {
       protected:
         Addr pc;                        // program counter