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ARM: Use the new DataOp format to simplify the decoder.

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This commit is contained in:
Gabe Black 2009-07-01 22:11:39 -07:00
parent f409d7819d
commit b8f064c88c
4 changed files with 543 additions and 641 deletions
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2
src/arch/arm/insts/static_inst.cc
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@ -388,7 +388,7 @@ ArmStaticInst::printDataInst(std::ostream &os) const
{
printMnemonic(os, machInst.sField ? "s" : "");
//XXX It would be nice if the decoder figured this all out for us.
unsigned opcode = machInst.opcode24_21;
unsigned opcode = machInst.opcode;
bool firstOp = true;
// Destination

5
src/arch/arm/isa/bitfields.isa
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@ -34,9 +34,8 @@
//
// Opcode fields
def bitfield ENCODING encoding;
def bitfield OPCODE opcode;
def bitfield OPCODE_27_25 opcode27_25;
def bitfield OPCODE_24_21 opcode24_21;
def bitfield OPCODE_24_23 opcode24_23;
def bitfield OPCODE_24 opcode24;
def bitfield OPCODE_23_20 opcode23_20;
@ -52,7 +51,7 @@ def bitfield OPCODE_19 opcode19;
def bitfield OPCODE_15_12 opcode15_12;
def bitfield OPCODE_15 opcode15;
def bitfield OPCODE_9 opcode9;
def bitfield OPCODE_7_4 opcode7_4;
def bitfield MISC_OPCODE miscOpcode;
def bitfield OPCODE_7_5 opcode7_5;
def bitfield OPCODE_7_6 opcode7_6;
def bitfield OPCODE_7 opcode7;

1170
src/arch/arm/isa/decoder.isa
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File diff suppressed because it is too large Load diff

7
src/arch/arm/types.hh
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@ -44,9 +44,8 @@ namespace ArmISA
Bitfield<32> isMisc;
// All the different types of opcode fields.
Bitfield<27, 25> opcode;
Bitfield<27, 25> opcode27_25;
Bitfield<24, 21> opcode24_21;
Bitfield<27, 25> encoding;
Bitfield<24, 21> opcode;
Bitfield<24, 23> opcode24_23;
Bitfield<24> opcode24;
Bitfield<23, 20> opcode23_20;
@ -62,7 +61,7 @@ namespace ArmISA
Bitfield<15, 12> opcode15_12;
Bitfield<15> opcode15;
Bitfield<9> opcode9;
Bitfield<7, 4> opcode7_4;
Bitfield<7, 4> miscOpcode;
Bitfield<7, 5> opcode7_5;
Bitfield<7, 6> opcode7_6;
Bitfield<7> opcode7;