ruby: Fix RubyMemory to work with the newer ruby.
This commit is contained in:
parent
a7904e2cf3
commit
da704f52e5
15 changed files with 232 additions and 95 deletions
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@ -35,12 +35,11 @@ class RubyMemory(PhysicalMemory):
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type = 'RubyMemory'
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clock = Param.Clock('1t', "ruby clock speed")
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phase = Param.Latency('0ns', "ruby clock phase")
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config_file = Param.String("", "path to the Ruby config file")
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config_options = Param.String("", "extra Ruby options (one per line)")
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config_file = Param.String("path to the Ruby config file")
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stats_file = Param.String("ruby.stats",
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"file to which ruby dumps its stats")
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num_cpus = Param.Int(1, "Number of CPUs connected to the Ruby memory")
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debug = Param.Bool(False, "Use ruby debug")
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debug_file = Param.String("",
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debug_file = Param.String("ruby.debug",
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"path to the Ruby debug output file (stdout if blank)")
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@ -36,7 +36,10 @@ if not main['RUBY']:
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sticky_vars.AddVariables(
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BoolVariable('NO_VECTOR_BOUNDS_CHECKS', "Don't do bounds checks", True),
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BoolVariable('RUBY_DEBUG', "Add debugging stuff to Ruby", False),
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('GEMS_ROOT', "Add debugging stuff to Ruby", Dir('..').srcnode().abspath))
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('GEMS_ROOT', "Add debugging stuff to Ruby", Dir('..').srcnode().abspath),
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BoolVariable('RUBY_TSO_CHECKER', "Use the Ruby TSO Checker", False)
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)
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export_vars += [ 'NO_VECTOR_BOUNDS_CHECKS', 'RUBY_DEBUG', 'GEMS_ROOT' ]
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export_vars += [ 'NO_VECTOR_BOUNDS_CHECKS', 'RUBY_DEBUG', 'GEMS_ROOT',
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'RUBY_TSO_CHECKER' ]
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@ -36,7 +36,7 @@
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#include "mem/ruby/storebuffer/storebuffer.hh"
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#include "mem/ruby/common/Global.hh"
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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#include "TsoChecker.hh"
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#endif
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@ -46,7 +46,7 @@
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// global map of request id_s to map them back to storebuffer pointers
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map <uint64_t, StoreBuffer *> request_map;
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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Tso::TsoChecker * g_tsoChecker;
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#endif
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@ -65,7 +65,7 @@ void hit(int64_t id) {
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//*****************************************************************************************
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StoreBuffer::StoreBuffer(uint32 id, uint32 block_bits, int storebuffer_size) {
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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if (id == 0) {
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g_tsoChecker = new Tso::TsoChecker();
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g_tsoChecker->init(64);
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@ -99,7 +99,7 @@ StoreBuffer::StoreBuffer(uint32 id, uint32 block_bits, int storebuffer_size) {
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//******************************************************************************************
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StoreBuffer::~StoreBuffer(){
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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if (m_id == 0) {
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delete g_tsoChecker;
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}
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@ -272,7 +272,7 @@ void StoreBuffer::returnMatchedData(struct RubyRequest request) {
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ASSERT(checkForLoadHit(request) != NO_MATCH);
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physical_address_t lineaddr = physical_address & m_block_mask;
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bool found = false;
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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Tso::TsoCheckerCmd * cmd;
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#endif
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deque<struct SBEntry>::iterator satisfying_store;
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@ -280,7 +280,7 @@ void StoreBuffer::returnMatchedData(struct RubyRequest request) {
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if ((it->m_request.paddr & m_block_mask) == lineaddr) {
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if (!found) {
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found = true;
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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satisfying_store = it;
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cmd = new Tso::TsoCheckerCmd(m_id, // this thread id
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iseq, // instruction sequence
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@ -313,7 +313,7 @@ void StoreBuffer::returnMatchedData(struct RubyRequest request) {
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}
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}
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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uint64_t tso_data = 0;
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memcpy(&tso_data, request.data, request.len);
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cmd->setData(tso_data);
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@ -400,7 +400,7 @@ void StoreBuffer::complete(uint64_t id) {
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m_buffer_size--;
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ASSERT(m_buffer_size >= 0);
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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int len = outstanding_requests.find(id)->second.len;
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uint64_t data = 0;
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memcpy(&data, from_buffer.m_request.data, 4);
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@ -462,7 +462,7 @@ void StoreBuffer::complete(uint64_t id) {
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#endif
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} // end if (type == ST)
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else if (type == RubyRequestType_LD) {
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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RubyRequest request = outstanding_requests.find(id)->second;
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uint64_t data = 0;
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memcpy(&data, request.data, request.len);
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@ -511,7 +511,7 @@ void StoreBuffer::complete(uint64_t id) {
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}
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}
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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void StoreBuffer::insertTsoLL(Tso::TsoCheckerCmd * cmd) {
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uint64_t count = cmd->getIseq();
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Tso::TsoCheckerCmd * current = NULL;
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@ -36,7 +36,7 @@
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#include "mem/ruby/storebuffer/hfa.hh"
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#include "mem/ruby/libruby.hh"
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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#include "TsoCheckerCmd.hh"
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#endif
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@ -53,13 +53,13 @@ enum load_match { NO_MATCH, PARTIAL_MATCH, FULL_MATCH };
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struct SBEntry {
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struct RubyRequest m_request;
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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Tso::TsoCheckerCmd * m_next_ptr;
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#endif
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SBEntry(struct RubyRequest request, void * ptr)
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: m_request(request)
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{
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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m_next_ptr = (Tso::TsoCheckerCmd*) ptr;
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#endif
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}
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@ -101,7 +101,7 @@ class StoreBuffer {
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/// prints out the contents of the Write Buffer
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void print();
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#ifdef RUBY_TSO_CHECKER
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#if RUBY_TSO_CHECKER
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/// if load completes before store, insert correctly to be issued to TSOChecker
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void insertTsoLL(Tso::TsoCheckerCmd * cmd);
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#endif
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@ -33,9 +33,11 @@
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#include "arch/isa_traits.hh"
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#include "base/output.hh"
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#include "base/str.hh"
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#include "base/types.hh"
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#include "mem/ruby/common/Debug.hh"
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#include "mem/ruby/init.hh"
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#include "mem/ruby/libruby.hh"
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#include "mem/ruby/system/RubyPort.hh"
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#include "mem/ruby/system/Sequencer.hh"
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#include "mem/ruby/system/System.hh"
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#include "mem/rubymem.hh"
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@ -45,33 +47,54 @@
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using namespace std;
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using namespace TheISA;
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map<int64_t, PacketPtr> RubyMemory::pending_requests;
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RubyMemory::RubyMemory(const Params *p)
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: PhysicalMemory(p)
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{
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config_file = p->config_file;
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config_options = p->config_options;
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stats_file = p->stats_file;
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num_cpus = p->num_cpus;
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ruby_clock = p->clock;
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ruby_phase = p->phase;
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debug = p->debug;
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debug_file = p->debug_file;
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ifstream config(p->config_file.c_str());
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vector<RubyObjConf> sys_conf;
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while (!config.eof()) {
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char buffer[4096];
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config.getline(buffer, sizeof(buffer));
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string line = buffer;
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if (line.empty())
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continue;
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vector<string> tokens;
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tokenize(tokens, line, ' ');
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assert(tokens.size() >= 2);
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vector<string> argv;
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for (size_t i=2; i<tokens.size(); i++) {
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std::replace(tokens[i].begin(), tokens[i].end(), '%', ' ');
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std::replace(tokens[i].begin(), tokens[i].end(), '#', '\n');
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argv.push_back(tokens[i]);
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}
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sys_conf.push_back(RubyObjConf(tokens[0], tokens[1], argv));
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tokens.clear();
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argv.clear();
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}
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RubySystem::create(sys_conf);
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for (int i = 0; i < params()->num_cpus; i++) {
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RubyPort *p = RubySystem::getPort(csprintf("Sequencer_%d", i),
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ruby_hit_callback);
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ruby_ports.push_back(p);
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}
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}
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void
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RubyMemory::init()
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{
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init_variables();
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g_NUM_PROCESSORS = num_cpus;
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init_simulator(this);
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if (debug) {
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if (params()->debug) {
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g_debug_ptr->setVerbosityString("high");
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g_debug_ptr->setDebugTime(1);
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if (debug_file != "") {
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g_debug_ptr->setDebugOutputFile("ruby.debug");
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if (!params()->debug_file.empty()) {
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g_debug_ptr->setDebugOutputFile(params()->debug_file.c_str());
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}
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}
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@ -104,23 +127,21 @@ RubyMemory::init()
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}
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//called by rubyTickEvent
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void RubyMemory::tick() {
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g_eventQueue_ptr->triggerEvents(g_eventQueue_ptr->getTime() + 1);
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schedule(rubyTickEvent, curTick + ruby_clock); //dsm: clock_phase was added here. This is wrong, the phase is only added on the first tick
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void
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RubyMemory::tick()
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{
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RubyEventQueue *eq = RubySystem::getEventQueue();
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eq->triggerEvents(eq->getTime() + 1);
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schedule(rubyTickEvent, curTick + ruby_clock);
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}
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RubyMemory::~RubyMemory() {
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delete g_system_ptr;
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RubyMemory::~RubyMemory()
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{
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}
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void
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RubyMemory::hitCallback(Packet* pkt)
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RubyMemory::hitCallback(PacketPtr pkt, Port *port)
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{
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RubyMemoryPort* port = m_packet_to_port_map[pkt];
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assert(port != NULL);
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m_packet_to_port_map.erase(pkt);
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DPRINTF(MemoryAccess, "Hit callback\n");
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bool needsResponse = pkt->needsResponse();
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@ -146,7 +167,7 @@ RubyMemory::getPort(const std::string &if_name, int idx)
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// with places where this function is called from C++. I'd prefer
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// to move all these into Python someday.
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if (if_name == "functional") {
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return new RubyMemoryPort(csprintf("%s-functional", name()), this);
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return new Port(csprintf("%s-functional", name()), this);
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}
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if (if_name != "port") {
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@ -161,22 +182,20 @@ RubyMemory::getPort(const std::string &if_name, int idx)
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panic("RubyMemory::getPort: port %d already assigned", idx);
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}
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RubyMemoryPort *port =
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new RubyMemoryPort(csprintf("%s-port%d", name(), idx), this);
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Port *port = new Port(csprintf("%s-port%d", name(), idx), this);
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ports[idx] = port;
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return port;
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}
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RubyMemory::RubyMemoryPort::RubyMemoryPort(const std::string &_name,
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RubyMemory *_memory)
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RubyMemory::Port::Port(const std::string &_name, RubyMemory *_memory)
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: PhysicalMemory::MemoryPort::MemoryPort(_name, _memory)
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{
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ruby_mem = _memory;
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}
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bool
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RubyMemory::RubyMemoryPort::recvTiming(PacketPtr pkt)
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RubyMemory::Port::recvTiming(PacketPtr pkt)
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{
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DPRINTF(MemoryAccess, "Timing access caught\n");
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@ -197,33 +216,83 @@ RubyMemory::RubyMemoryPort::recvTiming(PacketPtr pkt)
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return true;
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}
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ruby_mem->m_packet_to_port_map[pkt] = this;
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// Save the port in the sender state object
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pkt->senderState = new SenderState(this, pkt->senderState);
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Sequencer* sequencer = g_system_ptr->getSequencer(pkt->req->contextId());
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if ( ! sequencer->isReady(pkt) ) {
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DPRINTF(MemoryAccess, "Sequencer isn't ready yet!!\n");
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return false;
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RubyRequestType type = RubyRequestType_NULL;
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Addr pc = 0;
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if (pkt->isRead()) {
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if (pkt->req->isInstFetch()) {
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type = RubyRequestType_IFETCH;
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pc = pkt->req->getPC();
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} else {
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type = RubyRequestType_LD;
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}
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} else if (pkt->isWrite()) {
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type = RubyRequestType_ST;
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} else if (pkt->isReadWrite()) {
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type = RubyRequestType_RMW;
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}
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DPRINTF(MemoryAccess, "Issuing makeRequest\n");
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RubyRequest ruby_request(pkt->getAddr(), pkt->getPtr<uint8_t>(),
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pkt->getSize(), pc, type,
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RubyAccessMode_Supervisor);
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// Submit the ruby request
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RubyPort *ruby_port = ruby_mem->ruby_ports[pkt->req->contextId()];
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int64_t req_id = ruby_port->makeRequest(ruby_request);
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if (req_id == -1) {
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RubyMemory::SenderState *senderState =
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safe_cast<RubyMemory::SenderState *>(pkt->senderState);
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// pop the sender state from the packet
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pkt->senderState = senderState->saved;
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delete senderState;
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return false;
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}
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// Save the request for the callback
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RubyMemory::pending_requests[req_id] = pkt;
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sequencer->makeRequest(pkt);
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return true;
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}
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void
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RubyMemory::RubyMemoryPort::sendTiming(PacketPtr pkt)
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ruby_hit_callback(int64_t req_id)
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{
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typedef map<int64_t, PacketPtr> map_t;
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map_t &prm = RubyMemory::pending_requests;
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map_t::iterator i = prm.find(req_id);
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if (i == prm.end())
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panic("could not find pending request %d\n", req_id);
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PacketPtr pkt = i->second;
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prm.erase(i);
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RubyMemory::SenderState *senderState =
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safe_cast<RubyMemory::SenderState *>(pkt->senderState);
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RubyMemory::Port *port = senderState->port;
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// pop the sender state from the packet
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pkt->senderState = senderState->saved;
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delete senderState;
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port->ruby_mem->hitCallback(pkt, port);
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}
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void
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RubyMemory::Port::sendTiming(PacketPtr pkt)
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{
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schedSendTiming(pkt, curTick + 1); //minimum latency, must be > 0
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}
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void RubyMemory::printConfigStats()
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{
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std::ostream *os = simout.create(stats_file);
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g_system_ptr->printConfig(*os);
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std::ostream *os = simout.create(params()->stats_file);
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RubySystem::printConfig(*os);
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*os << endl;
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g_system_ptr->printStats(*os);
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RubySystem::printStats(*os);
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}
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@ -32,20 +32,26 @@
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#define __RUBY_MEMORY_HH__
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#include <map>
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#include <vector>
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#include "mem/physical.hh"
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#include "params/RubyMemory.hh"
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#include "base/callback.hh"
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#include "mem/ruby/common/Driver.hh"
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#include "mem/packet.hh"
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#include "mem/physical.hh"
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#include "mem/ruby/system/RubyPort.hh"
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#include "params/RubyMemory.hh"
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class RubyMemory : public PhysicalMemory, public Driver
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class RubyMemory : public PhysicalMemory
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{
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class RubyMemoryPort : public MemoryPort
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public:
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std::vector<RubyPort *> ruby_ports;
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class Port : public MemoryPort
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{
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RubyMemory* ruby_mem;
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friend void ruby_hit_callback(int64_t req_id);
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RubyMemory *ruby_mem;
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public:
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RubyMemoryPort(const std::string &_name, RubyMemory *_memory);
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Port(const std::string &_name, RubyMemory *_memory);
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void sendTiming(PacketPtr pkt);
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protected:
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@ -64,6 +70,15 @@ class RubyMemory : public PhysicalMemory, public Driver
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virtual const char *description() const { return "ruby tick"; }
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};
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struct SenderState : public Packet::SenderState
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{
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Port *port;
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Packet::SenderState *saved;
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SenderState(Port *p, Packet::SenderState *s = NULL)
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: port(p), saved(s)
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{}
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};
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private:
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// prevent copying of a RubyMemory object
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@ -77,14 +92,23 @@ class RubyMemory : public PhysicalMemory, public Driver
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RubyMemory(const Params *p);
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virtual ~RubyMemory();
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const Params *
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params() const
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{
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return safe_cast<const Params *>(_params);
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}
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public:
|
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virtual Port *getPort(const std::string &if_name, int idx = -1);
|
||||
virtual ::Port *getPort(const std::string &if_name, int idx = -1);
|
||||
void virtual init();
|
||||
|
||||
//Ruby-related specifics
|
||||
void printConfigStats(); //dsm: Maybe this function should disappear once the configuration options change & M5 determines the stats file to use
|
||||
void printConfigStats(); //dsm: Maybe this function should
|
||||
//disappear once the configuration
|
||||
//options change & M5 determines the
|
||||
//stats file to use
|
||||
|
||||
void hitCallback(Packet* pkt); // called by the Ruby sequencer
|
||||
void hitCallback(PacketPtr pkt, Port *port);
|
||||
|
||||
void printStats(std::ostream & out) const;
|
||||
void clearStats();
|
||||
|
@ -93,15 +117,15 @@ class RubyMemory : public PhysicalMemory, public Driver
|
|||
void tick();
|
||||
|
||||
private:
|
||||
//Parameters passed
|
||||
std::string config_file, config_options, stats_file, debug_file;
|
||||
bool debug;
|
||||
int num_cpus;
|
||||
Tick ruby_clock, ruby_phase;
|
||||
Tick ruby_clock;
|
||||
Tick ruby_phase;
|
||||
|
||||
std::map<Packet*, RubyMemoryPort*> m_packet_to_port_map;
|
||||
public:
|
||||
static std::map<int64_t, PacketPtr> pending_requests;
|
||||
};
|
||||
|
||||
void ruby_hit_callback(int64_t);
|
||||
|
||||
class RubyExitCallback : public Callback
|
||||
{
|
||||
private:
|
||||
|
|
|
@ -34,9 +34,12 @@ from m5.objects import *
|
|||
nb_cores = 8
|
||||
cpus = [ MemTest() for i in xrange(nb_cores) ]
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
|
||||
|
||||
# system simulated
|
||||
system = System(cpu = cpus, funcmem = PhysicalMemory(),
|
||||
physmem = RubyMemory(num_cpus=nb_cores),
|
||||
physmem = ruby_memory,
|
||||
membus = Bus(clock="500GHz", width=16))
|
||||
|
||||
for cpu in cpus:
|
||||
|
|
|
@ -33,9 +33,11 @@ m5.AddToPath('../configs/common')
|
|||
nb_cores = 4
|
||||
cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(nb_cores) ]
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
|
||||
|
||||
# system simulated
|
||||
system = System(cpu = cpus, physmem = RubyMemory(num_cpus=nb_cores),
|
||||
membus = Bus())
|
||||
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
|
||||
|
||||
for cpu in cpus:
|
||||
cpu.connectMemPorts(system.membus)
|
||||
|
|
|
@ -31,11 +31,14 @@ from m5.objects import *
|
|||
m5.AddToPath('../configs/common')
|
||||
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", 1)
|
||||
|
||||
cpu = DerivO3CPU(cpu_id=0)
|
||||
cpu.clock = '2GHz'
|
||||
|
||||
system = System(cpu = cpu,
|
||||
physmem = RubyMemory(),
|
||||
physmem = ruby_memory,
|
||||
membus = Bus())
|
||||
system.physmem.port = system.membus.port
|
||||
cpu.connectMemPorts(system.membus)
|
||||
|
|
20
tests/configs/ruby_config.py
Normal file
20
tests/configs/ruby_config.py
Normal file
|
@ -0,0 +1,20 @@
|
|||
import os
|
||||
import subprocess
|
||||
|
||||
from os.path import dirname, join as joinpath
|
||||
|
||||
import m5
|
||||
|
||||
def generate(config_file, cores=1, memories=1, memory_size=1024):
|
||||
default = joinpath(dirname(__file__), '../../src/mem/ruby/config')
|
||||
ruby_config = os.environ.get('RUBY_CONFIG', default)
|
||||
args = [ "ruby", "-I", ruby_config, joinpath(ruby_config, "print_cfg.rb"),
|
||||
"-r", joinpath(ruby_config, config_file), "-p", str(cores),
|
||||
"-m", str(memories), "-s", str(memory_size)]
|
||||
|
||||
temp_config = joinpath(m5.options.outdir, "ruby.config")
|
||||
ret = subprocess.call(args, stdout=file(temp_config, "w"))
|
||||
if ret != 0:
|
||||
raise RuntimeError, "subprocess failed!"
|
||||
|
||||
return m5.objects.RubyMemory(config_file=temp_config, num_cpus=cores)
|
|
@ -33,9 +33,11 @@ from m5.objects import *
|
|||
nb_cores = 4
|
||||
cpus = [ AtomicSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
|
||||
|
||||
# system simulated
|
||||
system = System(cpu = cpus, physmem = RubyMemory(num_cpus=nb_cores),
|
||||
membus = Bus())
|
||||
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
|
||||
|
||||
# add L1 caches
|
||||
for cpu in cpus:
|
||||
|
|
|
@ -29,8 +29,11 @@
|
|||
import m5
|
||||
from m5.objects import *
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", 1)
|
||||
|
||||
system = System(cpu = AtomicSimpleCPU(cpu_id=0),
|
||||
physmem = RubyMemory(),
|
||||
physmem = ruby_memory,
|
||||
membus = Bus())
|
||||
system.physmem.port = system.membus.port
|
||||
system.cpu.connectMemPorts(system.membus)
|
||||
|
|
|
@ -32,9 +32,11 @@ from m5.objects import *
|
|||
nb_cores = 4
|
||||
cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", nb_cores)
|
||||
|
||||
# system simulated
|
||||
system = System(cpu = cpus, physmem = RubyMemory(num_cpus=nb_cores),
|
||||
membus = Bus())
|
||||
system = System(cpu = cpus, physmem = ruby_memory, membus = Bus())
|
||||
|
||||
# add L1 caches
|
||||
for cpu in cpus:
|
||||
|
|
|
@ -29,9 +29,12 @@
|
|||
import m5
|
||||
from m5.objects import *
|
||||
|
||||
import ruby_config
|
||||
ruby_memory = ruby_config.generate("MI_example-homogeneous.rb", 1)
|
||||
|
||||
cpu = TimingSimpleCPU(cpu_id=0)
|
||||
system = System(cpu = cpu,
|
||||
physmem = RubyMemory(),
|
||||
physmem = ruby_memory,
|
||||
membus = Bus())
|
||||
system.physmem.port = system.membus.port
|
||||
cpu.connectMemPorts(system.membus)
|
||||
|
|
16
tests/run.py
16
tests/run.py
|
@ -28,6 +28,9 @@
|
|||
|
||||
import os
|
||||
import sys
|
||||
|
||||
from os.path import join as joinpath
|
||||
|
||||
import m5
|
||||
|
||||
# Since we're in batch mode, dont allow tcp socket connections
|
||||
|
@ -41,32 +44,33 @@ tests_root = os.path.dirname(__file__)
|
|||
if os.path.isdir('/dist/m5/regression/test-progs'):
|
||||
test_progs = '/dist/m5/regression/test-progs'
|
||||
else:
|
||||
test_progs = os.path.join(tests_root, 'test-progs')
|
||||
test_progs = joinpath(tests_root, 'test-progs')
|
||||
|
||||
# generate path to binary file
|
||||
def binpath(app, file=None):
|
||||
# executable has same name as app unless specified otherwise
|
||||
if not file:
|
||||
file = app
|
||||
return os.path.join(test_progs, app, 'bin', isa, opsys, file)
|
||||
return joinpath(test_progs, app, 'bin', isa, opsys, file)
|
||||
|
||||
# generate path to input file
|
||||
def inputpath(app, file=None):
|
||||
# input file has same name as app unless specified otherwise
|
||||
if not file:
|
||||
file = app
|
||||
return os.path.join(test_progs, app, 'input', file)
|
||||
return joinpath(test_progs, app, 'input', file)
|
||||
|
||||
# build configuration
|
||||
execfile(os.path.join(tests_root, 'configs', config + '.py'))
|
||||
sys.path.append(joinpath(tests_root, 'configs'))
|
||||
execfile(joinpath(tests_root, 'configs', config + '.py'))
|
||||
|
||||
# set default maxtick... script can override
|
||||
# -1 means run forever
|
||||
maxtick = m5.MaxTick
|
||||
|
||||
# tweak configuration for specific test
|
||||
|
||||
execfile(os.path.join(tests_root, category, name, 'test.py'))
|
||||
sys.path.append(joinpath(tests_root, category, name))
|
||||
execfile(joinpath(tests_root, category, name, 'test.py'))
|
||||
|
||||
# instantiate configuration
|
||||
m5.instantiate(root)
|
||||
|
|
Loading…
Reference in a new issue