types: Move stuff for global types into src/base/types.hh

--HG--
rename : src/sim/host.hh => src/base/types.hh
This commit is contained in:
Nathan Binkert 2009-05-17 14:34:50 -07:00
parent cbf237897f
commit eef3a2e142
130 changed files with 141 additions and 141 deletions

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@ -38,7 +38,7 @@ namespace LittleEndianGuest {}
#include "arch/alpha/max_inst_regs.hh"
#include "arch/alpha/types.hh"
#include "config/full_system.hh"
#include "sim/host.hh"
#include "base/types.hh"
class StaticInstPtr;

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@ -36,7 +36,7 @@
#include "arch/alpha/ipr.hh"
#include "arch/alpha/types.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
class Checkpoint;

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@ -34,7 +34,7 @@
#include "arch/alpha/types.hh"
#include "base/misc.hh"
#include "config/full_system.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -32,7 +32,7 @@
#ifndef __ARCH_ALPHA_TYPES_HH__
#define __ARCH_ALPHA_TYPES_HH__
#include "sim/host.hh"
#include "base/types.hh"
namespace AlphaISA {

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@ -34,7 +34,7 @@
#define __ARCH_ARM_ISA_TRAITS_HH__
#include "arch/arm/types.hh"
#include "sim/host.hh"
#include "base/types.hh"
namespace LittleEndianGuest {};

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@ -35,7 +35,7 @@
#include "arch/arm/types.hh"
#include "base/misc.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -31,7 +31,7 @@
#ifndef __ARCH_ARM_TYPES_HH__
#define __ARCH_ARM_TYPES_HH__
#include "sim/host.hh"
#include "base/types.hh"
namespace ArmISA
{

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@ -37,7 +37,7 @@
#include "base/misc.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -35,7 +35,7 @@
#include "arch/mips/isa_traits.hh"
#include "base/misc.hh"
#include "config/full_system.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -37,7 +37,7 @@
#include "arch/mips/types.hh"
#include "arch/mips/mips_core_specific.hh"
#include "config/full_system.hh"
#include "sim/host.hh"
#include "base/types.hh"
namespace LittleEndianGuest {};

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@ -34,7 +34,7 @@
#include "arch/mips/types.hh"
#include "base/misc.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -31,7 +31,7 @@
#ifndef __ARCH_MIPS_TYPES_HH__
#define __ARCH_MIPS_TYPES_HH__
#include "sim/host.hh"
#include "base/types.hh"
namespace MipsISA
{

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@ -40,7 +40,7 @@
#include "config/full_system.hh"
//XXX This is needed for size_t. We should use something other than size_t
//#include "kern/linux/linux.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "cpu/thread_context.hh"

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@ -36,7 +36,7 @@
#include "arch/sparc/max_inst_regs.hh"
#include "arch/sparc/sparc_traits.hh"
#include "config/full_system.hh"
#include "sim/host.hh"
#include "base/types.hh"
class StaticInstPtr;

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@ -34,7 +34,7 @@
#include "arch/sparc/types.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -37,7 +37,7 @@
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/miscregfile.hh"
#include "arch/sparc/types.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include <string>

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@ -58,7 +58,7 @@
#ifndef __ARCH_X86_BIOS_ACPI_HH__
#define __ARCH_X86_BIOS_ACPI_HH__
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"
#include <vector>

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@ -60,7 +60,7 @@
#include "params/X86E820Entry.hh"
#include "params/X86E820Table.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"
#include <vector>

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@ -60,7 +60,7 @@
#include "base/misc.hh"
#include "mem/port.hh"
#include "sim/byteswap.hh"
#include "sim/host.hh"
#include "base/types.hh"
// Config entry types
#include "params/X86IntelMPBaseConfigEntry.hh"

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@ -92,7 +92,7 @@
#include "params/X86SMBiosSMBiosStructure.hh"
#include "params/X86SMBiosSMBiosTable.hh"
#include "sim/byteswap.hh"
#include "sim/host.hh"
#include "base/types.hh"
using namespace std;

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@ -93,7 +93,7 @@
#include "enums/Characteristic.hh"
#include "enums/ExtCharacteristic.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"
class FunctionalPort;

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@ -36,7 +36,7 @@
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/host.hh"
#include "base/types.hh"
namespace X86ISA
{

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@ -62,7 +62,7 @@
#include "arch/x86/max_inst_regs.hh"
#include "arch/x86/types.hh"
#include "arch/x86/x86_traits.hh"
#include "sim/host.hh"
#include "base/types.hh"
class StaticInstPtr;

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@ -91,7 +91,7 @@
#include "arch/x86/faults.hh"
#include "arch/x86/miscregs.hh"
#include "arch/x86/types.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include <string>

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@ -61,7 +61,7 @@
#include <iostream>
#include <string>
#include "sim/host.hh"
#include "base/types.hh"
#include "base/bitunion.hh"
#include "base/misc.hh"

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@ -65,7 +65,7 @@
#include "mem/mem_object.hh"
#include "mem/packet.hh"
#include "params/X86PagetableWalker.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -60,7 +60,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "sim/host.hh"
#include "base/types.hh"
namespace X86ISA
{

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@ -65,7 +65,7 @@
#include "base/bitfield.hh"
#include "base/misc.hh"
#include "base/trace.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -63,7 +63,7 @@
#include "arch/x86/isa_traits.hh"
#include "arch/x86/miscregfile.hh"
#include "arch/x86/types.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include <string>

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@ -63,7 +63,7 @@
#include "base/misc.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -60,7 +60,7 @@
#include "arch/x86/isa_traits.hh"
#include "arch/x86/pagetable.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;
class FunctionalPort;

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@ -60,7 +60,7 @@
#include <assert.h>
#include "sim/host.hh"
#include "base/types.hh"
namespace X86ISA
{

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@ -33,7 +33,7 @@
#include "base/loader/symtab.hh"
#include "config/cp_annotate.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
#include "sim/startup.hh"
#include "sim/system.hh"

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@ -33,7 +33,7 @@
#include <string>
#include "sim/host.hh"
#include "base/types.hh"
#include "base/crc.hh"
#define ETHER_CRC_POLY_LE 0xedb88320

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@ -31,7 +31,7 @@
#ifndef __BASE_CRC_HH__
#define __BASE_CRC_HH__
#include "sim/host.hh"
#include "base/types.hh"
uint32_t crc32be(const uint8_t *buf, size_t len);
uint32_t crc32le(const uint8_t *buf, size_t len);

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@ -75,7 +75,7 @@ class FastAlloc
#else
#if FAST_ALLOC_DEBUG
#include "sim/host.hh" // for Tick
#include "base/types.hh"
#endif
class FastAlloc

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@ -39,7 +39,7 @@
#include <string>
#include "sim/host.hh"
#include "base/types.hh"
#if defined(__GNUC__) && __GNUC__ >= 3
#define __hash_namespace __gnu_cxx

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@ -39,7 +39,7 @@
#include <string>
#include "base/misc.hh"
#include "sim/host.hh"
#include "base/types.hh"
using namespace std;

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@ -33,7 +33,7 @@
#include <string>
#include "sim/host.hh"
#include "base/types.hh"
std::string &hostname();

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@ -32,7 +32,7 @@
#include <string>
#include "base/cprintf.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "base/inet.hh"
using namespace std;

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@ -39,7 +39,7 @@
#include "base/range.hh"
#include "dev/etherpkt.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "dnet/os.h"
#include "dnet/eth.h"

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@ -33,7 +33,7 @@
#include <assert.h>
#include "sim/host.hh"
#include "base/types.hh"
// Returns the prime number one less than n.
int prevPrime(int n);

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@ -35,7 +35,7 @@
#include <limits>
#include <string>
#include "sim/host.hh" // for Addr
#include "base/types.hh"
class Port;

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@ -35,7 +35,7 @@
#include <limits>
#include <string>
#include "sim/host.hh" // for Addr
#include "base/types.hh"
class Port;
class SymbolTable;

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@ -36,7 +36,7 @@
#include "base/loader/symtab.hh"
#include "base/misc.hh"
#include "base/str.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
using namespace std;

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@ -36,7 +36,7 @@
#include <map>
#include <string>
#include "sim/host.hh" // for Addr
#include "base/types.hh"
class Checkpoint;
class SymbolTable

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@ -39,7 +39,7 @@
#include "base/output.hh"
#include "base/trace.hh"
#include "base/varargs.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/core.hh"
using namespace std;

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@ -39,7 +39,7 @@
#include <unistd.h>
#include "sim/async.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "base/misc.hh"
#include "base/pollevent.hh"
#include "sim/core.hh"

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@ -36,7 +36,7 @@
#include <string>
#include "base/range.hh"
#include "sim/host.hh"
#include "base/types.hh"
class Checkpoint;

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@ -37,7 +37,7 @@
#include <errno.h>
#include <unistd.h>
#include "sim/host.hh"
#include "base/types.hh"
#include "base/misc.hh"
#include "base/socket.hh"

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@ -67,7 +67,7 @@
#include "base/stats/info.hh"
#include "base/stats/types.hh"
#include "base/stats/visit.hh"
#include "sim/host.hh"
#include "base/types.hh"
class Callback;

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@ -32,7 +32,7 @@
#include "base/stats/events.hh"
#include "base/stats/output.hh"
#include "sim/host.hh"
#include "base/types.hh"
using namespace std;

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@ -43,7 +43,7 @@
#include "base/stats/types.hh"
#include "base/str.hh"
#include "base/userinfo.hh"
#include "sim/host.hh"
#include "base/types.hh"
using namespace std;

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@ -34,7 +34,7 @@
#include <string>
#include "base/mysql.hh"
#include "sim/host.hh"
#include "base/types.hh"
namespace Stats {

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@ -33,7 +33,7 @@
#include "base/statistics.hh"
#include "base/stats/output.hh"
#include "sim/eventq.hh"
#include "sim/host.hh"
#include "base/types.hh"
using namespace std;

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@ -34,7 +34,7 @@
#include <limits>
#include <vector>
#include "sim/host.hh"
#include "base/types.hh"
namespace Stats {

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@ -34,7 +34,7 @@
#include <string>
#include "base/time.hh"
#include "sim/host.hh"
#include "base/types.hh"
namespace Stats {

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@ -38,7 +38,7 @@
#include "base/cprintf.hh"
#include "base/match.hh"
#include "base/traceflags.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/core.hh"
namespace Trace {

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@ -30,12 +30,12 @@
/**
* @file
* Defines host-dependent types:
* Defines global host-dependent types:
* Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
*/
#ifndef __HOST_HH__
#define __HOST_HH__
#ifndef __BASE_TYPES_HH__
#define __BASE_TYPES_HH__
#include <inttypes.h>
@ -68,4 +68,4 @@ typedef uint64_t Addr;
const Addr MaxAddr = (Addr)-1;
#endif // __HOST_H__
#endif // __BASE_TYPES_HH__

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@ -34,7 +34,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/insttracer.hh"
#include "params/ExeTracer.hh"

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@ -39,7 +39,7 @@
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inst_seq.hh"
#include "sim/host.hh"
#include "base/types.hh"
/** Struct that defines the information passed from in between stages */
/** This information mainly goes forward through the pipeline. */

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@ -34,7 +34,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/insttracer.hh"
#include "params/InOrderTrace.hh"
#include "cpu/exetrace.hh"

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@ -35,7 +35,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
#include "params/IntelTrace.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/insttracer.hh"
class ThreadContext;

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@ -35,7 +35,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
#include "params/LegionTrace.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/insttracer.hh"
class ThreadContext;

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@ -34,7 +34,7 @@
#include "base/trace.hh"
#include "cpu/static_inst.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/insttracer.hh"
#include "arch/x86/intregs.hh"
#include "arch/x86/floatregs.hh"

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@ -32,7 +32,7 @@
#define __CPU_O3_2BIT_LOCAL_PRED_HH__
#include "cpu/o3/sat_counter.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include <vector>

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@ -39,7 +39,7 @@
#include "cpu/o3/ras.hh"
#include "cpu/o3/tournament_pred.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include <list>

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@ -32,7 +32,7 @@
#define __CPU_O3_BTB_HH__
#include "base/misc.hh"
#include "sim/host.hh"
#include "base/types.hh"
class DefaultBTB
{

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@ -35,7 +35,7 @@
#include "sim/faults.hh"
#include "cpu/inst_seq.hh"
#include "sim/host.hh"
#include "base/types.hh"
// Typedef for physical register index type. Although the Impl would be the
// most likely location for this, there are a few classes that need this

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@ -42,7 +42,7 @@
#include "mem/packet.hh"
#include "mem/request.hh"
#include "sim/byteswap.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/core.hh"
#if FULL_SYSTEM

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@ -42,7 +42,7 @@
#include "cpu/o3/dep_graph.hh"
#include "cpu/op_class.hh"
#include "sim/eventq.hh"
#include "sim/host.hh"
#include "base/types.hh"
class DerivO3CPUParams;
class FUPool;

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@ -31,7 +31,7 @@
#ifndef __CPU_O3_RAS_HH__
#define __CPU_O3_RAS_HH__
#include "sim/host.hh"
#include "base/types.hh"
#include <vector>
/** Return address stack class, implements a simple RAS. */

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@ -32,7 +32,7 @@
#define __CPU_O3_SAT_COUNTER_HH__
#include "base/misc.hh"
#include "sim/host.hh"
#include "base/types.hh"
/**
* Private counter class for the internal saturating counters.

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@ -37,7 +37,7 @@
#include <vector>
#include "cpu/inst_seq.hh"
#include "sim/host.hh"
#include "base/types.hh"
struct ltseqnum {
bool operator()(const InstSeqNum &lhs, const InstSeqNum &rhs) const

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@ -32,7 +32,7 @@
#define __CPU_O3_TOURNAMENT_PRED_HH__
#include "cpu/o3/sat_counter.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include <vector>
/**

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@ -36,7 +36,7 @@
#include <utility>
#include "cpu/inst_seq.hh"
#include "sim/host.hh"
#include "base/types.hh"
/**
* Simple class to hold onto a list of pairs, each pair having a memory

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@ -39,7 +39,7 @@
#include "base/statistics.hh"
#include "base/timebuf.hh"
#include "cpu/inst_seq.hh"
#include "sim/host.hh"
#include "base/types.hh"
class FUPool;
class MemInterface;

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@ -32,7 +32,7 @@
#define __CPU_OZONE_NULL_PREDICTOR_HH__
#include "cpu/inst_seq.hh"
#include "sim/host.hh"
#include "base/types.hh"
template <class Impl>
class NullPredictor

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@ -35,7 +35,7 @@
#include <vector>
#include "base/misc.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;
class PCEventQueue;

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@ -35,7 +35,7 @@
#include "arch/stacktrace.hh"
#include "cpu/static_inst.hh"
#include "sim/host.hh"
#include "base/types.hh"
class ThreadContext;

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@ -51,7 +51,7 @@
#include "mem/request.hh"
#include "sim/byteswap.hh"
#include "sim/debug.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_events.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"

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@ -41,7 +41,7 @@
#include "mem/request.hh"
#include "sim/byteswap.hh"
#include "sim/eventq.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
class BaseCPU;

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@ -43,7 +43,7 @@
#include "base/refcnt.hh"
#include "cpu/op_class.hh"
#include "sim/faults.hh"
#include "sim/host.hh"
#include "base/types.hh"
// forward declarations
struct AlphaSimpleImpl;

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@ -36,7 +36,7 @@
#include "config/full_system.hh"
#include "mem/request.hh"
#include "sim/faults.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
#include "sim/byteswap.hh"

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@ -39,7 +39,7 @@
#include "dev/alpha/access.h"
#include "dev/io_device.hh"
#include "params/AlphaBackdoor.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"
class BaseCPU;

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@ -40,7 +40,7 @@
#include "dev/etherpkt.hh"
#include "params/EtherLink.hh"
#include "sim/eventq.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"
#include "params/EtherLink.hh"

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@ -41,7 +41,7 @@
#include <assert.h>
#include "base/refcnt.hh"
#include "sim/host.hh"
#include "base/types.hh"
/*
* Reference counted class containing ethernet packet data

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@ -38,7 +38,7 @@
#include "base/bitunion.hh"
#include "sim/eventq.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
/** Programmable Interval Timer (Intel 8254) */

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@ -39,7 +39,7 @@
#include "dev/mips/access.h"
#include "dev/io_device.hh"
#include "params/MipsBackdoor.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"
class BaseCPU;

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@ -45,7 +45,7 @@
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/NSGigE.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/system.hh"
const char *NsRxStateStrings[] =

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@ -42,7 +42,7 @@
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/eventq.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/stats.hh"
using namespace std;

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@ -36,7 +36,7 @@
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh"
#include "kern/tru64/mbuf.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/system.hh"
#include "sim/arguments.hh"
#include "arch/isa_traits.hh"

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@ -31,7 +31,7 @@
#ifndef __MBUF_HH__
#define __MBUF_HH__
#include "sim/host.hh"
#include "base/types.hh"
#include "arch/isa_traits.hh"
namespace tru64 {

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@ -34,7 +34,7 @@
#include "arch/vtophys.hh"
#include "base/cprintf.hh"
#include "base/trace.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/arguments.hh"
using namespace std;

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@ -37,7 +37,7 @@
* Cache definitions.
*/
#include "sim/host.hh"
#include "base/types.hh"
#include "base/fast_alloc.hh"
#include "base/misc.hh"
#include "base/range.hh"

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@ -41,7 +41,7 @@
#include "mem/cache/mshr.hh"
#include "sim/core.hh" // for curTick
#include "sim/host.hh"
#include "base/types.hh"
#include "base/misc.hh"
#include "mem/cache/cache.hh"

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@ -40,7 +40,7 @@
#include "mem/cache/tags/iic.hh"
#include "mem/cache/tags/iic_repl/gen.hh"
#include "params/GenRepl.hh"
#include "sim/host.hh"
#include "base/types.hh"
using namespace std;

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@ -42,7 +42,7 @@
#include <list>
#include "cpu/smt.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/sim_object.hh"

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@ -49,7 +49,7 @@
#include "base/misc.hh"
#include "base/printable.hh"
#include "mem/request.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/core.hh"

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@ -43,7 +43,7 @@
#include "arch/tlb.hh"
#include "base/hashmap.hh"
#include "mem/request.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
class Process;

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