sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

[mq]: MOESI_patch

Browse source
This commit is contained in:
Polina Dudnik 2009-08-31 16:38:22 -05:00
parent a02dbd61f9
commit 041a8cefc7
1 changed files with 36 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

49
src/mem/protocol/MOESI_CMP_directory-dir.sm
View file

@ -405,6 +405,14 @@ machine(Directory, "Directory protocol")
}
}
action(p_writeFwdDataToMemory, "p", desc="Write Response data to memory") {
peek(unblockNetwork_in, ResponseMsg) {
directory[in_msg.Address].DataBlk := in_msg.DataBlk;
DEBUG_EXPR(in_msg.Address);
DEBUG_EXPR(in_msg.DataBlk);
}
}
action(ll_checkDataInMemory, "\ld", desc="Check PUTX/PUTO data is same as in the memory") {
peek(unblockNetwork_in, ResponseMsg) {
assert(in_msg.Dirty == false);
@ -506,14 +514,31 @@ machine(Directory, "Directory protocol")
}
action(a_sendDMAAck, "\a", desc="Send DMA Ack that write completed, along with Inv Ack count") {
peek(memQueue_in, MemoryMsg) {
peek(requestQueue_in, RequestMsg) {
enqueue(responseNetwork_out, ResponseMsg, latency="1") {
out_msg.Address := address;
out_msg.Sender := machineID;
out_msg.SenderMachine := MachineType:Directory;
out_msg.Destination.add(in_msg.OriginalRequestorMachId);
out_msg.Destination.add(in_msg.Requestor);
out_msg.DataBlk := in_msg.DataBlk;
out_msg.Acks := in_msg.Acks;
out_msg.Acks := directory[address].Sharers.count(); // for dma requests
out_msg.Type := CoherenceResponseType:DMA_ACK;
out_msg.MessageSize := MessageSizeType:Writeback_Control;
}
}
}
action(a_sendDMAAck2, "\aa", desc="Send DMA Ack that write completed, along with Inv Ack count") {
peek(unblockNetwork_in, ResponseMsg) {
enqueue(responseNetwork_out, ResponseMsg, latency="1") {
out_msg.Address := address;
out_msg.Sender := machineID;
out_msg.SenderMachine := MachineType:Directory;
if (TBEs.isPresent(address)) {
out_msg.Destination.add(TBEs[address].Requestor);
}
out_msg.DataBlk := in_msg.DataBlk;
out_msg.Acks := directory[address].Sharers.count(); // for dma requests
out_msg.Type := CoherenceResponseType:DMA_ACK;
out_msg.MessageSize := MessageSizeType:Writeback_Control;
}
@ -560,8 +585,9 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
transition(I, DMA_WRITE, XI_M) {
transition(I, DMA_WRITE, XI_U) {
qw_queueMemoryWBRequest2;
a_sendDMAAck; // ack count may be zero
l_writeDMADataToMemory;
i_popIncomingRequestQueue;
}
@ -571,11 +597,6 @@ machine(Directory, "Directory protocol")
q_popMemQueue;
}
transition(XI_M, Memory_Ack, XI_U) {
a_sendDMAAck; // ack count may be zero
q_popMemQueue;
}
transition(XI_U, Exclusive_Unblock, I) {
cc_clearSharers;
c_clearOwner;
@ -594,8 +615,9 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
transition(S, DMA_WRITE, XI_M) {
transition(S, DMA_WRITE, XI_U) {
qw_queueMemoryWBRequest2;
a_sendDMAAck; // ack count may be zero
l_writeDMADataToMemory;
g_sendInvalidations; // the DMA will collect invalidations
i_popIncomingRequestQueue;
@ -641,9 +663,10 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
transition(OI_D, Data, XI_M) {
transition(OI_D, Data, XI_U) {
qw_queueMemoryWBRequest;
l_writeDataToMemory;
a_sendDMAAck2; // ack count may be zero
p_writeFwdDataToMemory;
l_writeDMADataToMemoryFromTBE;
w_deallocateTBE;
j_popIncomingUnblockQueue;
@ -821,7 +844,7 @@ machine(Directory, "Directory protocol")
q_popMemQueue;
}
transition({I, S, O, M, IS, SS, OO, MO, MM, MI, MIS, OS, OSS}, Memory_Ack) {
transition({I, S, O, M, IS, SS, OO, MO, MM, MI, MIS, OS, OSS, XI_U, XI_M}, Memory_Ack) {
//a_sendAck;
q_popMemQueue;
}