move: put predictor includes and cc files into the same place

--HG--
rename : src/cpu/2bit_local_pred.cc => src/cpu/pred/2bit_local.cc
rename : src/cpu/o3/2bit_local_pred.hh => src/cpu/pred/2bit_local.hh
rename : src/cpu/btb.cc => src/cpu/pred/btb.cc
rename : src/cpu/o3/btb.hh => src/cpu/pred/btb.hh
rename : src/cpu/ras.cc => src/cpu/pred/ras.cc
rename : src/cpu/o3/ras.hh => src/cpu/pred/ras.hh
rename : src/cpu/tournament_pred.cc => src/cpu/pred/tournament.cc
rename : src/cpu/o3/tournament_pred.hh => src/cpu/pred/tournament.hh

src/cpu/SConscript

@@ -126,13 +126,6 @@ Source('simple_thread.cc')
 Source('thread_context.cc')
 Source('thread_state.cc')
 
-if 'InOrderCPU' in env['CPU_MODELS'] or 'O3CPU' in env['CPU_MODELS']:
-    Source('btb.cc')
-    Source('tournament_pred.cc')
-    Source('2bit_local_pred.cc')
-    Source('ras.cc')
-    TraceFlag('FreeList')
-
 if env['FULL_SYSTEM']:
     SimObject('IntrControl.py')
 

src/cpu/inorder/resources/bpred_unit.hh

@@ -32,21 +32,18 @@
 #ifndef __CPU_INORDER_BPRED_UNIT_HH__
 #define __CPU_INORDER_BPRED_UNIT_HH__
 
-// For Addr type.
+#include <list>
+
 #include "arch/isa_traits.hh"
 #include "base/statistics.hh"
 #include "cpu/inst_seq.hh"
-
-//#include "cpu/inorder/params.hh"
-#include "cpu/o3/2bit_local_pred.hh"
-#include "cpu/o3/btb.hh"
-#include "cpu/o3/ras.hh"
-#include "cpu/o3/tournament_pred.hh"
-#include "params/InOrderCPU.hh"
 #include "cpu/inorder/inorder_dyn_inst.hh"
 #include "cpu/inorder/pipeline_traits.hh"
-
-#include <list>
+#include "cpu/pred/2bit_local.hh"
+#include "cpu/pred/btb.hh"
+#include "cpu/pred/ras.hh"
+#include "cpu/pred/tournament.hh"
+#include "params/InOrderCPU.hh"
 
 /**
  * Basically a wrapper class to hold both the branch predictor

src/cpu/o3/bpred_unit.hh

@@ -36,10 +36,10 @@
 #include "base/statistics.hh"
 #include "base/types.hh"
 #include "cpu/inst_seq.hh"
-#include "cpu/o3/2bit_local_pred.hh"
-#include "cpu/o3/btb.hh"
-#include "cpu/o3/ras.hh"
-#include "cpu/o3/tournament_pred.hh"
+#include "cpu/pred/2bit_local.hh"
+#include "cpu/pred/btb.hh"
+#include "cpu/pred/ras.hh"
+#include "cpu/pred/tournament.hh"
 
 class DerivO3CPUParams;
 

src/cpu/pred/2bit_local.cc

@@ -31,7 +31,7 @@
 #include "base/intmath.hh"
 #include "base/misc.hh"
 #include "base/trace.hh"
-#include "cpu/o3/2bit_local_pred.hh"
+#include "cpu/pred/2bit_local.hh"
 
 LocalBP::LocalBP(unsigned _localPredictorSize,
                  unsigned _localCtrBits,

src/cpu/pred/SConscript

@@ -0,0 +1,38 @@
+# -*- mode:python -*-
+
+# Copyright (c) 2006 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
+
+Import('*')
+
+if 'InOrderCPU' in env['CPU_MODELS'] or 'O3CPU' in env['CPU_MODELS']:
+    Source('2bit_local.cc')
+    Source('btb.cc')
+    Source('ras.cc')
+    Source('tournament.cc')
+    TraceFlag('FreeList')

src/cpu/pred/btb.cc

@@ -30,7 +30,7 @@
 
 #include "base/intmath.hh"
 #include "base/trace.hh"
-#include "cpu/o3/btb.hh"
+#include "cpu/pred/btb.hh"
 
 DefaultBTB::DefaultBTB(unsigned _numEntries,
                        unsigned _tagBits,

src/cpu/pred/ras.cc

@@ -28,7 +28,7 @@
  * Authors: Kevin Lim
  */
 
-#include "cpu/o3/ras.hh"
+#include "cpu/pred/ras.hh"
 
 void
 ReturnAddrStack::init(unsigned _numEntries)

src/cpu/pred/tournament.cc

@@ -29,7 +29,7 @@
  */
 
 #include "base/intmath.hh"
-#include "cpu/o3/tournament_pred.hh"
+#include "cpu/pred/tournament.hh"
 
 TournamentBP::TournamentBP(unsigned _localPredictorSize,
                            unsigned _localCtrBits,