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ARM: Improve memory instruction disassembly.

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This commit is contained in:
Gabe Black 2009-07-08 23:02:19 -07:00
parent 2fb8d481ab
commit 4eb18cc07a
3 changed files with 78 additions and 20 deletions
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19
src/arch/arm/insts/mem.cc
View file

@ -37,14 +37,17 @@ Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
printMnemonic(ss);
return ss.str();
}
std::string
MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
printMnemonic(ss);
printReg(ss, machInst.rd);
ss << ", [";
printReg(ss, machInst.rn);
ss << ", ";
if (machInst.puswl.prepost == 1)
printOffset(ss);
ss << "]";
if (machInst.puswl.prepost == 0)
printOffset(ss);
else if (machInst.puswl.writeback)
ss << "!";
return ss.str();
}
}

68
src/arch/arm/insts/mem.hh
View file

@ -65,23 +65,75 @@ class Memory : public PredOp
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
virtual void
printOffset(std::ostream &os) const
{}
};
/**
* Base class for a few miscellaneous memory-format insts
* that don't interpret the disp field
*/
class MemoryNoDisp : public Memory
class MemoryDisp : public Memory
{
protected:
/// Constructor
MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
MemoryDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
void
printOffset(std::ostream &os) const
{
ccprintf(os, "#%#x", (machInst.puswl.up ? disp : -disp));
}
};
class MemoryHilo : public Memory
{
protected:
/// Constructor
MemoryHilo(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
ccprintf(os, "#%#x", (machInst.puswl.up ? hilo : -hilo));
}
};
class MemoryShift : public Memory
{
protected:
/// Constructor
MemoryShift(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
printShiftOperand(os);
}
};
class MemoryReg : public Memory
{
protected:
/// Constructor
MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
os << (machInst.puswl.up ? "+ " : "- ");
printReg(os, machInst.rm);
}
};
}

11
src/arch/arm/isa/formats/mem.isa
View file

@ -276,11 +276,12 @@ let {{
# Here's where we'll tack on a flag to make this a usermode access.
mnem += "t"
type = ("Store", "Load")[l]
suffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
newSuffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
if b == 1:
mnem += "b"
return LoadStoreBase(mnem, mnem.capitalize() + suffix,
return LoadStoreBase(mnem, mnem.capitalize() + newSuffix,
ea_code, code, mem_flags = [], inst_flags = [],
base_class = 'Memory' + suffix,
exec_template_base = type.capitalize())
def buildMode3Inst(p, u, i, w, type, code, mnem):
@ -289,9 +290,11 @@ let {{
ea_code = "EA = Rn %s;" % ("", offset)[p]
if p == 0 or w == 1:
code += "Rn = Rn %s;" % offset
suffix = "_P%dU%dI%dW%d" % (p, u, i, w)
return LoadStoreBase(mnem, mnem.capitalize() + suffix,
newSuffix = "_P%dU%dI%dW%d" % (p, u, i, w)
suffix = ("Reg", "Hilo")[i]
return LoadStoreBase(mnem, mnem.capitalize() + newSuffix,
ea_code, code, mem_flags = [], inst_flags = [],
base_class = 'Memory' + suffix,
exec_template_base = type.capitalize())
}};