inorder-alpha-fs: edit inorder model to compile FS mode
This commit is contained in:
parent
15bb248013
commit
badb2382a8
10 changed files with 354 additions and 24 deletions
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@ -79,6 +79,7 @@ if 'InOrderCPU' in env['CPU_MODELS']:
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Source('resources/mult_div_unit.cc')
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Source('resource_pool.cc')
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Source('reg_dep_map.cc')
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Source('thread_state.cc')
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Source('thread_context.cc')
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Source('cpu.cc')
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@ -51,6 +51,15 @@
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#include "sim/process.hh"
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#include "sim/stat_control.hh"
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#if FULL_SYSTEM
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#include "cpu/quiesce_event.hh"
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#include "sim/system.hh"
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#endif
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#if THE_ISA == ALPHA_ISA
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#include "arch/alpha/osfpal.hh"
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#endif
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using namespace std;
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using namespace TheISA;
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using namespace ThePipeline;
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@ -171,11 +180,16 @@ InOrderCPU::InOrderCPU(Params *params)
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timeBuffer(2 , 2),
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removeInstsThisCycle(false),
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activityRec(params->name, NumStages, 10, params->activity),
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#if FULL_SYSTEM
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system(params->system),
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physmem(system->physmem),
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#endif // FULL_SYSTEM
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switchCount(0),
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deferRegistration(false/*params->deferRegistration*/),
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stageTracing(params->stageTracing),
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numVirtProcs(1)
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{
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ThreadID active_threads;
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cpu_params = params;
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resPool = new ResourcePool(this, params);
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@ -183,13 +197,17 @@ InOrderCPU::InOrderCPU(Params *params)
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// Resize for Multithreading CPUs
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thread.resize(numThreads);
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ThreadID active_threads = params->workload.size();
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#if FULL_SYSTEM
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active_threads = 1;
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#else
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active_threads = params->workload.size();
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if (active_threads > MaxThreads) {
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panic("Workload Size too large. Increase the 'MaxThreads'"
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"in your InOrder implementation or "
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"edit your workload size.");
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}
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#endif
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// Bind the fetch & data ports from the resource pool.
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fetchPortIdx = resPool->getPortIdx(params->fetchMemPort);
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@ -203,6 +221,11 @@ InOrderCPU::InOrderCPU(Params *params)
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}
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for (ThreadID tid = 0; tid < numThreads; ++tid) {
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#if FULL_SYSTEM
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// SMT is not supported in FS mode yet.
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assert(this->numThreads == 1);
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this->thread[tid] = new Thread(this, 0);
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#else
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if (tid < (ThreadID)params->workload.size()) {
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DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
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tid, this->thread[tid]);
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@ -214,6 +237,7 @@ InOrderCPU::InOrderCPU(Params *params)
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Process* dummy_proc = params->workload[0];
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this->thread[tid] = new Thread(this, tid, dummy_proc);
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}
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#endif
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// Setup the TC that will serve as the interface to the threads/CPU.
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InOrderThreadContext *tc = new InOrderThreadContext;
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@ -446,13 +470,6 @@ InOrderCPU::init()
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resPool->init();
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}
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void
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InOrderCPU::readFunctional(Addr addr, uint32_t &buffer)
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{
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tcBase()->getMemPort()->readBlob(addr, (uint8_t*)&buffer, sizeof(uint32_t));
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buffer = gtoh(buffer);
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}
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void
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InOrderCPU::reset()
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{
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@ -468,6 +485,61 @@ InOrderCPU::getPort(const std::string &if_name, int idx)
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return resPool->getPort(if_name, idx);
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}
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#if FULL_SYSTEM
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Fault
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InOrderCPU::hwrei(ThreadID tid)
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{
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panic("hwrei: Unimplemented");
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return NoFault;
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}
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bool
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InOrderCPU::simPalCheck(int palFunc, ThreadID tid)
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{
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panic("simPalCheck: Unimplemented");
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return true;
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}
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Fault
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InOrderCPU::getInterrupts()
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{
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// Check if there are any outstanding interrupts
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return this->interrupts->getInterrupt(this->threadContexts[0]);
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}
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void
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InOrderCPU::processInterrupts(Fault interrupt)
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{
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// Check for interrupts here. For now can copy the code that
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// exists within isa_fullsys_traits.hh. Also assume that thread 0
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// is the one that handles the interrupts.
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// @todo: Possibly consolidate the interrupt checking code.
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// @todo: Allow other threads to handle interrupts.
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assert(interrupt != NoFault);
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this->interrupts->updateIntrInfo(this->threadContexts[0]);
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DPRINTF(InOrderCPU, "Interrupt %s being handled\n", interrupt->name());
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this->trap(interrupt, 0);
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}
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void
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InOrderCPU::updateMemPorts()
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{
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// Update all ThreadContext's memory ports (Functional/Virtual
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// Ports)
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ThreadID size = thread.size();
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for (ThreadID i = 0; i < size; ++i)
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thread[i]->connectMemPorts(thread[i]->getTC());
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}
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#endif
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void
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InOrderCPU::trap(Fault fault, ThreadID tid, int delay)
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{
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@ -1230,6 +1302,22 @@ InOrderCPU::wakeCPU()
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mainEventQueue.schedule(&tickEvent, curTick);
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}
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#if FULL_SYSTEM
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void
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InOrderCPU::wakeup()
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{
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if (this->thread[0]->status() != ThreadContext::Suspended)
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return;
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this->wakeCPU();
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DPRINTF(Quiesce, "Suspended Processor woken\n");
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this->threadContexts[0]->activate();
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}
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#endif
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#if !FULL_SYSTEM
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void
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InOrderCPU::syscall(int64_t callnum, ThreadID tid)
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{
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@ -1251,6 +1339,7 @@ InOrderCPU::syscall(int64_t callnum, ThreadID tid)
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// Clear Non-Speculative Block Variable
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nonSpecInstActive[tid] = false;
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}
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#endif
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void
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InOrderCPU::prefetch(DynInstPtr inst)
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@ -40,6 +40,7 @@
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#include "arch/isa_traits.hh"
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#include "arch/types.hh"
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#include "arch/registers.hh"
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#include "base/statistics.hh"
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#include "base/timebuf.hh"
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#include "base/types.hh"
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@ -297,6 +298,32 @@ class InOrderCPU : public BaseCPU
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/** Get a Memory Port */
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Port* getPort(const std::string &if_name, int idx = 0);
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#if FULL_SYSTEM
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/** HW return from error interrupt. */
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Fault hwrei(ThreadID tid);
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bool simPalCheck(int palFunc, ThreadID tid);
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/** Returns the Fault for any valid interrupt. */
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Fault getInterrupts();
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/** Processes any an interrupt fault. */
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void processInterrupts(Fault interrupt);
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/** Halts the CPU. */
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void halt() { panic("Halt not implemented!\n"); }
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/** Update the Virt and Phys ports of all ThreadContexts to
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* reflect change in memory connections. */
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void updateMemPorts();
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/** Check if this address is a valid instruction address. */
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bool validInstAddr(Addr addr) { return true; }
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/** Check if this address is a valid data address. */
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bool validDataAddr(Addr addr) { return true; }
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#endif
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/** trap() - sets up a trap event on the cpuTraps to handle given fault.
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* trapCPU() - Traps to handle given fault
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*/
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@ -578,8 +605,6 @@ class InOrderCPU : public BaseCPU
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ActivityRecorder activityRec;
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public:
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void readFunctional(Addr addr, uint32_t &buffer);
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/** Number of Active Threads in the CPU */
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ThreadID numActiveThreads() { return activeThreads.size(); }
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@ -597,6 +622,10 @@ class InOrderCPU : public BaseCPU
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/** Wakes the CPU, rescheduling the CPU if it's not already active. */
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void wakeCPU();
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#if FULL_SYSTEM
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virtual void wakeup();
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#endif
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/** Gets a free thread id. Use if thread ids change across system. */
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ThreadID getFreeTid();
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@ -622,6 +651,14 @@ class InOrderCPU : public BaseCPU
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return total;
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}
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#if FULL_SYSTEM
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/** Pointer to the system. */
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System *system;
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/** Pointer to physical memory. */
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PhysicalMemory *physmem;
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#endif
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/** The global sequence number counter. */
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InstSeqNum globalSeqNum[ThePipeline::MaxThreads];
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@ -42,12 +42,17 @@
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InOrderCPU *
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InOrderCPUParams::create()
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{
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#if FULL_SYSTEM
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// Full-system only supports a single thread for the moment.
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ThreadID actual_num_threads = 1;
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#else
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ThreadID actual_num_threads =
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(numThreads >= workload.size()) ? numThreads : workload.size();
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if (workload.size() == 0) {
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fatal("Must specify at least one workload!");
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}
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#endif
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numThreads = actual_num_threads;
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@ -297,11 +297,39 @@ InOrderDynInst::memAccess()
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return initiateAcc();
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}
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#if FULL_SYSTEM
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Fault
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InOrderDynInst::hwrei()
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{
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panic("InOrderDynInst: hwrei: unimplemented\n");
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return NoFault;
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}
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void
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InOrderDynInst::trap(Fault fault)
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{
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this->cpu->trap(fault, this->threadNumber);
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}
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bool
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InOrderDynInst::simPalCheck(int palFunc)
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{
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#if THE_ISA != ALPHA_ISA
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panic("simPalCheck called, but PAL only exists in Alpha!\n");
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#endif
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return this->cpu->simPalCheck(palFunc, this->threadNumber);
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}
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#else
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void
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InOrderDynInst::syscall(int64_t callnum)
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{
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cpu->syscall(callnum, this->threadNumber);
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}
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#endif
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void
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InOrderDynInst::prefetch(Addr addr, unsigned flags)
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@ -43,6 +43,7 @@
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#include "arch/mt.hh"
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#include "base/fast_alloc.hh"
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#include "base/trace.hh"
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#include "base/types.hh"
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#include "cpu/inorder/inorder_trace.hh"
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#include "config/full_system.hh"
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#include "cpu/thread_context.hh"
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@ -55,6 +56,11 @@
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#include "cpu/inorder/pipeline_traits.hh"
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#include "mem/packet.hh"
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#include "sim/system.hh"
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#include "sim/faults.hh"
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#if THE_ISA==ALPHA_ISA
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#include "arch/alpha/ev5.hh"
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#endif
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/**
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* @file
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@ -64,6 +70,7 @@
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// Forward declaration.
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class StaticInstPtr;
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class ResourceRequest;
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class Packet;
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class InOrderDynInst : public FastAlloc, public RefCounted
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{
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@ -486,7 +493,16 @@ class InOrderDynInst : public FastAlloc, public RefCounted
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void setCurResSlot(unsigned slot_num) { curResSlot = slot_num; }
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/** Calls a syscall. */
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#if FULL_SYSTEM
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/** Calls hardware return from error interrupt. */
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Fault hwrei();
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/** Traps to handle specified fault. */
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void trap(Fault fault);
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bool simPalCheck(int palFunc);
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#else
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/** Calls a syscall. */
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void syscall(int64_t callnum);
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#endif
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void prefetch(Addr addr, unsigned flags);
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void writeHint(Addr addr, int size, unsigned flags);
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Fault copySrcTranslate(Addr src);
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@ -35,18 +35,71 @@
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using namespace TheISA;
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#if FULL_SYSTEM
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VirtualPort *
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InOrderThreadContext::getVirtPort()
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{
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return thread->getVirtPort();
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}
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void
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InOrderThreadContext::dumpFuncProfile()
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{
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thread->dumpFuncProfile();
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}
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Tick
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InOrderThreadContext::readLastActivate()
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{
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return thread->lastActivate;
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}
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Tick
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InOrderThreadContext::readLastSuspend()
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{
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return thread->lastSuspend;
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}
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void
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InOrderThreadContext::profileClear()
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{
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thread->profileClear();
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}
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void
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InOrderThreadContext::profileSample()
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{
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thread->profileSample();
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}
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#endif
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void
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InOrderThreadContext::takeOverFrom(ThreadContext *old_context)
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{
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// some things should already be set up
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assert(getSystemPtr() == old_context->getSystemPtr());
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#if !FULL_SYSTEM
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assert(getProcessPtr() == old_context->getProcessPtr());
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#endif
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// copy over functional state
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setStatus(old_context->status());
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copyArchRegs(old_context);
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#if !FULL_SYSTEM
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thread->funcExeInst = old_context->readFuncExeInst();
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#endif
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old_context->setStatus(ThreadContext::Halted);
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thread->inSyscall = false;
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thread->trapPending = false;
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}
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@ -97,8 +150,8 @@ void
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InOrderThreadContext::regStats(const std::string &name)
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{
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#if FULL_SYSTEM
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thread->kernelStats = new Kernel::Statistics(cpu->system);
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thread->kernelStats->regStats(name + ".kern");
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//thread->kernelStats = new Kernel::Statistics(cpu->system);
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//thread->kernelStats->regStats(name + ".kern");
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#endif
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;
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}
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@ -107,22 +160,14 @@ InOrderThreadContext::regStats(const std::string &name)
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void
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InOrderThreadContext::serialize(std::ostream &os)
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{
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#if FULL_SYSTEM
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if (thread->kernelStats)
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thread->kernelStats->serialize(os);
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#endif
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;
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panic("serialize unimplemented");
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}
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void
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InOrderThreadContext::unserialize(Checkpoint *cp, const std::string §ion)
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{
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#if FULL_SYSTEM
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if (thread->kernelStats)
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thread->kernelStats->unserialize(cp, section);
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#endif
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;
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panic("unserialize unimplemented");
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}
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TheISA::MachInst
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@ -101,10 +101,48 @@ class InOrderThreadContext : public ThreadContext
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virtual void setNextMicroPC(uint64_t val) { };
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#if FULL_SYSTEM
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/** Returns a pointer to physical memory. */
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virtual PhysicalMemory *getPhysMemPtr()
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{ assert(0); return 0; /*return cpu->physmem;*/ }
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/** Returns a pointer to this thread's kernel statistics. */
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virtual TheISA::Kernel::Statistics *getKernelStats()
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{ return thread->kernelStats; }
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virtual FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
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virtual VirtualPort *getVirtPort();
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virtual void connectMemPorts(ThreadContext *tc) { thread->connectMemPorts(tc); }
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/** Dumps the function profiling information.
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* @todo: Implement.
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*/
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virtual void dumpFuncProfile();
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/** Reads the last tick that this thread was activated on. */
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virtual Tick readLastActivate();
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/** Reads the last tick that this thread was suspended on. */
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virtual Tick readLastSuspend();
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/** Clears the function profiling information. */
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virtual void profileClear();
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/** Samples the function profiling information. */
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virtual void profileSample();
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/** Returns pointer to the quiesce event. */
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virtual EndQuiesceEvent *getQuiesceEvent()
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{
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return this->thread->quiesceEvent;
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}
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#else
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virtual TranslatingPort *getMemPort() { return thread->getMemPort(); }
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/** Returns a pointer to this thread's process. */
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virtual Process *getProcessPtr() { return thread->getProcessPtr(); }
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#endif
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/** Returns this thread's status. */
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virtual Status status() const { return thread->status(); }
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@ -232,9 +270,11 @@ class InOrderThreadContext : public ThreadContext
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* misspeculating, this is set as false. */
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virtual bool misspeculating() { return false; }
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#if !FULL_SYSTEM
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||||
/** Executes a syscall in SE mode. */
|
||||
virtual void syscall(int64_t callnum)
|
||||
{ return cpu->syscall(callnum, thread->readTid()); }
|
||||
#endif
|
||||
|
||||
/** Reads the funcExeInst counter. */
|
||||
virtual Counter readFuncExeInst() { return thread->funcExeInst; }
|
||||
|
|
47
src/cpu/inorder/thread_state.cc
Normal file
47
src/cpu/inorder/thread_state.cc
Normal file
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* Copyright (c) 2007 MIPS Technologies, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Authors: Korey Sewell
|
||||
*
|
||||
*/
|
||||
|
||||
#include "arch/isa_traits.hh"
|
||||
#include "cpu/exetrace.hh"
|
||||
#include "cpu/inorder/thread_state.hh"
|
||||
#include "cpu/inorder/cpu.hh"
|
||||
|
||||
using namespace TheISA;
|
||||
|
||||
#if FULL_SYSTEM
|
||||
void
|
||||
InOrderThreadState::dumpFuncProfile()
|
||||
{
|
||||
std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
|
||||
profile->dump(tc, *os);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -33,13 +33,23 @@
|
|||
|
||||
#include "arch/faults.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
#include "base/callback.hh"
|
||||
#include "base/output.hh"
|
||||
#include "cpu/thread_context.hh"
|
||||
#include "cpu/thread_state.hh"
|
||||
#include "sim/sim_exit.hh"
|
||||
|
||||
class Event;
|
||||
class InOrderCPU;
|
||||
|
||||
#if FULL_SYSTEM
|
||||
class EndQuiesceEvent;
|
||||
class FunctionProfile;
|
||||
class ProfileNode;
|
||||
#else
|
||||
class FunctionalMemory;
|
||||
class Process;
|
||||
class InOrderCPU;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Class that has various thread state, such as the status, the
|
||||
|
@ -66,16 +76,28 @@ class InOrderThreadState : public ThreadState {
|
|||
*/
|
||||
bool trapPending;
|
||||
|
||||
|
||||
#if FULL_SYSTEM
|
||||
InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num)
|
||||
: ThreadState(reinterpret_cast<BaseCPU*>(_cpu), 0/*_thread_num*/),
|
||||
cpu(_cpu), inSyscall(0), trapPending(0)
|
||||
{ }
|
||||
#else
|
||||
InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num,
|
||||
Process *_process)
|
||||
: ThreadState(reinterpret_cast<BaseCPU*>(_cpu), 0/*_thread_num*/,
|
||||
_process),
|
||||
cpu(_cpu), inSyscall(0), trapPending(0)
|
||||
{ }
|
||||
#endif
|
||||
|
||||
#if !FULL_SYSTEM
|
||||
/** Handles the syscall. */
|
||||
void syscall(int64_t callnum) { process->syscall(callnum, tc); }
|
||||
#endif
|
||||
|
||||
#if FULL_SYSTEM
|
||||
void dumpFuncProfile();
|
||||
#endif
|
||||
|
||||
/** Pointer to the ThreadContext of this thread. */
|
||||
ThreadContext *tc;
|
||||
|
|
Loading…
Reference in a new issue