MOESI data corruption bug fix

This commit is contained in:
Polina Dudnik 2009-09-11 10:58:37 -05:00
parent ca0e0c3683
commit 2af2e590e1
4 changed files with 110 additions and 27 deletions

View file

@ -90,6 +90,7 @@ machine(L1Cache, "Directory protocol")
Own_GETX, desc="We observe our own GetX forwarded back to us";
Fwd_GETX, desc="A GetX from another processor";
Fwd_GETS, desc="A GetS from another processor";
Fwd_DMA, desc="A GetS from another processor";
Inv, desc="Invalidations from the directory";
// Responses
@ -309,7 +310,7 @@ machine(L1Cache, "Directory protocol")
assert(in_msg.Destination.isElement(machineID));
DEBUG_EXPR("MRM_DEBUG: L1 received");
DEBUG_EXPR(in_msg.Type);
if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestType:DMA_READ || in_msg.Type == CoherenceRequestType:DMA_WRITE) {
if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestType:DMA_WRITE) {
if (in_msg.Requestor == machineID && in_msg.RequestorMachine == MachineType:L1Cache) {
trigger(Event:Own_GETX, in_msg.Address);
} else {
@ -317,6 +318,8 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
}
} else if (in_msg.Type == CoherenceRequestType:GETS) {
trigger(Event:Fwd_GETS, in_msg.Address);
} else if (in_msg.Type == CoherenceRequestType:DMA_READ) {
trigger(Event:Fwd_DMA, in_msg.Address);
} else if (in_msg.Type == CoherenceRequestType:WB_ACK) {
trigger(Event:Writeback_Ack, in_msg.Address);
} else if (in_msg.Type == CoherenceRequestType:WB_ACK_DATA) {
@ -826,7 +829,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
zz_recycleMandatoryQueue;
}
transition({M_W, MM_W}, {Fwd_GETS, Fwd_GETX, Own_GETX, Inv}) {
transition({M_W, MM_W}, {Fwd_GETS, Fwd_DMA, Fwd_GETX, Own_GETX, Inv}) {
z_recycleRequestQueue;
}
@ -892,7 +895,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
l_popForwardQueue;
}
transition(S, Fwd_GETS) {
transition(S, {Fwd_GETS, Fwd_DMA}) {
e_sendData;
l_popForwardQueue;
}
@ -921,7 +924,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
l_popForwardQueue;
}
transition(O, Fwd_GETS) {
transition(O, {Fwd_GETS, Fwd_DMA}) {
e_sendData;
l_popForwardQueue;
}
@ -953,6 +956,12 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
l_popForwardQueue;
}
transition(MM, Fwd_DMA, MM) {
//ee_sendDataExclusive;
e_sendData;
l_popForwardQueue;
}
// Transitions from M
transition({M, M_W}, {Load, Ifetch}) {
h_load_hit;
@ -986,6 +995,11 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
l_popForwardQueue;
}
transition(M, Fwd_DMA, M) {
e_sendData;
l_popForwardQueue;
}
// Transitions from IM
transition(IM, Inv) {
@ -1025,7 +1039,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
n_popResponseQueue;
}
transition(SM, Fwd_GETS) {
transition(SM, {Fwd_DMA, Fwd_GETS}) {
e_sendData;
l_popForwardQueue;
}
@ -1044,7 +1058,7 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
l_popForwardQueue;
}
transition(OM, Fwd_GETS, OM) {
transition(OM, {Fwd_DMA, Fwd_GETS}, OM) {
e_sendData;
l_popForwardQueue;
}
@ -1105,12 +1119,17 @@ if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestT
l_popForwardQueue;
}
transition(MI, Fwd_DMA, MI) {
q_sendDataFromTBEToCache;
l_popForwardQueue;
}
transition(MI, Fwd_GETX, II) {
q_sendExclusiveDataFromTBEToCache;
l_popForwardQueue;
}
transition({SI, OI}, Fwd_GETS) {
transition({SI, OI}, {Fwd_DMA, Fwd_GETS}) {
q_sendDataFromTBEToCache;
l_popForwardQueue;
}

View file

@ -138,6 +138,7 @@ machine(L2Cache, "Token protocol")
L1_PUTS, desc="local sharer wants to writeback";
Fwd_GETX, desc="A GetX from another processor";
Fwd_GETS, desc="A GetS from another processor";
Fwd_DMA, desc="A request from DMA";
Own_GETX, desc="A GetX from this node";
Inv, desc="Invalidations from the directory";
@ -584,7 +585,7 @@ machine(L2Cache, "Token protocol")
in_port(requestNetwork_in, RequestMsg, GlobalRequestToL2Cache) {
if (requestNetwork_in.isReady()) {
peek(requestNetwork_in, RequestMsg) {
if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestType:DMA_READ || in_msg.Type == CoherenceRequestType:DMA_WRITE) {
if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestType:DMA_WRITE) {
if (in_msg.Requestor == machineID) {
trigger(Event:Own_GETX, in_msg.Address);
} else {
@ -592,6 +593,8 @@ machine(L2Cache, "Token protocol")
}
} else if (in_msg.Type == CoherenceRequestType:GETS) {
trigger(Event:Fwd_GETS, in_msg.Address);
} else if(in_msg.Type == CoherenceRequestType:DMA_READ) {
trigger(Event:Fwd_DMA, in_msg.Address);
} else if (in_msg.Type == CoherenceRequestType:INV) {
trigger(Event:Inv, in_msg.Address);
} else if (in_msg.Type == CoherenceRequestType:WB_ACK) {
@ -1456,7 +1459,15 @@ machine(L2Cache, "Token protocol")
zz_recycleResponseQueue;
}
transition({IFGX, IFGS, ISFGS, IFGXX, IFLXO, OFGX, ILOW, ILOXW, ILOSW, ILOSXW, SLSW, OLSW, ILSW, IW, OW, SW, OXW, OLSXW, ILXW, IFLS, IFLO, IFLOX, IFLOXX, IFLOSX,OLSXS, MM, SS, OO, SLSS, OLSS, OLSF, IGMIOFS}, {Fwd_GETX, Fwd_GETS, Inv}) {
transition({IFGX, IFGS, ISFGS, IFGXX, IFLXO, OFGX, ILOW, ILOXW, ILOSW, ILOSXW, SLSW, OLSW, ILSW, IW, OW, SW, OXW, OLSXW, ILXW, IFLS, IFLO, IFLOX, IFLOXX, IFLOSX,OLSXS, IGS, IGM, MM, SS, OO, SLSS, OLSS, OLSF, IGMIOFS}, {Fwd_GETX, Fwd_GETS, Fwd_DMA}) {
zz_recycleRequestQueue;
}
transition({IFGX, IFGS, ISFGS, IFGXX, IFLXO, OFGX, ILOW, ILOXW, ILOSW, ILOSXW, SLSW, OLSW, ILSW, IW, OW, SW, OXW, OLSXW, ILXW, IFLS, IFLO, IFLOX, IFLOXX, IFLOSX,OLSXS, MM, SS, OO, SLSS, OLSS, OLSF, IGMIOFS}, {Inv}) {
zz_recycleRequestQueue;
}
transition({IGM, IGS}, {Own_GETX}) {
zz_recycleRequestQueue;
}
@ -1521,6 +1532,27 @@ machine(L2Cache, "Token protocol")
m_popRequestQueue;
}
transition({ILOS, ILOSX}, Fwd_DMA) {
i_allocateTBE;
t_recordFwdSID;
j_forwardGlobalRequestToLocalOwner;
m_popRequestQueue;
}
transition({ILO, ILX, ILOX}, Fwd_DMA) {
i_allocateTBE;
t_recordFwdSID;
j_forwardGlobalRequestToLocalOwner;
m_popRequestQueue;
}
transition({ILOS, ILOSX, ILO, ILX, ILOX, ILXW}, Data) {
i_copyDataToTBE;
c_sendDataFromTBEToFwdGETS;
s_deallocateTBE;
n_popResponseQueue;
}
transition(IFGS, Data, ILO) {
i_copyDataToTBE;
c_sendDataFromTBEToFwdGETS;
@ -1598,7 +1630,7 @@ machine(L2Cache, "Token protocol")
m_popRequestQueue;
}
transition({O, OLS}, Fwd_GETS) {
transition({O, OLS}, {Fwd_GETS, Fwd_DMA}) {
dd_sendDataToFwdGETS;
m_popRequestQueue;
}
@ -1609,6 +1641,10 @@ machine(L2Cache, "Token protocol")
m_popRequestQueue;
}
transition(OLSX, Fwd_DMA) {
dd_sendDataToFwdGETS;
m_popRequestQueue;
}
transition(M, Fwd_GETX, I) {
dd_sendDataToFwdGETX;
@ -1629,6 +1665,10 @@ machine(L2Cache, "Token protocol")
m_popRequestQueue;
}
transition(M, Fwd_DMA) {
dd_sendExclusiveDataToFwdGETS;
m_popRequestQueue;
}
transition({OLS, OLSX}, Fwd_GETX, OLSF) {
i_allocateTBE;
@ -1837,8 +1877,6 @@ machine(L2Cache, "Token protocol")
n_popResponseQueue;
}
// LOCAL REQUESTS THAT MUST ISSUE
transition(NP, {L1_PUTS, L1_PUTX, L1_PUTO}) {
@ -1949,7 +1987,7 @@ machine(L2Cache, "Token protocol")
o_popL1RequestQueue;
}
transition(OGMIO, Fwd_GETS) {
transition(OGMIO, {Fwd_GETS, Fwd_DMA}) {
t_recordFwdSID;
c_sendDataFromTBEToFwdGETS;
m_popRequestQueue;
@ -1984,6 +2022,12 @@ machine(L2Cache, "Token protocol")
m_popRequestQueue;
}
transition(IGMIO, Fwd_DMA) {
t_recordFwdSID;
j_forwardGlobalRequestToLocalOwner;
m_popRequestQueue;
}
transition(IGMIOFS, Data, IGMIO) {
i_copyDataToTBE;
c_sendDataFromTBEToFwdGETS;
@ -2163,7 +2207,7 @@ machine(L2Cache, "Token protocol")
}
transition(IGMO, Fwd_GETS) {
transition(IGMO, {Fwd_GETS, Fwd_DMA}) {
t_recordFwdSID;
c_sendDataFromTBEToFwdGETS;
m_popRequestQueue;
@ -2518,13 +2562,13 @@ machine(L2Cache, "Token protocol")
n_popTriggerQueue;
}
transition(OLSI, Fwd_GETS) {
transition(OLSI, {Fwd_GETS, Fwd_DMA}) {
t_recordFwdSID;
c_sendDataFromTBEToFwdGETS;
m_popRequestQueue;
}
transition({MI, OI}, Fwd_GETS, OI) {
transition({MI, OI}, {Fwd_GETS, Fwd_DMA}, OI) {
t_recordFwdSID;
c_sendDataFromTBEToFwdGETS;
m_popRequestQueue;

View file

@ -331,6 +331,23 @@ machine(Directory, "Directory protocol")
}
}
action(p_fwdDataToDMA, "\d", desc="Send data to requestor") {
peek(requestQueue_in, RequestMsg) {
enqueue(responseNetwork_out, ResponseMsg, latency="1") {
out_msg.Address := address;
out_msg.Sender := machineID;
out_msg.SenderMachine := MachineType:Directory;
out_msg.Destination.add(in_msg.Requestor);
out_msg.DataBlk := directory[in_msg.Address].DataBlk;
out_msg.Dirty := false; // By definition, the block is now clean
out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
out_msg.MessageSize := MessageSizeType:Response_Data;
}
}
}
action(e_ownerIsUnblocker, "e", desc="The owner is now the unblocker") {
peek(unblockNetwork_in, ResponseMsg) {
directory[address].Owner.clear();
@ -592,7 +609,7 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
transition(XI_M, Memory_Data, XI_U) {
transition(XI_M, Memory_Data, I) {
d_sendDataMsg; // ack count may be zero
q_popMemQueue;
}
@ -609,9 +626,10 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
transition(S, DMA_READ, XI_M) {
qf_queueMemoryFetchRequest;
g_sendInvalidations; // the DMA will collect the invalidations then send an Unblock Exclusive
transition(S, DMA_READ, S) {
//qf_queueMemoryFetchRequest;
p_fwdDataToDMA;
//g_sendInvalidations; // the DMA will collect the invalidations then send an Unblock Exclusive
i_popIncomingRequestQueue;
}
@ -650,9 +668,9 @@ machine(Directory, "Directory protocol")
i_popIncomingRequestQueue;
}
transition(O, DMA_READ, XI_U) {
transition(O, DMA_READ, O) {
f_forwardRequest; // this will cause the data to go to DMA directly
g_sendInvalidations; // this will cause acks to be sent to the DMA
//g_sendInvalidations; // this will cause acks to be sent to the DMA
i_popIncomingRequestQueue;
}
@ -684,7 +702,7 @@ machine(Directory, "Directory protocol")
}
// no exclusive unblock will show up to the directory
transition(M, DMA_READ, XI_U) {
transition(M, DMA_READ, M) {
f_forwardRequest; // this will cause the data to go to DMA directly
i_popIncomingRequestQueue;
}

View file

@ -227,16 +227,18 @@ machine(DMA, "DMA Controller")
p_popResponseQueue;
}
transition(BUSY_RD, Data) {
transition(BUSY_RD, Data, READY) {
t_updateTBEData;
u_updateAckCount;
o_checkForCompletion;
d_dataCallbackFromTBE;
w_deallocateTBE;
//u_updateAckCount;
//o_checkForCompletion;
p_popResponseQueue;
}
transition(BUSY_RD, All_Acks, READY) {
d_dataCallbackFromTBE;
u_sendExclusiveUnblockToDir;
//u_sendExclusiveUnblockToDir;
w_deallocateTBE;
p_popTriggerQueue;
}