1154 commits

Author	SHA1	Message	Date
Brad Beckmann	6d22db4eaa	ruby: Ruby support for LLSC	2010-03-21 21:22:21 -07:00
Brad Beckmann	f53287f9ad	ruby: Minor dma latency initialization fix	2010-03-21 21:22:21 -07:00
Tushar Krishna	7c20d5511a	ruby: Fix multiple wakeups in Ruby Eventqueue ... Fix bug in Ruby Event queue to avoid multiple wakeups of same consumer in same cycle	2010-03-21 21:22:21 -07:00
Brad Beckmann	103f5a2c94	ruby: Removed the obsolete file specified network files	2010-03-21 21:22:21 -07:00
Brad Beckmann	d464087101	ruby: Added copyright to many Ruby *.py files	2010-03-21 21:22:20 -07:00
Brad Beckmann	378fbce911	ruby: Fixed small data msg bug in MOESI_hammer-dir	2010-03-21 21:22:20 -07:00
Brad Beckmann	0368ef915a	ruby: Removed the no longer used rubymem files	2010-03-21 21:22:20 -07:00
Brad Beckmann	c48a735336	ruby: Fix MOESI_hammer cache profiler calls for L2 misses	2010-03-21 21:22:20 -07:00
Brad Beckmann	391b4e64e6	ruby: Removed deprecated stats from the main profiler	2010-03-21 21:22:20 -07:00
Nathan Binkert	86207a69e4	orion: Make declarations match definition	2010-03-16 08:15:16 -07:00
Nathan Binkert	edb59ed263	ruby: Fix copyrights on files ... Mostly files missed during import or screwed up during import	2010-03-14 20:58:45 -07:00
Nathan Binkert	0bbf63f17a	slicc: Change the code generation so that the generated code is easier to read	2010-03-12 18:42:56 -08:00
Nathan Binkert	c8f296bca0	packet: add a method to set the size	2010-03-12 17:31:08 -08:00
Nathan Binkert	fce7c820f4	bugfix: since pow() causes a bug don't use it ... It's a power of two anyway, so why use it in the first place.	2010-03-12 15:11:09 -08:00
Nathan Binkert	140785d24c	ruby: get rid of std-includes.hh ... Do not use "using namespace std;" in headers Include header files as needed	2010-03-10 18:33:11 -08:00
Nathan Binkert	1badec39a9	ruby: remove calc_host.diff since we don't use it	2010-03-10 16:22:27 -08:00
Nathan Binkert	226eaf9ddf	ruby: get rid of the ioutil stuff since it isn't used anymore	2010-03-10 16:22:26 -08:00
Nathan Binkert	cf86532857	slicc: have a central mechanism for creating a code_formatter. ... This makes it easier to add global variables like protocol	2010-03-10 16:22:26 -08:00
Lisa Hsu	7f3cd9a9fd	cache stats: account for writebacks and/or device occupancy in the cache. ... Plus, a minor bugfix that neglects to update blk->contextSrc in certain cases on a cache insert.	2010-02-24 13:46:55 -08:00
Lisa Hsu	1d3228481f	cache: Make caches sharing aware and add occupancy stats. ... On the config end, if a shared L2 is created for the system, it is parameterized to have n sharers as defined by option.num_cpus. In addition to making the cache sharing aware so that discriminating tag policies can make use of context_ids to make decisions, I added an occupancy AverageStat and an occ % stat to each cache so that you could know which contexts are occupying how much cache on average, both in terms of blocks and percentage. Note that since devices have context_id -1, having an array of occ stats that correspond to each context_id will break here, so in FS mode I add an extra bucket for device blocks. This bucket is explicitly not added in SE mode in order to not only avoid ugliness in the stats.txt file, but to avoid broken stats (some formulas break when a bucket is 0).	2010-02-23 09:34:22 -08:00
Lisa Hsu	2ad386f104	cache: pull CacheSet out of LRU so that other tags can use associative sets.	2010-02-23 09:33:09 -08:00
Brad Beckmann	64999b4343	ruby: fixed data block assignment fix ... Fixed data block assignment to not delete if not internally allocated.	2010-02-10 16:40:54 -08:00
Brad Beckmann	714865e4a4	ruby: Initialize sender in MI_example-dir	2010-02-10 16:40:54 -08:00
Brad Beckmann	a407675106	ruby: Fixed slicc to initialize the m_is_blocking flag	2010-02-10 16:40:54 -08:00
Brad Beckmann	1d4c3ecdc3	ruby: Added FS support to the simple mesh topology ... Added full-system support to the simple mesh toplogy by allowing dma contrllers to be attached to router zero in the network.	2010-02-01 14:27:16 -08:00
Brad Beckmann	db2ecbb6b6	ruby: Set default protocol back to MI_example	2010-02-01 11:07:38 -08:00
Brad Beckmann	ab2f864af2	m5: Regression Tester Update ... This patch includes the necessary regression updates to test the new ruby configuration system. The patch includes support for multiple ruby protocols and adds the ruby random tester. The patch removes atomic mode test for ruby since ruby does not support atomic mode acceses. These tests can be added back in when ruby supports atomic mode for real. --HG-- rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py	2010-01-29 20:29:40 -08:00
Brad Beckmann	ceae8383ff	ruby: Replaced gems_common debug statements ... Replaced Ruby debug statements with M5 statements.	2010-01-29 20:29:34 -08:00
Brad Beckmann	143d8ea698	ruby: removed last level cache support ... Removed the last level cache support and MOESI_hammer's dependency on it. Replaces the LLC support with the more generic MachineType count.	2010-01-29 20:29:34 -08:00
Brad Beckmann	90aab239a1	ruby: Added a Scons option to prevent HTML file creation	2010-01-29 20:29:33 -08:00
Brad Beckmann	1feae85017	ruby: Removed static members in RubyPort including hitcallback ... Removed static members in RubyPort and removed the ruby request unique id.	2010-01-29 20:29:33 -08:00
Brad Beckmann	a579d3e43c	ruby: Removed the old config interface ... Removed the old config interface from RubySystem and libruby.	2010-01-29 20:29:33 -08:00
Brad Beckmann	e4218dd08f	ruby: Re-enabled orion power models ... Removed the dummy power function implementations so that Orion can implement them correctly. Since Orion lacks modular design, this patch simply enables scons to compile it. There are no python configuration changes in this patch.	2010-01-29 20:29:33 -08:00
Brad Beckmann	8dd45674ae	ruby: Converted Garnet to M5 configuration	2010-01-29 20:29:32 -08:00
Steve Reinhardt	b544462505	Garnet: reorganize directory tree. ... Rename the ruby/network/garnet-foo directories to garnet/foo. Move the common NetworkHeader.hh file from garnet-fixed-pipeline up to the common garnet directory. Fix up include paths. --HG-- rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkHeader.hh => src/mem/ruby/network/garnet/NetworkHeader.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/CreditLink_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/GarnetNetwork_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/GarnetNetwork_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/InputUnit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/InputUnit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkInterface_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkInterface_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkLink_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/NetworkLink_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/OutVcState_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/OutVcState_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/OutputUnit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/OutputUnit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/Router_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/Router_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/RoutingUnit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/RoutingUnit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/SConscript => src/mem/ruby/network/garnet/fixed-pipeline/SConscript rename : src/mem/ruby/network/garnet-fixed-pipeline/SWallocator_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/SWallocator_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/Switch_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/Switch_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/VCallocator_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/VCallocator_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/VirtualChannel_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/VirtualChannel_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/flitBuffer_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/flitBuffer_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh rename : src/mem/ruby/network/garnet-fixed-pipeline/flit_d.cc => src/mem/ruby/network/garnet/fixed-pipeline/flit_d.cc rename : src/mem/ruby/network/garnet-fixed-pipeline/flit_d.hh => src/mem/ruby/network/garnet/fixed-pipeline/flit_d.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/FlexibleConsumer.hh => src/mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/GarnetNetwork.cc => src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/GarnetNetwork.hh => src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/InVcState.cc => src/mem/ruby/network/garnet/flexible-pipeline/InVcState.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/InVcState.hh => src/mem/ruby/network/garnet/flexible-pipeline/InVcState.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkConfig.hh => src/mem/ruby/network/garnet/flexible-pipeline/NetworkConfig.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkInterface.cc => src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkInterface.hh => src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkLink.cc => src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/NetworkLink.hh => src/mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/OutVcState.cc => src/mem/ruby/network/garnet/flexible-pipeline/OutVcState.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/OutVcState.hh => src/mem/ruby/network/garnet/flexible-pipeline/OutVcState.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/Router.cc => src/mem/ruby/network/garnet/flexible-pipeline/Router.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/Router.hh => src/mem/ruby/network/garnet/flexible-pipeline/Router.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/SConscript => src/mem/ruby/network/garnet/flexible-pipeline/SConscript rename : src/mem/ruby/network/garnet-flexible-pipeline/VCarbiter.cc => src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/VCarbiter.hh => src/mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/flit.cc => src/mem/ruby/network/garnet/flexible-pipeline/flit.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/flit.hh => src/mem/ruby/network/garnet/flexible-pipeline/flit.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/flitBuffer.cc => src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.cc rename : src/mem/ruby/network/garnet-flexible-pipeline/flitBuffer.hh => src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh rename : src/mem/ruby/network/garnet-flexible-pipeline/netconfig.defaults => src/mem/ruby/network/garnet/flexible-pipeline/netconfig.defaults	2010-01-29 20:29:30 -08:00
Brad Beckmann	6c867f8263	ruby: Added a mesh topology	2010-01-29 20:29:27 -08:00
Brad Beckmann	faa76fc248	ruby: MESI_CMP_directory updated to the new config system	2010-01-29 20:29:27 -08:00
Brad Beckmann	3e286d825d	ruby: Sorted the file includes to maintain consistency	2010-01-29 20:29:26 -08:00
Brad Beckmann	5fb1f5c72b	ruby: Renamed the MESI directory sm file ... Renamed the MESI directory file to be consistent with all other protocols. --HG-- rename : src/mem/protocol/MESI_CMP_directory-mem.sm => src/mem/protocol/MESI_CMP_directory-dir.sm	2010-01-29 20:29:26 -08:00
Brad Beckmann	79f354466e	ruby: Removed the GPL header in MESI_CMP_directory-msg ... I'm not sure how this got past our initial ruby code import, but this obviously needed to be removed.	2010-01-29 20:29:26 -08:00
Brad Beckmann	31fcf09a68	ruby: MOESI_CMP_directory updated to the new config system	2010-01-29 20:29:26 -08:00
Brad Beckmann	1c4405ad5e	ruby: Added atomic support to MOESI_CMP_token	2010-01-29 20:29:25 -08:00
Brad Beckmann	042d5b87a4	ruby: fixed memory fetch bug for persistent requests	2010-01-29 20:29:25 -08:00
Brad Beckmann	d77a9df3c1	ruby: MOESI_CMP_token updates to use the new config system	2010-01-29 20:29:25 -08:00
Brad Beckmann	d42152742b	ruby: Allows boolean and string defaults for StateMachine parameters	2010-01-29 20:29:24 -08:00
Brad Beckmann	b3d195153e	ruby: MI_example updates to use the new config system	2010-01-29 20:29:24 -08:00
Brad Beckmann	134cc3d48d	ruby: convert to M5 MemorySize ... Converted both ruby caches and directory memory to use the M5 MemorySize python type.	2010-01-29 20:29:23 -08:00
Brad Beckmann	3a835c7cbb	ruby: Added Cache and MemCntrl profiler calls	2010-01-29 20:29:23 -08:00
Brad Beckmann	47502163b7	ruby: added data print to ruby request	2010-01-29 20:29:23 -08:00
Brad Beckmann	66279fac3f	ruby: Added atomic support to MOESI_hammer	2010-01-29 20:29:23 -08:00
Brad Beckmann	45230a4f6b	ruby: added the GEMS ruby tester	2010-01-29 20:29:23 -08:00
Brad Beckmann	4eb3bfc31b	ruby: fixed MOESI_hammer data writebacks to the directory	2010-01-29 20:29:22 -08:00
Brad Beckmann	f88faa6c11	ruby: cleaned up ruby profilers ... Cleaned up the ruby profilers by moving the memory controller profiling code out of the main profiler object and into a separate object similar to the current CacheProfiler. Both the CacheProfiler and MemCntrlProfiler are specific to a particular Ruby object, CacheMemory and MemoryControl respectively. Therefore, these profilers should not be SimObjects and created by the python configuration system, but instead private objects. This simplifies the creation of these profilers.	2010-01-29 20:29:22 -08:00
Brad Beckmann	cfe41d0a1b	ruby: Removed RubySystem::getNumberOfSequencers ... removed the static function RubySystem::getNumberOfSequencers and replaced it with a python config variable	2010-01-29 20:29:21 -08:00
Brad Beckmann	1907e39fd2	ruby: added ruby stats print ... Moved the previous rubymem stats print feature to ruby System so that ruby stats are printed on simulation exit.	2010-01-29 20:29:21 -08:00
Brad Beckmann	020716cab3	ruby: fixed Set.cc bug to allow zero sized sets ... This is necessary for example when no dma sequencers are necessary in the simulated system.	2010-01-29 20:29:21 -08:00
Brad Beckmann	ce2d13195b	ruby: FS support using the new configuration system	2010-01-29 20:29:21 -08:00
Brad Beckmann	dc758641c9	ruby: reorganized ruby python configuration ... Reorganized ruby python configuration so that protocol and ruby memory system configuration code can be shared by multiple front-end configuration files (i.e. memory tester, full system, and hopefully the regression tester). This code works for memory tester, but have not tested fs mode.	2010-01-29 20:29:20 -08:00
Brad Beckmann	e735ca7c77	ruby: Removed out_link_vec from Consumer ... Removed the out_line_vec data structure from the Consumer. I'm not sure what this did before, but currently it has no usefulness.	2010-01-29 20:29:20 -08:00
Brad Beckmann	0f6535dba1	ruby: Convered ruby tracing support usage of sequencer ... Modified ruby's tracing support to no longer rely on the RubySystem map to convert a sequencer string name to a sequencer pointer. As a temporary solution, the code uses the sim_object find function. Eventually, we should develop a better fix.	2010-01-29 20:29:20 -08:00
Brad Beckmann	2c9ca672df	ruby: Memory Controller Profiler with new config system ... This patch includes a rather substantial change to the memory controller profiler in order to work with the new configuration system. Most noteably, the mem_cntrl_profiler no longer uses a string map, but instead a vector. Eventually this support should be removed from the main profiler and go into a separate object. Each memory controller should have a pointer to that new mem_cntrl profile object.	2010-01-29 20:29:20 -08:00
Brad Beckmann	2a0555470c	ruby: Converted MOESI_hammer dma cntrl to new config system	2010-01-29 20:29:19 -08:00
Brad Beckmann	3b290a35ac	ruby: Added the cache profiler to the new config system	2010-01-29 20:29:19 -08:00
Brad Beckmann	4e5f4b5074	ruby: Converted the sequencer deadlock event to m5 eventq	2010-01-29 20:29:19 -08:00
Brad Beckmann	e15abd17f9	ruby: Wrapped ruby events into m5 events ... Wrapped ruby events using the m5 event object. Removed the prio_heap from ruby's event queue and instead schedule ruby events on the m5 event queue.	2010-01-29 20:29:19 -08:00
Brad Beckmann	63a60cc81e	ruby: Removed the tech_nm variable from RubySystem	2010-01-29 20:29:19 -08:00
Brad Beckmann	12daaed84a	ruby: Added clock to ruby system ... As a first step to migrate ruby to the M5 eventqueue, added a clock variable to the ruby system.	2010-01-29 20:29:19 -08:00
Brad Beckmann	ed81489954	ruby: Ruby changes required to use the python config system ... This patch includes the necessary changes to connect ruby objects using the python configuration system. Mainly it consists of removing unnecessary ruby object pointers and connecting the necessary object pointers using the generated param objects. This patch includes the slicc changes necessary to connect generated ruby objects together using the python configuraiton system.	2010-01-29 20:29:19 -08:00
Brad Beckmann	42bebab779	ruby: connects sm queues to the network	2010-01-29 20:29:18 -08:00
Steve Reinhardt	a8ea70dac6	ruby: Calculate system total memory capacity in Python ... rather than in RubySystem object.	2010-01-29 20:29:18 -08:00
Steve Reinhardt	0b54f1db8e	ruby: Add support for generating topologies in Python.	2010-01-29 20:29:17 -08:00
Steve Reinhardt	184cf4db5b	scons: ignore blank lines in .slicc files	2010-01-29 20:29:17 -08:00
Steve Reinhardt	c6f1d959be	ruby: Make SLICC-generated objects SimObjects. ... Also add SLICC support for state-machine parameter defaults (passed through to Python as SimObject Param defaults).	2010-01-29 20:29:17 -08:00
Steve Reinhardt	98c94cfe3c	ruby: Convert most Ruby objects to M5 SimObjects. ... The necessary companion conversion of Ruby objects generated by SLICC are converted to M5 SimObjects in the following patch, so this patch alone does not compile. Conversion of Garnet network models is also handled in a separate patch; that code is temporarily disabled from compiling to allow testing of interim code.	2010-01-29 20:29:17 -08:00
Steve Reinhardt	b43994ba45	ruby: get rid of obsolete, unused CustomTopology class.	2010-01-29 20:29:14 -08:00
Brad Beckmann	7f03dce012	ruby: fix out_port declaration	2010-01-29 20:29:14 -08:00
Brad Beckmann	43e4f59e4f	ruby: Added message type check to OutPortDeclAST.py ... Though OutPort's message type is not used to generate code, this fix checks that the programmer's intent is correct. Eventually, we may want to remove the message type from the OutPort declaration statement.	2010-01-29 20:29:13 -08:00
Derek Hower	589218168c	Automated merge with ssh://hg@m5sim.org/m5	2010-01-22 17:23:21 -06:00
Lisa Hsu	d6da172517	util: do checkpoint aggregation more cleanly, fix last changeset. ... 1) Move alpha-specific code out of page_table.cc:serialize(). 2) Begin serializing M5_pid and unserializing it, but adding an function to do optional paramIn so that old checkpoints don't need to be fixed up. 3) Fix up alpha startup code so that the unserialized M5_pid value is properly written to DTB_IPR_ASN. 4) Fix the memory unserialize that I forgot somehow in the last changeset. 5) Add in an agg_se.py to handle aggregated checkpoints. --bench foo-bar plus positional arguments foo bar are the only changes in usage from se.py. Note this aggregation stuff has only been tested for Alpha and nothing else, though it should take a very minimal amount of work to get it to work with another ISA.	2010-01-19 22:03:44 -08:00
Derek Hower	07ea0891f1	ruby: new atomics implementation ... This patch changes the way that Ruby handles atomic RMW instructions. This implementation, unlike the prior one, is protocol independent. It works by locking an address from the sequencer immediately after the read portion of an RMW completes. When that address is locked, the coherence controller will only satisfy requests coming from one port (e.g., the mandatory queue) and will ignore all others. After the write portion completed, the line is unlocked. This should also work with multi-line atomics, as long as the blocks are always acquired in the same order.	2010-01-19 17:11:36 -06:00
Derek Hower	279f179bab	merge	2010-01-19 15:48:12 -06:00
Lisa Hsu	4a40ac71f8	util: make a generic checkpoint aggregator that can aggregate different cpts into one multi-programmed cpt. Make minor changes to serialization/unserialization to get it to work properly. Note that checkpoints were made with a comment at the beginning with // - this must be changed to ## to work properly with the python config parser in the aggregator.	2010-01-18 14:30:31 -08:00
Lisa Hsu	8b4e8690b7	cache: make tags->insertBlock() and tags->accessBlock() context aware so that the cache can make context-specific decisions within their various tag policy implementations.	2010-01-12 10:53:02 -08:00
Derek Hower	5aa104e072	ruby: cleaned up ruby-lang configuration	2009-12-04 13:12:40 -06:00
Brad Beckmann	5d8a669539	Resurrection of the CMP token protocol to GEM5	2009-11-18 16:34:33 -08:00
Brad Beckmann	dcac2ec24c	ruby: removed the chip pointer from MessageBuffer ... The Chip object no longer exists and thus is removed from the MessageBuffer constructor.	2009-11-18 16:34:32 -08:00
Brad Beckmann	c9764b1ff1	ruby: added error message to isinstance check ... Added error message when a symbol is not an instance of a particular expected type.	2009-11-18 16:34:32 -08:00
Brad Beckmann	20f872ed2a	ruby: Added boolean to State Machine parameters ... * * * ruby: Removed primitive .hh includes	2009-11-18 16:34:32 -08:00
Brad Beckmann	8011e80725	ruby: The persistent table files from GEMS ... These files are need by the MOESI_CMP_token protocol.	2009-11-18 16:34:32 -08:00
Brad Beckmann	cef3c56163	ruby: MOESI hammer support for DMA reads and writes	2009-11-18 16:34:32 -08:00
Brad Beckmann	dbb2c111cc	ruby: Added a memory controller feature to MOESI hammer	2009-11-18 16:34:32 -08:00
Brad Beckmann	bc12b8432d	ruby: Hammer ruby configuration support	2009-11-18 16:34:32 -08:00
Brad Beckmann	877be2009c	ruby: Changes necessary to get the hammer protocol to work in GEM5	2009-11-18 16:34:32 -08:00
Brad Beckmann	b0973035b4	ruby: added the original hammer protocols from old ruby	2009-11-18 16:34:31 -08:00
Brad Beckmann	2783a7b9ad	ruby: returns the number of LLC needed for broadcast ... Added feature to CacheMemory to return the number of last level caches. This count is need for broadcast protocols such as MOESI_hammer.	2009-11-18 16:34:31 -08:00
Brad Beckmann	7b8fcecf11	ruby: cache configuration fix to use bytes ... Changed cache size to be in bytes instead of kb so that testers can use very small caches and increase the chance of writeback races.	2009-11-18 16:34:31 -08:00
Brad Beckmann	99338a7460	ruby: fix CacheMemory destructor	2009-11-18 16:33:35 -08:00
Brad Beckmann	7ab484624f	ruby: split CacheMemory.hh into a .hh and a .cc	2009-11-18 16:33:35 -08:00
Brad Beckmann	8b0f970084	ruby: Added default names to message buffers ... Added default names to message buffers created by the simple network.	2009-11-18 13:55:58 -08:00
Brad Beckmann	ed54ecf1c8	ruby: slicc method error fix ... Added error message when a method call is not supported by an object.	2009-11-18 13:55:58 -08:00
Brad Beckmann	994169327a	ruby: slicc action error fix ... Small fix to the State Machine error message when duplicate actions are defined.	2009-11-18 13:55:58 -08:00
Brad Beckmann	cc2db929cb	ruby: slicc state machine error fixes ... Added error messages when: - a state does not exist in a machine's list of known states. - an event does not exist in a machine - the actions of a certain machine have not been declared	2009-11-18 13:55:58 -08:00
Brad Beckmann	e84881b7a3	ruby: Removed unused action z_stall	2009-11-18 13:55:58 -08:00
Brad Beckmann	faf1d97f24	ruby: fixed dma mi example to work with multiple dma ports	2009-11-18 13:55:58 -08:00
Brad Beckmann	93f0069dd5	ruby: getPort function fix ... Fixed RubyMemory::getPort function to not pass in a -1 for the idx parameter	2009-11-18 13:55:58 -08:00
Brad Beckmann	204d1776ca	ruby: Fixed Directory memory destructor	2009-11-18 13:55:58 -08:00
Brad Beckmann	6e1dc2546c	m5: Added isValidSrc and isValidDest calls to packet.hh	2009-11-18 13:55:58 -08:00
Brad Beckmann	90d6e2652f	ruby: included ruby config parameter ports per core ... Slightly improved the major hack need to correctly assign the number of ports per core. CPUs have two ports: icache + dcache. MemTester has one port.	2009-11-18 13:55:58 -08:00
Brad Beckmann	dce53610c3	ruby: Added error check for openning the ruby config file	2009-11-18 13:55:58 -08:00
Brad Beckmann	3cf24f9716	ruby: Support for merging ALPHA_FS and ruby ... Connects M5 cpu and dma ports directly to ruby sequencers and dma sequencers. Rubymem also includes a pio port so that pio requests and be forwarded to a special pio bus connecting to device pio ports.	2009-11-18 13:55:58 -08:00
Brad Beckmann	d7a4f665ed	ruby: Added more info to bridge error message	2009-11-18 13:55:57 -08:00
Brad Beckmann	17e14efa7e	ruby: Ruby 64-bit address output fixes.	2009-11-18 13:55:57 -08:00
Brad Beckmann	b7cc66af31	ruby: Ruby destruction fix.	2009-11-18 13:55:57 -08:00
Brad Beckmann	5492f71755	ruby: Ruby debug print fixes.	2009-11-18 13:55:57 -08:00
Derek Hower	9ef5e72917	ruby: added sequencer stats to track what requests are waiting on	2009-11-18 11:55:30 -06:00
Derek Hower	d11dd6ed2c	ruby: turned off randomization by default, turned on memory controller random arbitrate	2009-11-18 11:53:43 -06:00
Derek Hower	2f5839832e	ruby: added -A option to TwoLevel_SplitL1UnifiedL2 to set the L1 cache size	2009-11-13 09:45:23 -06:00
Derek Hower	f7f475a6f4	ruby: gave ALIASED_REQUEST priority over BUFFER_FULL in sequencer	2009-11-13 09:44:51 -06:00
Derek Hower	2ee04d6587	ruby: reduce the memory usage of ruby by making memory vector page based	2009-11-13 09:43:39 -06:00
Derek Hower	ceb8fde914	ruby: cache memory bugfix	2009-11-13 09:42:47 -06:00
Gabe Black	b8120f6c38	Mem: Eliminate the NO_FAULT request flag.	2009-11-10 21:10:18 -08:00
Steve Reinhardt	9098010e3f	slicc: tweak file enumeration for scons ... Right now .cc and .hh files are handled separately, but then they're just munged together at the end by scons, so it doesn't buy us anything. Might as well munge from the start since we'll eventually be adding generated Python files to the list too.	2009-11-05 11:11:06 -08:00
Steve Reinhardt	058ccfc7fe	slicc: whack some of Nate's leftover debug code	2009-11-05 11:11:05 -08:00
Nathan Binkert	2c5fe6f95e	build: fix compile problems pointed out by gcc 4.4	2009-11-04 16:57:01 -08:00
Nathan Binkert	25d9328689	license: Fix license on network model code ... This mostly was a matter of changing the license owner to Princeton which is as it should have been. The code was originally licensed under the GPL but was relicensed as BSD by Li-Shiuan Peh on July 27, 2009. This relicensing was in an explicit e-mail to Nathan Binkert, Brad Beckmann, Mark Hill, David Wood, and Steve Reinhardt.	2009-10-28 11:56:56 -07:00
Derek Hower	22d9a53080	ruby: removed obsolete configuration files	2009-10-20 15:29:02 -05:00
Brad Beckmann	0fdfc82bde	fixed error message generation bug in SLICC ast files	2009-10-26 17:06:32 -07:00
Derek Hower	909bac6840	ruby: add parameter to config to set # of l2 banks	2009-10-16 16:31:16 -05:00
Derek Hower	4505216282	merge	2009-10-07 15:48:26 -05:00
Steve Reinhardt	8a761c44af	bus: add assertion to catch illegal retry ... on mem-inhibited transaction.	2009-10-03 18:07:39 -07:00
Steve Reinhardt	f679630788	Minor cleanup: Use the blockAlign() method where it applies in the cache.	2009-09-26 10:50:50 -07:00
Steve Reinhardt	72cfed4164	Force prefetches to check cache and MSHRs immediately prior to issue. ... This prevents redundant prefetches from being issued, solving the occasional 'needsExclusive && !blk->isWritable()' assertion failure in cache_impl.hh that several people have run into. Eliminates "prefetch_cache_check_push" flag, neither setting of which really solved the problem.	2009-09-26 10:50:50 -07:00
Derek Hower	d9a2450054	protocol: cleaned up MESI...got rid of unneccessary virtual networks	2009-09-25 17:51:51 -05:00
Derek Hower	83a9dc2939	ruby: more helpful config error message	2009-09-25 17:51:12 -05:00
Derek Hower	26990dc492	slicc: removed unused atomics code from StateMachine	2009-09-25 17:47:38 -05:00
Nathan Binkert	be0d74d6f6	ruby: Disable all debug output by default	2009-09-23 18:17:11 -07:00
Nathan Binkert	d9f39c8ce7	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	2009-09-23 08:34:21 -07:00
Nathan Binkert	2278363015	slicc: Pure python implementation of slicc. ... This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur". Slicc can easily be run manually by using util/slicc	2009-09-22 18:12:39 -07:00
Nathan Binkert	e9288b2cd3	scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access	2009-09-22 15:24:16 -07:00
Nathan Binkert	9a8cb7db7e	python: Move more code into m5.util allow SCons to use that code. ... Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py	2009-09-22 15:24:16 -07:00
Polina Dudnik	4f463b3a26	Atomics bug fix	2009-09-21 13:04:52 -05:00
Polina Dudnik	114d8724dd	Functionality migrated to sequencer.	2009-09-17 17:39:52 -05:00
Derek Hower	31a3ef03cb	ruby: improve libruby_issue_request feedback	2009-09-15 21:37:40 -05:00
Derek Hower	144459032a	removed isReady from the library interface	2009-09-15 20:49:54 -05:00
Derek Hower	20da0f788c	ruby: added broadcast mechanism	2009-09-15 20:39:00 -05:00
Derek Hower	a06cfa199f	ruby: added unified assert script	2009-09-15 11:32:11 -05:00
Derek Hower	803cf3b434	ruby: made configuration parameters uniform	2009-09-15 09:47:11 -05:00
Derek Hower	11f3f83068	ruby:removed unused code from CacheMemory	2009-09-14 17:52:46 -05:00
Derek Hower	18e328cb63	ruby: configuration updates	2009-09-14 17:11:02 -05:00
Derek Hower	62b06f4a70	ruby: removed stray printf	2009-09-14 17:09:26 -05:00
Derek Hower	75c2baa81c	merge	2009-09-11 16:23:17 -05:00
Derek Hower	6fc2a4cadc	ruby: cleaned up unified MESI/MOESI configuration	2009-09-11 16:22:59 -05:00
Polina Dudnik	c7f0cf9803	Added new MESI files	2009-09-11 16:19:31 -05:00
Derek Hower	bd770274b0	merge	2009-09-11 14:17:21 -05:00
Polina Dudnik	8cdd7265ce	Config adjustments for MESI	2009-09-11 11:07:22 -05:00
Polina Dudnik	fc9ebc60db	Somayeh's MESI protocol with Polina's bug fixes	2009-09-11 11:04:55 -05:00
Polina Dudnik	7ef3e3b2c2	MI data corruption bug fix	2009-09-11 10:59:35 -05:00
Polina Dudnik	353a69eae7	Object print bug fix	2009-09-11 10:59:08 -05:00
Polina Dudnik	2af2e590e1	MOESI data corruption bug fix	2009-09-11 10:58:37 -05:00
Derek Hower	0637fe0bfd	ruby: removed SMT-related Sequencer assert	2009-09-10 21:19:54 -05:00
Derek Hower	ef87b6dc82	ruby: made randomization true by default	2009-09-10 21:19:34 -05:00
Derek Hower	26acdd4f34	protocol: made MI_example work with unordered networks	2009-09-10 21:18:09 -05:00
Derek Hower	e6e3ccf5c0	ruby: made L2 request/response latency based on cache latency by default	2009-09-10 13:32:16 -05:00
Derek Hower	3bb2fcfc84	ruby: made Locked read/write atomic requests within ruby	2009-09-09 12:39:10 -05:00
Derek Hower	edd522b30a	Automated merge with ssh://hg@m5sim.org/m5	2009-09-01 09:36:53 -05:00
Derek Hower	849bad7ad7	ruby: fixed config assertion failure	2009-09-01 09:35:48 -05:00
Polina Dudnik	041a8cefc7	[mq]: MOESI_patch	2009-08-31 16:38:22 -05:00
Polina Dudnik	a02dbd61f9	Reset the atomics flags if RMW_Read is not followed by a RMW_Read or RMW_Write	2009-08-28 15:09:41 -05:00
Polina Dudnik	95da6dc84c	imported patch mi_patch	2009-08-28 15:04:55 -05:00
Derek Hower	15aa180570	merge	2009-08-25 10:37:21 -05:00
Derek Hower	6cd552483b	Automated merge with ssh://hg@m5sim.org/m5	2009-08-25 10:10:23 -05:00
Derek Hower	03bf748ac7	ruby: CacheMemory tag lookup uses a hash instead of a loop	2009-08-25 10:09:47 -05:00
Polina Dudnik	a4fc1bad94	[mq]: first_patch	2009-08-21 15:52:46 -05:00
Derek Hower	efc1dddbd8	ruby: added random seed option to config scripts	2009-08-18 16:24:09 -05:00
Polina Dudnik	6654fe02da	Made servicing_atomic a counter and added started writes: ... a function for setting the flag to indicate that the rmw_writes started issuing	2009-08-15 12:45:11 -05:00
Polina Dudnik	a8e11cf3bb	Bug fix: indicate when writes started coming in	2009-08-14 17:57:54 -05:00
Polina Dudnik	ee3226d973	Merge with current branch	2009-08-14 15:30:25 -05:00
Polina Dudnik	0b0f47ec16	Added proc_id to CacheMsg for SMT. ... Not yet necessary, but in case each of the threads is allowed to initiate an atomic, will come in handy	2009-08-14 15:30:07 -05:00
Polina Dudnik	de25decf37	Multi-line RMW handling	2009-08-14 14:24:15 -05:00
Polina Dudnik	4b924fd16c	SMT atomics modifications: ... don't allow enquing from other threads if servicing and atomic for a thread	2009-08-14 14:06:14 -05:00
Derek Hower	bcaf93d182	Automated merge with ssh://hg@m5sim.org/m5	2009-08-13 10:37:37 -05:00
Derek Hower	db40cb8f51	ruby: config bugfix	2009-08-13 10:37:09 -05:00
Tushar Krishna	35082a67b6	ruby/network data_msg_size bug fix with updated stats	2009-08-11 15:19:04 -07:00
Brad Beckmann	b89add1e3f	merged Tushar's bug fix with public repository changes	2009-08-11 12:22:41 -07:00
Derek Hower	1a452d228b	protocol: added recycle actions to MOESI DMA events	2009-08-09 13:58:40 -05:00
Tushar Krishna	b952eb19c1	bug fix for data_msg_size in network/Network.cc	2009-08-07 13:59:40 -07:00
Derek Hower	cbc52ef6c5	fixed MOESI_CMP_directory bug	2009-08-06 03:41:28 -05:00
Derek Hower	f5e0c56da2	protocol: fixed MOESI_CMP_directory bug	2009-08-06 01:15:55 -05:00
Derek Hower	a1b5a6320f	ruby: better configuration assert message	2009-08-06 01:15:23 -05:00
Derek Hower	dff7c9eaa0	merge	2009-08-05 14:23:32 -05:00
Derek Hower	fbf7391bb0	ruby: configuration supports multiple runs in same session ... These changes allow to run Ruby-gems multiple times from the same ruby-lang script with different configurations	2009-08-05 14:20:32 -05:00
Derek Hower	1276df51e2	protocol: made MI_example dma mapping generic	2009-08-05 14:17:23 -05:00
Derek Hower	7f012ef8da	ruby: made mapAddressToRange based off a bit count	2009-08-04 23:05:37 -05:00
Derek Hower	33b28fde7a	slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers ... This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported.	2009-08-04 12:52:52 -05:00
Derek Hower	c1e0bd1df4	slicc: generate html by default	2009-08-04 12:42:45 -05:00
Nathan Binkert	bd7af84d5e	slicc: better error messages when the python parser fails	2009-08-04 09:37:27 -07:00
Derek Hower	ac15e42c17	Automated merge with ssh://hg@m5sim.org/m5	2009-08-03 11:39:08 -05:00
Steve Reinhardt	a13a706a20	Fix setting of INST_FETCH flag for O3 CPU. ... It's still broken in inorder. Also enhance DPRINTFs in cache and physical memory so we can see more easily whether it's getting set or not.	2009-08-01 22:50:14 -07:00
Steve Reinhardt	1c28004654	Clean up some inconsistencies with Request flags.	2009-08-01 22:50:13 -07:00
Steve Reinhardt	c0755e6085	Rename internal Request fields to start with '_'. ... The inconsistency was causing a subtle bug with some of the constructors where the params had the same name as the fields. This is also a first step to switching the accessors over to our new "standard", e.g., getVaddr() -> vaddr().	2009-08-01 22:50:10 -07:00
Derek Hower	d9ff3021ba	ruby: fixed clearStats	2009-07-29 13:46:58 -05:00
Derek Hower	469256d823	ruby: removed unused/incorrect profiler state	2009-07-27 21:43:43 -05:00
Polina Dudnik	e7a3bda497	Fixed the licences plus minor fixes for compilation	2009-07-22 20:28:32 -05:00
Derek Hower	7f34ee36ec	ruby: fixed sequencer RMW data bug	2009-07-21 19:42:09 -05:00
Derek Hower	80544cda8a	ruby: libruby_init now takes parsed Ruby-lang config text ... libruby_init now expects to get a file that contains the output of running a ruby-lang configuration, opposed to the ruby-lang configuration itself.	2009-07-21 18:33:05 -05:00
Derek Hower	e59d0e3e89	ruby: moved cache stats from Profiler to CacheMemory ... Caches are now responsible for their own statistic gathering. This requires a direct callback from the protocol on misses, and so all future protocols need to take this into account.	2009-07-20 09:40:43 -05:00
Derek Hower	308419b947	scons: removed RubyConfig from scons	2009-07-19 12:34:11 -05:00
Derek Hower	7cd2d8f687	ruby: removed all refs to old RubyConfig	2009-07-18 18:20:03 -05:00
Derek Hower	4bd7fe4c53	ruby: removed dead files	2009-07-18 18:18:37 -05:00
Derek Hower	f3d8d29342	ruby: removed dead files	2009-07-18 18:17:48 -05:00
Derek Hower	926ab6e6db	merge	2009-07-18 17:40:20 -05:00
Derek Hower	4b7ea4cb51	ruby: fixed dma sequencer bug ... The DMASequencer was still using a parameter from the old RubyConfig, causing an offset error when the requested data wasn't block aligned. This changeset also includes a fix to MI_example for a similar bug.	2009-07-18 17:03:51 -05:00
Derek Hower	340845b139	ruby: better debug print for DataBlock	2009-07-18 16:58:33 -05:00
Derek Hower	7433029cd5	slicc: made coherence profilers per-controller	2009-07-18 16:54:45 -05:00
Polina Dudnik	e557b4beb5	merge	2009-07-16 15:40:48 -05:00
Polina Dudnik	23a405f5d8	Tester update	2009-07-15 10:46:22 -05:00
Polina Dudnik	289cd00326	Changed the state machine to generate code such that multiple processors can make atomic requests at once	2009-07-13 18:39:32 -05:00
Polina Dudnik	5f551d9ca2	1. Got rid of unused functions in DirectoryMemory ... 2. Reintroduced RMW_Read and RMW_Write 3. Defined -2 in the Sequencer as well as made a note about mandatory queue Did not address the issues in the slicc because remaking the atomics altogether to allow multiple processors to issue atomic requests at once	2009-07-13 17:22:29 -05:00
Derek Hower	100da6b326	merge	2009-07-13 14:49:51 -05:00
Derek Hower	d51445490d	regression: updated memtest-ruby stats ... This also includes a change to the default Ruby random seed, which was previously set using the wall clock. It is now set to 1234 so that the stat files don't change for the regression tester.	2009-07-13 14:45:15 -05:00
Polina Dudnik	9a675a0391	Changes to add tracing and replaying command-line options ... Trace is automatically ended upon a manual checkpoint	2009-07-13 12:50:10 -05:00
Polina Dudnik	b28058917c	Locked requests should actually be converted to ST rather than ATOMIC, because ATOMIC is for RMW.	2009-07-13 12:11:17 -05:00
Polina Dudnik	7a6bf67e47	Added atomics implementation which would work for MI_example	2009-07-13 12:06:23 -05:00
Polina Dudnik	c66af9f474	Minor fixes for compiling	2009-07-13 11:59:13 -05:00
Polina Dudnik	7606c71ea5	Replaced RMW with Locked. RMW will be used for the coherence-aided atomics other than LLSC	2009-07-13 11:37:56 -05:00
Polina Dudnik	faf823f947	Moved the lock check and clearing the lock into makeRequest	2009-07-13 11:34:38 -05:00
Polina Dudnik	86ce60e5cd	Forgot to replace one of the RubyRequest_RMW	2009-07-13 11:25:23 -05:00
Polina Dudnik	226981b2a6	Reintegrated Derek's functional implementation of atomics with a minor change: don't clear lock on failure	2009-07-13 11:13:29 -05:00
Gabe Black	b398b8ff1b	Registers: Add a registers.hh file as an ISA switched header. ... This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh	2009-07-08 23:02:21 -07:00
Derek Hower	15afc87f7c	slicc: fixed MI_example bug. The directory wasn't deallocating the TBE, leading to a leak. Also increased the default max TBE size to 256 to allow memtest to pass the regression.	2009-07-08 08:40:32 -05:00
Derek Hower	6a83bd5a03	ruby: set the default values of the debug object so that nothing is printed	2009-07-08 00:34:40 -05:00
Derek Hower	2f9d8bff5b	slicc: Fixed MI_example bug. The directory was not writing data to DRAM after a PUTX.	2009-07-08 00:31:33 -05:00
Derek Hower	96c36afea9	removed stray debug print	2009-07-07 23:01:35 -05:00
Nathan Binkert	da704f52e5	ruby: Fix RubyMemory to work with the newer ruby.	2009-07-06 15:49:47 -07:00
Nathan Binkert	a7904e2cf3	ruby: apply some fixes that were overwritten by the recent ruby import.	2009-07-06 15:49:47 -07:00
Nathan Binkert	5b080ae046	slicc: update parser.py for changes in slicc language.	2009-07-06 15:49:47 -07:00
Nathan Binkert	1f6933503d	scons: update SCons files for changes in ruby.	2009-07-06 15:49:47 -07:00
Nathan Binkert	92de70b69a	ruby: Import the latest ruby changes from gems. ... This was done with an automated process, so there could be things that were done in this tree in the past that didn't make it. One known regression is that atomic memory operations do not seem to work properly anymore.	2009-07-06 15:49:47 -07:00
Nathan Binkert	05f6a4a6b9	ruby: replace strings that were missed in original ruby import.	2009-07-06 15:49:47 -07:00
Nathan Binkert	d3d8a5a83b	copyright: I missed some copyrights during ruby integration	2009-06-10 00:41:56 -07:00
Nathan Binkert	6faf377b53	types: clean up types, especially signed vs unsigned	2009-06-04 23:21:12 -07:00
Nathan Binkert	a0104b6ff6	request: add accessor and constructor for setting time other than curTick	2009-05-29 15:30:16 -07:00
Nathan Binkert	47877cf2db	types: add a type for thread IDs and try to use it everywhere	2009-05-26 09:23:13 -07:00
Nathan Binkert	8d2e51c7f5	includes: sort includes again	2009-05-17 14:34:52 -07:00
Nathan Binkert	709d859530	includes: use base/types.hh not inttypes.h or stdint.h	2009-05-17 14:34:51 -07:00
Nathan Binkert	eef3a2e142	types: Move stuff for global types into src/base/types.hh ... --HG-- rename : src/sim/host.hh => src/base/types.hh	2009-05-17 14:34:50 -07:00
Nathan Binkert	5207586b26	ruby: deal with printf warnings and convert some to cprintf	2009-05-12 22:33:05 -07:00
Nathan Binkert	016d472c46	ruby: remove random uint typedef and use unsigned	2009-05-12 22:33:05 -07:00
Nathan Binkert	7389dc63b2	ruby: Make ruby's Map use hashmap.hh to simplify things.	2009-05-12 22:33:05 -07:00
Nathan Binkert	0c2b9cf90d	slicc: work around improper initialization of a global in slicc.	2009-05-12 22:33:05 -07:00
Nathan Binkert	d923ce0f8c	slicc: clean up the slicc environment so things build properly on mac.	2009-05-12 22:33:04 -07:00
Nathan Binkert	f21e80ec72	ruby: assert(false) should be panic. ... This also fixes some compiler warnings	2009-05-11 16:32:32 -07:00
Nathan Binkert	cf6b4ef734	ruby: add RUBY sticky option that must be set to add ruby to the build ... Default is false	2009-05-11 10:38:46 -07:00
Daniel Sanchez	93f2f69657	ruby: Working M5 interface and updated Ruby interface. ... This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu> RubyMemory is now both a driver for Ruby and a port for M5. Changed makeRequest/hitCallback interface. Brought packets (superficially) into the sequencer. Modified tester infrastructure to be packet based. and Ruby can be used together through the example ruby_se.py script. SPARC parallel applications work, and the timing *seems* right from combined M5/Ruby debug traces. To run, % build/ALPHA_SE/m5.debug configs/example/ruby_se.py -c tests/test-progs/hello/bin/alpha/linux/hello -n 4 -t	2009-05-11 10:38:46 -07:00
Steve Reinhardt	ebf2f5aadd	ruby: Check stderr and not stdin before hanging on an assert.	2009-05-11 10:38:46 -07:00
Polina Dudnik	7769cc9092	ruby: decommission code ... 1. Set.* and BigSet.* are replaced with OptBigSet.* which was renamed Set.* 2. Decomissioned all bloom filters 3. Decomissioned ruby/simics directory	2009-05-11 10:38:46 -07:00
Derek Hower	0ccf8f35a5	ruby: removed dead functions from the sequencer	2009-05-11 10:38:46 -07:00
Polina Dudnik	29f82f265a	ruby: Removed g_SIMULATING flag ... 1. removed checks from tester files 2. removed else clause in Sequencer and DirectoryMemory else clause is needed by the tester, it is up to Derek to revive it elsewhere when he gets to it Also: 1. Changed m_entries in DirectoryMemory to a map 2. And replaced SIMICS_read_physical_memory with a call to now-dummy Derek's-to-be readPhysMem function	2009-05-11 10:38:46 -07:00
Polina Dudnik	b271090923	ruby: Remove transactional access types (e.g. LD_XACT) from CacheRequestType ... 1. Modified enumeration 2. Also modified profiler 3. Remove transactions from Tester 4. Edited XACT_MEM out of Synthetic Driver	2009-05-11 10:38:46 -07:00
Polina Dudnik	9f34659c52	ruby: reordered Debug and RubyConfig::init to fix segfault ... due to uninitialized output file pointer.	2009-05-11 10:38:46 -07:00
Dan Gibson	8cbf8df5b7	ruby: Disabled RubyEventQueue's deletion of its home-grown priority heap. ... Temporarily to fix unusual memory problem.	2009-05-11 10:38:46 -07:00
Nathan Binkert	7311fd7182	ruby: Migrate all of ruby and slicc to SCons. ... Add the PROTOCOL sticky option sets the coherence protocol that slicc will parse and therefore ruby will use. This whole process was made difficult by the fact that the set of files that are output by slicc are not easily known ahead of time. The easiest thing wound up being to write a parser for slicc that would tell me. Incidentally this means we now have a slicc grammar written in python.	2009-05-11 10:38:46 -07:00
Nathan Binkert	e40b8e34c8	ruby: clean up a few warnings	2009-05-11 10:38:45 -07:00
Dan Gibson	8b9f70b9e4	ruby: Fixed some unresolved references.	2009-05-11 10:38:45 -07:00
Nathan Binkert	24da30e317	ruby: Make ruby #includes use full paths to the files they're including. ... This basically means changing all #include statements and changing autogenerated code so that it generates the correct paths. Because slicc generates #includes, I had to hard code the include paths to mem/protocol.	2009-05-11 10:38:45 -07:00
Dan Gibson	d8c592a05d	ruby: remove unnecessary code. ... 1) Removing files from the ruby build left some unresovled symbols. Those have been fixed. 2) Most of the dependencies on Simics data types and the simics interface files have been removed. 3) Almost all mention of opal is gone. 4) Huge chunks of LogTM are now gone. 5) Handling 1-4 left ~hundreds of unresolved references, which were fixed, yielding a snowball effect (and the massive size of this delta).	2009-05-11 10:38:45 -07:00
Derek Hower	6ceaffd724	ruby: Cleaned up sequencer. Removed LogTM specific code.	2009-05-11 10:38:45 -07:00
Derek Hower	3d2acc547c	ruby: added Packet interface to makeRequest and isReady. ... Also pushed Packet usage into the Sequencer	2009-05-11 10:38:45 -07:00
Nathan Binkert	e1915f16d1	ruby: fold the debugging options into Debug.cc	2009-05-11 10:38:45 -07:00
Derek Hower	6e8373fad6	ruby: Renamed Ruby's EventQueue to RubyEventQueue ... --HG-- rename : src/mem/ruby/eventqueue/EventQueue.cc => src/mem/ruby/eventqueue/RubyEventQueue.cc rename : src/mem/ruby/eventqueue/EventQueue.hh => src/mem/ruby/eventqueue/RubyEventQueue.hh rename : src/mem/ruby/eventqueue/EventQueueNode.cc => src/mem/ruby/eventqueue/RubyEventQueueNode.cc rename : src/mem/ruby/eventqueue/EventQueueNode.hh => src/mem/ruby/eventqueue/RubyEventQueueNode.hh	2009-05-11 10:38:45 -07:00
Daniel Sanchez	ab5e4a22b3	ruby: Removed System name clash by renaming ruby's System to RubySystem	2009-05-11 10:38:44 -07:00
Nathan Binkert	84a18e7fdc	ruby: rename config.include to config.hh and clean up the macro stuff. ... I did the macro cleanup because I was worried that the SCons scanner would get confused. This code will hopefully go away soon anyway. --HG-- rename : src/mem/ruby/config/config.include => src/mem/ruby/config/config.hh	2009-05-11 10:38:44 -07:00
Nathan Binkert	b05da09cd6	ruby: strip out some unused defines	2009-05-11 10:38:44 -07:00
Nathan Binkert	2f30950143	ruby: Import ruby and slicc from GEMS ... We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother.	2009-05-11 10:38:43 -07:00
Steve Reinhardt	7c056e44e5	request: reorganize flags to group related flags together.	2009-04-23 06:44:32 -07:00
Steve Reinhardt	6629d9b2bc	mem: use single BadAddr responder per system. ... Previously there was one per bus, which caused some coherence problems when more than one decided to respond. Now there is just one on the main memory bus. The default bus responder on all other buses is now the downstream cache's cpu_side port. Caches no longer need to do address range filtering; instead, we just have a simple flag to prevent snoops from propagating to the I/O bus.	2008-07-16 11:10:33 -07:00
Steve Reinhardt	97b6947eb7	Minor tweaks for future Ruby compatibility.	2009-04-21 08:17:36 -07:00
Steve Reinhardt	eb3b6935d3	request: add PREFETCH flag.	2009-04-21 08:17:10 -07:00
Steve Reinhardt	3083268d60	request: rename INST_READ to INST_FETCH.	2009-04-20 18:54:02 -07:00
Steve Reinhardt	7f8ea68a30	request: split public and private flags into separate fields. ... This frees up needed space for more public flags. Also: - remove unused Request accessor methods - make Packet use public Request accessors, so it need not be a friend	2009-04-20 18:40:00 -07:00
Gabe Black	9e9a34fed1	Mem: Fill out the comment that describes the LOCKED request flag.	2009-04-19 22:00:24 -07:00
Gabe Black	bd6f2bb538	Mem: Change isLlsc to isLLSC.	2009-04-19 21:44:15 -07:00
Gabe Black	742c3f045e	Memory: Add a LOCKED flag back in for x86 style locking.	2009-04-19 04:39:25 -07:00
Gabe Black	3e5f487663	Memory: Rename LOCKED for load locked store conditional to LLSC.	2009-04-19 04:25:01 -07:00
Gabe Black	bdda224d41	X86: Add a function which gets called when an interrupt message has been delivered.	2009-04-19 03:54:11 -07:00
Gabe Black	3031af21c7	X86: Fix the flags for interrupt response messages.	2009-04-19 03:53:29 -07:00
Steve Reinhardt	758bfe4eb5	cache: set dirty bit on swaps (oops!)	2009-03-11 23:05:26 -07:00
Steve Reinhardt	a94c68228a	prefetch: don't panic on requests w/o contextID (e.g., writebacks).	2009-03-10 17:37:15 -07:00
Nathan Binkert	cc95b57390	stats: Fix all stats usages to deal with template fixes	2009-03-05 19:09:53 -08:00
Gabe Black	a1aba01a02	CPU: Get rid of translate... functions from various interface classes.	2009-02-25 10:15:34 -08:00
Lisa Hsu	5d029ff11e	sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.	2009-02-16 17:47:39 -05:00
Steve Reinhardt	89a7fb0393	Fixes to get prefetching working again. ... Apparently we broke it with the cache rewrite and never noticed. Thanks to Bao Yungang <baoyungang@gmail.com> for a significant part of these changes (and for inspiring me to work on the rest). Some other overdue cleanup on the prefetch code too.	2009-02-16 08:56:40 -08:00
Nathan Binkert	8153790d00	SCons: centralize the Dir() workaround for newer versions of scons. ... Scons bug id: 2006 M5 Bug id: 308	2009-01-13 14:17:50 -08:00
Nathan Binkert	e141cb7441	flags: Change naming of functions to be clearer	2008-12-06 14:18:18 -08:00
Steve Reinhardt	4514f565e3	syscalls: fix latent brk/obreak bug. ... Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process.	2008-11-15 09:30:10 -08:00
Steve Reinhardt	640b415688	Cache: get rid of obsolete Tag methods. ... I think readData() and writeData() were used for Erik's compression work, but that code is gone, these aren't called anymore, and they don't even really do what their names imply.	2008-11-14 14:14:35 -08:00
Nathan Binkert	5711282f87	Fix a bunch of bugs I introduced when I changed the flags stuff for packets. ... I did some of the flags and assertions wrong. Thanks to Brad Beckmann for pointing this out. I should have run the opt regressions instead of the fast. I also screwed up some of the logical functions in the Flags class.	2008-11-14 04:55:30 -08:00
Gabe Black	7a4d75bae3	CPU: Refactor read/write in the simple timing CPU.	2008-11-13 23:30:37 -08:00
Nathan Binkert	c25d966b06	Clean up the SimpleTimingPort class a little bit. ... Move the constructor into the .cc file and get rid of the typedef for SendEvent.	2008-11-10 11:51:18 -08:00
Nathan Binkert	3535d746ab	style: clean up the Packet stuff	2008-11-10 11:51:17 -08:00
Steve Reinhardt	63127cbf37	mem: Assert that requests have non-negative size. ... Would have saved me much debugging time if these had been in there previously.	2008-11-10 14:11:07 -08:00
Steve Reinhardt	42bd460d7f	Cache: Refactor packet forwarding a bit. ... Makes adding write-through operations easier.	2008-11-10 14:10:28 -08:00
Lisa Hsu	c68032ddcb	decouple eviction from insertion in the cache.	2008-11-04 11:35:58 -05:00
Lisa Hsu	4ab52cb986	Change the findBlock(addr, lat) to accessBlock, which I think has better connotations for what is really happening and how it should be used.	2008-11-04 11:35:57 -05:00
Lisa Hsu	dd99ff23c6	get rid of all instances of readTid() and getThreadNum(). Unify and eliminate ... redundancies with threadId() as their replacement.	2008-11-04 11:35:42 -05:00
Lisa Hsu	d857faf073	Add in Context IDs to the simulator. From now on, cpuId is almost never used, ... the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.	2008-11-02 21:57:07 -05:00
Lisa Hsu	8788d703f8	s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos in ... comments.	2008-10-23 16:49:17 -04:00
Lisa Hsu	546a6c0c1b	probe function no longer used anywhere.	2008-10-23 16:49:13 -04:00
Lisa Hsu	7a28ab2d18	remove the totally obsolete split cache	2008-10-23 16:11:28 -04:00
Lisa Hsu	90e40ca982	This function declaration isn't used anywhere. ... HG: user: Lisa Hsu <hsul@eecs.umich.edu> HG: branch default HG: changed src/mem/cache/cache.hh	2008-10-14 17:22:03 -04:00
Gabe Black	34ca72d16d	Get rid of some commented out code.	2008-10-12 23:50:22 -07:00
Gabe Black	e459013182	Create a message port for sending messages as apposed to reading/writing a memory range.	2008-10-12 12:08:51 -07:00
Nathan Binkert	b556dc4119	mem: Add a method for setting the time on a packet.	2008-10-09 04:58:24 -07:00
Nathan Binkert	e06321091d	eventq: convert all usage of events to use the new API. ... For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.	2008-10-09 04:58:24 -07:00
Nathan Binkert	8291d9db0a	eventq: Major API change for the Event and EventQueue structures. ... Since the early days of M5, an event needed to know which event queue it was on, and that data was required at the time of construction of the event object. In the future parallelized M5, this sort of requirement does not work well since the proper event queue will not always be known at the time of construction of an event. Now, events are created, and the EventQueue itself has the schedule function, e.g. eventq->schedule(event, when). To simplify the syntax, I created a class called EventManager which holds a pointer to an EventQueue and provides the schedule interface that is a proxy for the EventQueue. The intent is that objects that frequently schedule events can be derived from EventManager and then they have the schedule interface. SimObject and Port are examples of objects that will become EventManagers. The end result is that any SimObject can just call schedule(event, when) and it will just call that SimObject's eventq->schedule function. Of course, some objects may have more than one EventQueue, so this interface might not be perfect for those, but they should be relatively few.	2008-10-09 04:58:23 -07:00
Nathan Binkert	9838be2521	When nesting if statements, use braces to avoid ambiguous else clauses.	2008-09-26 08:18:57 -07:00
Ali Saidi	3a3e356f4e	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs	2008-09-10 14:26:15 -04:00
Nathan Binkert	9cf8ad3a17	params: Get rid of the remnants of the old style parameter configuration stuff.	2008-08-11 12:22:17 -07:00
Steve Reinhardt	62c08a75ad	Make default PhysicalMemory latency slightly more realistic. ... Also update stats to reflect change.	2008-08-03 18:13:29 -04:00
Steve Reinhardt	8e7ddce284	Use ReadResp instead of LoadLockedResp for LoadLockedReq responses.	2008-07-15 14:38:51 -04:00
Steve Reinhardt	6262e0d909	Add missing newlines to Bus DPRINTFs.	2008-07-15 14:38:51 -04:00
Ali Saidi	a4a7a09e96	Remove delVirtPort() and make getVirtPort() only return cached version.	2008-07-01 10:25:07 -04:00
Ali Saidi	c5fbbf376a	Change everything to use the cached virtPort rather than created their own each time. ... This appears to work, but I don't want to commit it until it gets tested a lot more. I haven't deleted the functionality in this patch that will come later, but one question is how to enforce encourage objects that call getVirtPort() to not cache the virtual port since if the CPU changes out from under them it will be worse than useless. Perhaps a null function like delVirtPort() is still useful in that case.	2008-07-01 10:24:19 -04:00
Steve Reinhardt	96bbccc36b	Automated merge after backout.	2008-06-28 13:20:00 -04:00
Steve Reinhardt	caaac16803	Backed out changeset 94a7bb476fca: caused memory leak.	2008-06-28 13:19:38 -04:00
Steve Reinhardt	1434b86943	Make bus address conflict error more informative	2008-06-21 01:06:27 -04:00
Steve Reinhardt	6b45238316	Generate more useful error messages for unconnected ports. ... Force all non-default ports to provide a name and an owner in the constructor.	2008-06-21 01:04:43 -04:00
Nathan Binkert	fa8f91fdc0	physmem: Add a null option to physical memory so it doesn't store data.	2008-06-15 21:39:29 -07:00
Nathan Binkert	e3c267a3db	port: Clean up default port setup and port switchover code.	2008-06-15 21:34:32 -07:00
Nathan Binkert	fe325c7f43	MemReq: Add option to reset the time on a request.	2008-06-14 19:39:01 -07:00
Steve Reinhardt	caccbd1edc	Get rid of bogus bus assertion. ... It runs out that if a MemObject turns around and does a send in its receive callback, and there are other sends already scheduled, then it could observe a state where it's not at the head of the list but the bus's sendEvent is not scheduled (because we're still in the middle of processing the prior sendEvent).	2008-06-13 01:33:49 -04:00
Steve Reinhardt	024ec4c5c3	Get rid of bogus cache assertion. ... I was asserting that the only reason you would defer targets is if a write came in while you had an outstanding read miss, but there's another case where you could get a read access after you've snooped an invalidation and buffered it because it applies to a prior outstanding miss.	2008-06-13 01:29:20 -04:00
Ali Saidi	e71a5270a2	Make sure that output files are always checked success before they're used. ... Make OutputDirectory::resolve() private and change the functions using resolve() to instead use create(). --HG-- extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453	2008-05-15 19:10:26 -04:00
Ali Saidi	8af6dc118c	SCons: add comments to SConscript documenting bug workaround ... --HG-- extra : convert_revision : e6cdffe953d56b96c76c7ff14d2dcc3de3ccfcc3	2008-04-10 15:38:10 -04:00
Ali Saidi	fe12f38353	PhysicalMemory: Add parameter for variance in memory delay. ... --HG-- extra : convert_revision : b931472e81dedb650b7accb9061cb426f1c32e66	2008-04-10 14:44:52 -04:00
Ali Saidi	ed27c4c521	SCons: Manually specifying header only directories with Dir() works around the problem ... --HG-- extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3	2008-04-08 11:08:26 -04:00
Steve Reinhardt	29be31ce31	Fix handling of writeback-induced writebacks in atomic mode. ... --HG-- extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c	2008-03-25 10:01:21 -04:00
Steve Reinhardt	623dd7ed3a	Delete the Request for a no-response Packet ... when the Packet is deleted, since the requester can't possibly do it. --HG-- extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d	2008-03-24 01:08:02 -04:00
Steve Reinhardt	93ab43288a	Don't FastAlloc MSHRs since we don't allocate them on the fly. ... --HG-- extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775	2008-03-24 01:08:02 -04:00
Steve Reinhardt	407710d387	Fix cache problem with writes to tempBlock ... getting wrong writeback address. --HG-- extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b	2008-03-22 22:17:15 -04:00
Steve Reinhardt	b051ae6acc	Fix a few Packet memory leaks. ... --HG-- extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a	2008-03-17 03:08:28 -04:00
Steve Reinhardt	131c65f429	Restructure bus timing calcs to cope with pkt being deleted by target. ... --HG-- extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330	2008-03-17 03:07:38 -04:00
Steve Reinhardt	19c367fa8f	Fix subtle cache bug where read could return stale data ... if a prior write miss arrived while an even earlier read miss was still outstanding. --HG-- extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a	2008-03-15 05:03:55 -07:00
Steve Reinhardt	e6d6adc731	Revamp cache timing access mshr check to make stats sane again. ... --HG-- extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea	2008-02-26 22:03:28 -08:00
Steve Reinhardt	bdf3323915	Cache: better comments particularly regarding writeback situation. ... --HG-- extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362	2008-02-26 20:17:26 -08:00
Gabe Black	ec1a4cbbc7	Bus: Fix the bus timing to be more realistic. ... --HG-- extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc	2008-02-26 02:20:08 -05:00
Steve Reinhardt	4597a71cef	Make L2+ caches allocate new block for writeback misses ... instead of forwarding down the line. --HG-- extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba	2008-02-16 14:58:03 -05:00
Nicolas Zea	4c7eb21119	Bus: Only update port cache when there is an item to update it with. ... --HG-- extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8	2008-02-10 19:41:03 -05:00
Steve Reinhardt	9d7a69c582	Fix #include lines for renamed cache files. ... --HG-- extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5	2008-02-10 14:45:25 -08:00
Steve Reinhardt	d56e77c180	Rename cache files for brevity and consistency with rest of tree. ... --HG-- rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62	2008-02-10 14:15:42 -08:00
Stephen Hines	6cc1573923	Make the Event::description() a const function ... --HG-- extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0	2008-02-06 16:32:40 -05:00
Geoffrey Blake	f9c54d5a4b	Temporary fix for ll/sc bug see flyspray task for more info: ... http://www.m5sim.org/flyspray/task/197 Signed-off by: Ali Saidi <saidi@eecs.umich.edu> --HG-- extra : convert_revision : cdeece7e3163de9abf2c6c7435f1bc93570fab81	2008-01-06 00:19:45 -05:00
Steve Reinhardt	6c5a3ab8b2	Add ReadRespWithInvalidate to handle multi-level coherence situation ... where we defer a response to a read from a far-away cache A, then later defer a ReadExcl from a cache B on the same bus as us. We'll assert MemInhibit in both cases, but in the latter case MemInhibit will keep the invalidation from reaching cache A. This special response tells cache A that it gets the block to satisfy its read, but must immediately invalidate it. --HG-- extra : convert_revision : f85c8b47bb30232da37ac861b50a6539dc81161b	2008-01-02 15:22:38 -08:00
Steve Reinhardt	bf9b3821bd	Mark cache-to-cache MSHRs as downstreamPending when necessary. ... Don't mark upstream MSHR as pending if downstream MSHR is already in service. --HG-- extra : convert_revision : e1c135ff00217291db58ce8a06ccde34c403d37f	2008-01-02 15:18:33 -08:00
Steve Reinhardt	538da9e24d	Don't DPRINTF in the middle of a PrintReq. ... --HG-- extra : convert_revision : 6358c014d14a19a34111c39827b05987507544bb	2008-01-02 14:42:42 -08:00
Steve Reinhardt	87e5fd1755	Bug fix: functional cache port now needs otherPort set. ... --HG-- extra : convert_revision : fb007df73a77535a5dba19341f7b0b32e8c99548	2008-01-02 14:42:24 -08:00
Steve Reinhardt	cde5a79eab	Additional comments and helper functions for PrintReq. ... --HG-- extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4	2008-01-02 13:46:22 -08:00
Steve Reinhardt	3952e41ab1	Add functional PrintReq command for memory-system debugging. ... --HG-- extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7	2008-01-02 12:20:15 -08:00
Steve Reinhardt	659aef3eb8	Fix formatting and comments in cache_impl.hh ... --HG-- extra : convert_revision : 26d71cca5420ad03e16bf174e15dabe7f902da41	2008-01-02 12:15:48 -08:00
Gabe Black	8a020d40d3	Make ports that aren't connected to anything fail more gracefully. ... --HG-- extra : convert_revision : 3803b28fb2fdfd729f01f1a44df2ae02ef83a2fc	2007-11-28 14:39:19 -08:00
Ali Saidi	8026ecbb8e	Memory: Cache the physical memory start and size so we don't need a dynamic cast on every access. ... --HG-- extra : convert_revision : d6c3e93718991e7b68248242c80d8e6ac637ac51	2007-11-19 18:23:43 -05:00
Steve Reinhardt	7d83cf35e1	Tweak check for writable block fill. ... --HG-- extra : convert_revision : c04281bcfc4cd23c7613aeccb21dc74452bcc951	2007-11-16 20:10:33 -08:00
Steve Reinhardt	f03a62008a	Fix bug on exclusive response to ReadReq with pending WriteReq. ... --HG-- extra : convert_revision : 5429cd7ca84cf6348813a4607fa16f76aa5df7e0	2007-11-16 20:10:32 -08:00
Korey Sewell	375ddf8d25	branch merge ... --HG-- extra : convert_revision : 1c56f3c6f2c50d642d2de5ddde83a55234455cec	2007-11-15 00:14:20 -05:00
Ali Saidi	7c8e4ca3a3	Checkpointing: Name SE page table entries better so that there isn't a problem if multiple workloads are being run at once. ... --HG-- extra : convert_revision : 3bac9bd7fd93fcadf764e2991c5b029f2c745c08	2007-11-14 23:42:08 -05:00
Korey Sewell	bfdd2f379b	remove unnecessary debug messages I added ... --HG-- extra : convert_revision : 5c23218fd1b899fa7fe42701f7cb2f6033f7a583	2007-11-14 06:18:58 -05:00
Korey Sewell	2692590049	Add in files from merge-bare-iron, get them compiling in FS and SE mode ... --HG-- extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251	2007-11-13 16:58:16 -05:00
Ali Saidi	c8123cef1b	Cache: Fix for OS X 10.5 compiling. ... --HG-- extra : convert_revision : ba3c33ed524367280eefc096177d767168ac2cf6	2007-11-04 18:57:36 -05:00
Ali Saidi	333ac6cc32	DRAM: Make latency parameters be Param.Latency instead of ints. ... --HG-- extra : convert_revision : 553b86cc4653da089d7aa0045a3f3bdcabf6c4d8	2007-11-01 17:30:50 -04:00
Steve Reinhardt	90f42bf3ad	Merge in bus DPRINTF changes. ... --HG-- extra : convert_revision : 3bbd7c0745b31bb2a628b604ab1627cd9c61643c	2007-10-31 00:39:16 -07:00
Ali Saidi	538fae951b	Traceflags: Add SCons function to created a traceflag instead of having one file with them all. ... --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6	2007-10-31 01:21:54 -04:00
Gabe Black	fddfa71658	TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. ... --HG-- extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8	2007-10-25 19:04:44 -07:00
Ali Saidi	0711f4f17a	SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore. ... --HG-- extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306	2007-10-25 20:13:35 -04:00
Steve Reinhardt	76c4c5fabc	mem: clean up bus/cache DPRINTFs a bit ... Not so much noise on failed sends, and more complete info when grepping a trace using an address. --HG-- extra : convert_revision : 05a8261c9452072ca08b906200c6322b33e2b9f1	2007-09-16 16:46:38 -07:00
Ali Saidi	bf7c01d43d	Bus: Fix drain code; old method could return 1 in atomic mode and never call de->process(). ... --HG-- extra : convert_revision : 35990e5eaf93f7a95a0ec72e9f92034a042def3e	2007-09-05 17:12:41 -04:00
Miles Kaufmann	54cc0053f0	params: Deprecate old-style constructors; update most SimObject constructors. ... SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed	2007-08-30 15:16:59 -04:00
Gabe Black	7227ab5f22	Merge with head ... --HG-- extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6	2007-08-26 21:45:40 -07:00
Gabe Black	9b49a78cfd	Address translation: Make the page table more flexible. ... The page table now stores actual page table entries. It is still a templated class here, but this will be corrected in the near future. --HG-- extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d	2007-08-26 20:33:57 -07:00
Ali Saidi	02353a60ee	MemorySystem: Fix the use of ?: to produce correct results. ... --HG-- extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb	2007-08-12 19:43:54 -04:00
Ali Saidi	06a9f58c68	DMA: Add IOCache and fix bus bridge to optionally only send requests one ... way so a cache can handle partial block requests for i/o devices. --HG-- extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964	2007-08-10 16:14:01 -04:00
Ali Saidi	5c38668ed6	Bus: Only call end() on an stl object once in a loop ... --HG-- extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd	2007-08-10 16:14:01 -04:00
Vincentius Robby	3d40cba8d4	Port, StaticInst: Revert unnecessary changes. ... --HG-- extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6	2007-08-08 14:54:02 -04:00
Vincentius Robby	13d10e844c	alpha: Make the TLB cache to actually work. ... Improve MRU checking for StaticInst, Bus, TLB --HG-- extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006	2007-08-08 14:18:09 -04:00
Vincentius Robby	1db9e1fb8f	port: Implement cache for port interfaces and ranges ... --HG-- extra : convert_revision : d7cbec7c277fb8f4d8846203caae36ce629602d5	2007-08-04 16:05:55 -04:00
Steve Reinhardt	62aa1d7f55	cache: get rid of obsolete params from python. ... --HG-- extra : convert_revision : cd40e0ef938ef6da1cccedf7be01c3ac5b4883fb	2007-08-03 03:51:13 -04:00
Steve Reinhardt	2f93db6f95	memory system: fix functional access bug. ... Make sure not to keep processing functional accesses after they've been responded to. Also use checkFunctional() return value instead of checking packet command field where possible, mostly just for consistency. --HG-- extra : convert_revision : 29fc76bc18731bd93a4ed05a281297827028ef75	2007-07-29 20:17:03 -07:00
Steve Reinhardt	4a7d0c4b79	bus: take out response prioritization (timing was messed up). ... Also make express snoops not occupy bus (since they're magic). --HG-- extra : convert_revision : 75aa5211a59380026d1e3f122778425e48e2edcd	2007-07-29 13:24:48 -07:00
Steve Reinhardt	8705b0799b	packet: get rid of unused intersect() function. ... --HG-- extra : convert_revision : f0a2947ccc49e0d18bc17a59371fa396d9ebd6c0	2007-07-27 12:46:55 -07:00
Steve Reinhardt	0cbcb715e0	cache/memtest: fixes for functional accesses. ... --HG-- extra : convert_revision : 688ba4d882cad2c96cf44c9e46999f74266e02ee	2007-07-27 12:46:45 -07:00
Steve Reinhardt	01c9d34a0b	cache: Get rid of unused variable. ... --HG-- extra : convert_revision : 394adc12fbd7ea10280a1b8d6bc3cb15ee019f27	2007-07-27 03:51:15 -04:00
Nathan Binkert	f0fef8f850	Merge python and x86 changes with cache branch ... --HG-- extra : convert_revision : e06a950964286604274fba81dcca362d75847233	2007-07-26 23:15:49 -07:00
Steve Reinhardt	6b73ff43ff	Have owner respond to UpgradeReq to avoid race. ... --HG-- extra : convert_revision : 30916fca6978c73d8a14558f2d7288c1eab54ad4	2007-07-26 17:04:17 -07:00
Steve Reinhardt	c3bf59dcb9	Add downward express snoops for invalidations. ... --HG-- extra : convert_revision : 4916fa9721d727d8416ad8c07df3a8171d02b2b4	2007-07-26 17:04:17 -07:00
Steve Reinhardt	f1b5c8fb57	Continue snooping after a writeback is encountered. ... --HG-- extra : convert_revision : 8411338a6c0fdd7072dd32bdffacdace62d5de90	2007-07-26 17:04:16 -07:00
Steve Reinhardt	58250b8e5f	bus: Fix default port handling. ... --HG-- extra : convert_revision : 121b6e31cddff17c51fc4f3df20e7e2bde87d04f	2007-07-26 17:04:12 -07:00
Steve Reinhardt	c1097d06f7	Can't block on memInhibit packets ... (now that bus no longer filters them for us). --HG-- extra : convert_revision : 34e7eaf5ee1e739f5557a2d417e569ed2ceb14b3	2007-07-25 07:47:37 -07:00
Steve Reinhardt	de52eebd3b	Integrate snoop loop functions into their respective call sites. ... Also some additional cleanup of Bus::recvTiming(). --HG-- extra : convert_revision : 156814119f75d04c2e954aec2d7ed6fdc186c26f	2007-07-24 22:37:41 -07:00
Steve Reinhardt	d094f9cf27	Don't delete request at target... requester still needs it. ... --HG-- extra : convert_revision : 76377ca2e4d7ea70d1d54d325a63ce710e260b93	2007-07-24 22:36:10 -07:00
Steve Reinhardt	1f9ea6e122	A couple more minor bug fixes for multilevel coherence. ... --HG-- extra : convert_revision : 370f9e34911157765be6fd49e826fa1af589b466	2007-07-23 22:28:40 -07:00
Nathan Binkert	abc76f20cb	Major changes to how SimObjects are created and initialized. Almost all ... creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed	2007-07-23 21:51:38 -07:00
Steve Reinhardt	82e2a35576	Replace lowerMSHRPending flag with more robust scheme ... based on following Packet senderState links. --HG-- extra : convert_revision : 9027d59bd7242aa0e4275bf94d8b1fb27bd59d79	2007-07-22 21:43:38 -07:00
Steve Reinhardt	1c2d5f5e64	Replace DeferredSnoop flag with LowerMSHRPending flag. ... Turns out DeferredSnoop isn't quite the right bit of info we needed... see new comment in cache_impl.hh. --HG-- extra : convert_revision : a38de8c1677a37acafb743b7074ef88b21d3b7be	2007-07-22 08:09:24 -07:00
Steve Reinhardt	1edd143b68	A few minor non-debug compilation issues. ... --HG-- extra : convert_revision : d59a5cad6187a2229dddd1a48282ebd2923d1d8d	2007-07-22 03:07:26 -04:00
Steve Reinhardt	92ce2b5974	Deal with invalidations intersecting outstanding upgrades. ... If the invalidation beats the upgrade at a lower level then the upgrade must be converted to a read exclusive "in the field". Restructure target list & deferred target list to factor out some common code. --HG-- extra : convert_revision : 7bab4482dd6c48efdb619610f0d3778c60ff777a	2007-07-21 18:18:42 -07:00
Steve Reinhardt	9117860094	Several more fixes for multi-level timing coherence. ... - Add "deferred snoop" flag to Packet so upper-level caches can distinguish whether lower-level cache request was in-service or not at the time of the original snoop. - Revamp response handling to properly handle deferred snoops on non-cache-fill requests (i.e. upgrades). - Make sure forwarded writebacks are kept in write buffer at lower-level caches so they get snooped properly. --HG-- extra : convert_revision : 17f8a3772a1ae31a16991a53f8225ddf54d31fc9	2007-07-21 13:45:17 -07:00
Steve Reinhardt	a67a0025b3	Make sure responses never get blocked. ... --HG-- extra : convert_revision : 29f359d743994a94dc403aa0621ba72cd137d1a1	2007-07-17 08:15:23 -07:00
Steve Reinhardt	a25f3ac67f	Forward cache-to-cache responses through other caches. ... --HG-- extra : convert_revision : 5b6a02255bccd98b00949703cf4ba4b221553cea	2007-07-17 06:33:28 -07:00
Steve Reinhardt	ff13827ccb	Assert that an mshr has a target in getTarget(). ... --HG-- extra : convert_revision : 08091670fc319876012ed139fcd2584c364a980c	2007-07-17 06:23:11 -07:00
Steve Reinhardt	884807a68a	Fix up a bunch of multilevel coherence issues. ... Atomic mode seems to work. Timing is closer but not there yet. --HG-- extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f	2007-07-15 20:11:06 -07:00
Steve Reinhardt	f790f34fe3	Make Bus::findPort() a little more useful. ... Move check for loops outside, since half the call sites end up working around it anyway. Return integer port ID instead of port object pointer. --HG-- extra : convert_revision : 4c31fe9930f4d1aa4919e764efb7c50d43792ea3	2007-07-15 20:09:03 -07:00
Steve Reinhardt	15a51d0cae	Add CacheRepl trace flag and move a couple DPRINTFs to it. ... --HG-- extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183	2007-07-14 13:28:52 -07:00
Steve Reinhardt	abd194df5c	Move a couple of DPRINTFs from Cache to CachePort. ... --HG-- extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be	2007-07-14 13:16:58 -07:00
Steve Reinhardt	3b4ff75939	Fix bug in copying packet with static data pointer. ... --HG-- extra : convert_revision : 2fcf99f050d73e007433c1db2475f2893c5961a0	2007-07-14 13:14:53 -07:00
Steve Reinhardt	a51e16dc89	Merge of DPRINTF fixes from head. ... --HG-- extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442	2007-07-14 12:09:37 -07:00
Steve Reinhardt	7cd6c7ee05	Fix & tweak DPRINTFs for tracediff w/new cache code. ... Note that we should *not* print pointer values in DPRINTFs as these needlessly clutter tracediff output. --HG-- extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb	2007-07-14 11:48:30 -07:00
Steve Reinhardt	4738649e32	Delete packets when we're done with them. ... --HG-- extra : convert_revision : b8894d26e1ca7a6c9b736500accdaa53bfb09558	2007-07-03 00:40:31 -04:00
Steve Reinhardt	4b68652c87	Couple more minor bug fixes for FS timing mode. ... src/cpu/simple/timing.cc: Fix another SC problem. src/mem/cache/cache_impl.hh: Forgot to call makeTimingResponse() on uncached timing responses. --HG-- extra : convert_revision : 5a5a58ca2053e4e8de2133205bfd37de15eb4209	2007-07-02 13:57:45 -07:00
Steve Reinhardt	e9c04dad60	Fix a couple LL/SC bugs that only affected timing mode. ... src/cpu/simple/timing.cc: Fix swap/stq_c command bug. src/mem/packet.cc: Fix incorrect LoadLockedReq command response field. --HG-- extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5	2007-07-02 09:26:36 -07:00
Steve Reinhardt	ffd697e149	bus.cc: ... Fix atomic timing issue. src/mem/bus.cc: Fix atomic timing issue. --HG-- extra : convert_revision : a22ff80cd75f83c785b0604c2a4fde2e2e9f71ef	2007-07-02 01:02:35 -07:00
Steve Reinhardt	5e59739416	Don't propagate snoops across bridges. Wouldn't work anyway. ... --HG-- extra : convert_revision : af29fc7d0c134f5e89dd2e814c819151350fcb38	2007-06-30 18:03:17 -07:00
Steve Reinhardt	07f091d6ed	Get rid of remaining traces of obsolete CoherenceProtocol object. ... --HG-- extra : convert_revision : c5555b00bef1b304a84886188ad2c0dcb4d7c5b9	2007-06-30 17:59:45 -07:00
Steve Reinhardt	d10a843723	Get rid of obsolete fixPacket() functions. ... Handled by Packet::checkFunctional() now. --HG-- extra : convert_revision : 63642254e2789c80a369ac269f317ec054ffe3c0	2007-06-30 17:51:29 -07:00
Steve Reinhardt	ee54ad318a	Event descriptions should not end in "event" ... (they function as adjectives not nouns) --HG-- extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb	2007-06-30 17:45:58 -07:00
Steve Reinhardt	f0c4dd7920	Factor out a little more common code. ... --HG-- extra : convert_revision : 626255a91679d534030c91bcdb4fc1bed36ceb9b	2007-06-30 13:56:25 -07:00
Steve Reinhardt	6babda7123	Fix up a few statistics problems. ... Stats pretty much line up with old code, except: - bug in old code included L1 latency in L2 miss time, making it too high - UniCoherence did cache-to-cache transfers even from non-owner caches, so occasionally the icache would get a block from the dcache not the L2 - L2 can now receive ReadExReq from L1 since L1s have coherence --HG-- extra : convert_revision : 5052c1a1767b5a662f30a88f16012165a73b791c	2007-06-30 13:34:16 -07:00
Steve Reinhardt	6ab53415ef	Get rid of Packet result field. Error responses are ... now encoded in cmd field. --HG-- extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b	2007-06-30 10:16:18 -07:00
Steve Reinhardt	9117c94f9c	Get rid of coherence protocol object. ... --HG-- extra : convert_revision : 4ff144342dca23af9a12a2169ca318a002654b42	2007-06-27 20:54:13 -07:00
Steve Reinhardt	c4903e0882	Revamp replacement-of-upgrade handling. ... --HG-- extra : convert_revision : 9bc09d8ae6d50e6dfbb4ab21514612f9aa102a2e	2007-06-26 23:30:30 -07:00
Steve Reinhardt	1b20df5607	Handle deferred snoops better. ... --HG-- extra : convert_revision : 703da6128832eb0d5cfed7724e5105f4b3fe4f90	2007-06-26 22:23:10 -07:00
Steve Reinhardt	69ff6d9163	cache_impl.hh: ... Change target overflow from assertion to warning. src/mem/cache/cache_impl.hh: Change target overflow from assertion to warning. --HG-- extra : convert_revision : ceca990ed916bbf96dedd4836c40df522803f173	2007-06-26 18:01:22 -04:00
Steve Reinhardt	7dacbcf492	Handle replacement of block with pending upgrade. ... src/mem/cache/tags/lru.cc: Add some replacement DPRINTFs --HG-- extra : convert_revision : 7993ec24d6af7e7774d04ce36f20e3f43f887fd9	2007-06-26 14:53:15 -07:00
Steve Reinhardt	f697e959a1	Couple minor bug fixes... ... src/mem/cache/cache_impl.hh: Handle grants with no packet. src/mem/cache/miss/mshr.cc: Fix MSHR snoop hit handling. --HG-- extra : convert_revision : f365283afddaa07cb9e050b2981ad6a898c14451	2007-06-25 22:23:29 -07:00
Steve Reinhardt	529f12a531	Get rid of requestCauses. Use timestamped queue to make ... sure we don't re-request bus prematurely. Use callback to avoid calling sendRetry() recursively within recvTiming. --HG-- extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140	2007-06-25 06:47:05 -07:00
Steve Reinhardt	47bce8ef78	Better handling of deferred targets. ... --HG-- extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f	2007-06-24 17:32:31 -07:00
Steve Reinhardt	57ff2604e5	Minor fix plus new assertion to catch similar bugs. ... src/cpu/memtest/memtest.cc: Need to set packet source field so that response from cache doesn't run into assertion failure when copying source to dest. src/mem/packet.hh: Copy source field when copying packets. Assert that source is valid before copying it to dest when turning packets around. --HG-- extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8	2007-06-23 13:24:33 -07:00
Steve Reinhardt	bdd5fd20fb	Fixes to hitLatency, blocking, buffer allocation. ... Single-cpu timing mode seems to work now. --HG-- extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad	2007-06-22 09:24:07 -07:00
Steve Reinhardt	eff122797b	Merge vm1.(none):/home/stever/bk/newmem-head ... into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920	2007-06-21 12:03:22 -07:00
Steve Reinhardt	83af0fdcf5	Getting closer... ... configs/example/memtest.py: Add progress interval option. src/base/traceflags.py: Add MemTest flag. src/cpu/memtest/memtest.cc: Clean up tracing. src/cpu/memtest/memtest.hh: Get rid of unused code. --HG-- extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87	2007-06-21 11:59:17 -07:00
Ali Saidi	5195500cdf	Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we don't spend so much time calling malloc() ... --HG-- extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f	2007-06-21 13:50:35 -04:00
Vincentius Robby	4a7bc06553	Minor error. ... --HG-- extra : convert_revision : 514032e21c8861f20fcbcae7204e132088cc7dbc	2007-06-20 15:04:36 -04:00
Vincentius Robby	d540dde5b4	Removed "adding instead of dividing" trick. ... Caused slowdown in performance instead of speeding up. src/cpu/base.cc: Removed "adding instead of dividing" trick. src/mem/bus.cc: Fixed spelling in comments. Removed "adding instead of dividing" trick. --HG-- extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488	2007-06-20 14:54:17 -04:00
Nathan Binkert	b47737dde7	Make sure all parameters have default values if they're ... supposed to and make sure parameters have the right type. Also make sure that any object that should be an intermediate type has the right options set. --HG-- extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93	2007-06-20 08:14:11 -07:00
Steve Reinhardt	d69a763833	Merge vm1.(none):/home/stever/bk/newmem-head ... into vm1.(none):/home/stever/bk/newmem-cache2 configs/example/memtest.py: Hand merge redundant changes. --HG-- extra : convert_revision : a2e36be254bf052024f37bcb23b5209f367d37e1	2007-06-17 17:30:24 -07:00
Steve Reinhardt	35cf19d441	More major reorg of cache. Seems to work for atomic mode now, ... timing mode still broken. configs/example/memtest.py: Revamp options. src/cpu/memtest/memtest.cc: No need for memory initialization. No need to make atomic response... memory system should do that now. src/cpu/memtest/memtest.hh: MemTest really doesn't want to snoop. src/mem/bridge.cc: checkFunctional() cleanup. src/mem/bus.cc: src/mem/bus.hh: src/mem/cache/base_cache.cc: src/mem/cache/base_cache.hh: src/mem/cache/cache.cc: src/mem/cache/cache.hh: src/mem/cache/cache_blk.hh: src/mem/cache/cache_builder.cc: src/mem/cache/cache_impl.hh: src/mem/cache/coherence/coherence_protocol.cc: src/mem/cache/coherence/coherence_protocol.hh: src/mem/cache/coherence/simple_coherence.hh: src/mem/cache/miss/SConscript: src/mem/cache/miss/mshr.cc: src/mem/cache/miss/mshr.hh: src/mem/cache/miss/mshr_queue.cc: src/mem/cache/miss/mshr_queue.hh: src/mem/cache/prefetch/base_prefetcher.cc: src/mem/cache/tags/fa_lru.cc: src/mem/cache/tags/fa_lru.hh: src/mem/cache/tags/iic.cc: src/mem/cache/tags/iic.hh: src/mem/cache/tags/lru.cc: src/mem/cache/tags/lru.hh: src/mem/cache/tags/split.cc: src/mem/cache/tags/split.hh: src/mem/cache/tags/split_lifo.cc: src/mem/cache/tags/split_lifo.hh: src/mem/cache/tags/split_lru.cc: src/mem/cache/tags/split_lru.hh: src/mem/packet.cc: src/mem/packet.hh: src/mem/physical.cc: src/mem/physical.hh: src/mem/tport.cc: More major reorg. Seems to work for atomic mode now, timing mode still broken. --HG-- extra : convert_revision : 7e70dfc4a752393b911880ff028271433855ae87	2007-06-17 17:27:53 -07:00
Nathan Binkert	fc4ab050b4	Add a startup function that will fast forward to the right clock edge ... using a divide in order to not loop forever after resuming from a checkpoint --HG-- extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a	2007-06-09 23:01:47 -07:00
Nathan Binkert	e9936a6250	More realistic parameters ... --HG-- extra : convert_revision : aaa4ea2b7c97df3d6b731e9252984b45715e9d6f	2007-06-09 22:43:08 -07:00
Ali Saidi	85986e9dff	Clean up some of vincent's code and commit it ... Makes page table cache scheme actually work src/mem/page_table.cc: src/mem/page_table.hh: fix caching scheme to actually work and improve performance --HG-- extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd	2007-06-05 01:03:35 -04:00
Steve Reinhardt	a9b7c558fd	Merge vm1.(none):/home/stever/bk/newmem-head ... into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 26921dad179699b7868768361143aaa8d790b8fc	2007-05-29 22:59:20 -07:00
Steve Reinhardt	4e65d2678d	tport.cc: ... Oops... forgot to update call site after changing function argument semantics. src/mem/tport.cc: Oops... forgot to update call site after changing function argument semantics. --HG-- extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc	2007-05-30 01:53:28 -04:00
Steve Reinhardt	94c19ad37d	Merge vm1.(none):/home/stever/bk/newmem-head ... into vm1.(none):/home/stever/bk/newmem-cache2 --HG-- extra : convert_revision : 72c6f2ce7e9e2b46e59711a2c3cfe770c243018e	2007-05-29 22:25:57 -07:00