..
cache
Fix setting of INST_FETCH flag for O3 CPU.
2009-08-01 22:50:14 -07:00
config
Fixes to get prefetching working again.
2009-02-16 08:56:40 -08:00
gems_common
slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers
2009-08-04 12:52:52 -05:00
protocol
slicc: Pure python implementation of slicc.
2009-09-22 18:12:39 -07:00
ruby
Added new MESI files
2009-09-11 16:19:31 -05:00
slicc
slicc: Pure python implementation of slicc.
2009-09-22 18:12:39 -07:00
bridge.cc
eventq: convert all usage of events to use the new API.
2008-10-09 04:58:24 -07:00
bridge.hh
includes: use base/types.hh not inttypes.h or stdint.h
2009-05-17 14:34:51 -07:00
Bridge.py
DMA: Add IOCache and fix bus bridge to optionally only send requests one
2007-08-10 16:14:01 -04:00
bus.cc
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
bus.hh
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
Bus.py
python: Move more code into m5.util allow SCons to use that code.
2009-09-22 15:24:16 -07:00
dram.cc
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
2008-09-10 14:26:15 -04:00
dram.hh
stats: Fix all stats usages to deal with template fixes
2009-03-05 19:09:53 -08:00
mem_object.cc
params: Get rid of the remnants of the old style parameter configuration stuff.
2008-08-11 12:22:17 -07:00
mem_object.hh
params: Get rid of the remnants of the old style parameter configuration stuff.
2008-08-11 12:22:17 -07:00
MemObject.py
Major changes to how SimObjects are created and initialized. Almost all
2007-07-23 21:51:38 -07:00
mport.cc
X86: Add a function which gets called when an interrupt message has been delivered.
2009-04-19 03:54:11 -07:00
mport.hh
Create a message port for sending messages as apposed to reading/writing a memory range.
2008-10-12 12:08:51 -07:00
packet.cc
Memory: Rename LOCKED for load locked store conditional to LLSC.
2009-04-19 04:25:01 -07:00
packet.hh
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
packet_access.hh
flags: Change naming of functions to be clearer
2008-12-06 14:18:18 -08:00
page_table.cc
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
page_table.hh
includes: sort includes again
2009-05-17 14:34:52 -07:00
physical.cc
Fix setting of INST_FETCH flag for O3 CPU.
2009-08-01 22:50:14 -07:00
physical.hh
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
PhysicalMemory.py
Make default PhysicalMemory latency slightly more realistic.
2008-08-03 18:13:29 -04:00
port.cc
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
port.hh
types: clean up types, especially signed vs unsigned
2009-06-04 23:21:12 -07:00
port_impl.hh
Put the ProcessInfo and StackTrace objects into the ISA namespaces.
2006-11-08 00:52:04 -05:00
request.hh
Clean up some inconsistencies with Request flags.
2009-08-01 22:50:13 -07:00
rubymem.cc
Tester update
2009-07-15 10:46:22 -05:00
rubymem.hh
ruby: Fix RubyMemory to work with the newer ruby.
2009-07-06 15:49:47 -07:00
RubyMemory.py
ruby: Fix RubyMemory to work with the newer ruby.
2009-07-06 15:49:47 -07:00
SConscript
ruby: add RUBY sticky option that must be set to add ruby to the build
2009-05-11 10:38:46 -07:00
tport.cc
Clean up the SimpleTimingPort class a little bit.
2008-11-10 11:51:18 -08:00
tport.hh
Clean up the SimpleTimingPort class a little bit.
2008-11-10 11:51:18 -08:00
translating_port.cc
fix the translating ports so it can add a page on a fault
2007-05-09 15:37:46 -04:00
translating_port.hh
fix the translating ports so it can add a page on a fault
2007-05-09 15:37:46 -04:00
vport.cc
Remove delVirtPort() and make getVirtPort() only return cached version.
2008-07-01 10:25:07 -04:00
vport.hh
implement vtophys and 32bit gdb support
2007-02-18 19:57:46 -05:00