gem5/src/mem
2009-04-23 06:44:32 -07:00
..
cache request: rename INST_READ to INST_FETCH. 2009-04-20 18:54:02 -07:00
config Fixes to get prefetching working again. 2009-02-16 08:56:40 -08:00
bridge.cc eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
bridge.hh eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
Bridge.py DMA: Add IOCache and fix bus bridge to optionally only send requests one 2007-08-10 16:14:01 -04:00
bus.cc eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
bus.hh Backed out changeset 94a7bb476fca: caused memory leak. 2008-06-28 13:19:38 -04:00
Bus.py mem: use single BadAddr responder per system. 2008-07-16 11:10:33 -07:00
dram.cc style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
dram.hh stats: Fix all stats usages to deal with template fixes 2009-03-05 19:09:53 -08:00
mem_object.cc params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
mem_object.hh params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
MemObject.py Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
mport.cc X86: Add a function which gets called when an interrupt message has been delivered. 2009-04-19 03:54:11 -07:00
mport.hh Create a message port for sending messages as apposed to reading/writing a memory range. 2008-10-12 12:08:51 -07:00
packet.cc Memory: Rename LOCKED for load locked store conditional to LLSC. 2009-04-19 04:25:01 -07:00
packet.hh request: split public and private flags into separate fields. 2009-04-20 18:40:00 -07:00
packet_access.hh flags: Change naming of functions to be clearer 2008-12-06 14:18:18 -08:00
page_table.cc sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. 2009-02-16 17:47:39 -05:00
page_table.hh sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though. 2009-02-16 17:47:39 -05:00
physical.cc Mem: Change isLlsc to isLLSC. 2009-04-19 21:44:15 -07:00
physical.hh Minor tweaks for future Ruby compatibility. 2009-04-21 08:17:36 -07:00
PhysicalMemory.py Make default PhysicalMemory latency slightly more realistic. 2008-08-03 18:13:29 -04:00
port.cc eventq: Major API change for the Event and EventQueue structures. 2008-10-09 04:58:23 -07:00
port.hh eventq: Major API change for the Event and EventQueue structures. 2008-10-09 04:58:23 -07:00
port_impl.hh Put the ProcessInfo and StackTrace objects into the ISA namespaces. 2006-11-08 00:52:04 -05:00
request.hh request: reorganize flags to group related flags together. 2009-04-23 06:44:32 -07:00
SConscript SCons: centralize the Dir() workaround for newer versions of scons. 2009-01-13 14:17:50 -08:00
tport.cc Clean up the SimpleTimingPort class a little bit. 2008-11-10 11:51:18 -08:00
tport.hh Clean up the SimpleTimingPort class a little bit. 2008-11-10 11:51:18 -08:00
translating_port.cc fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
translating_port.hh fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
vport.cc Remove delVirtPort() and make getVirtPort() only return cached version. 2008-07-01 10:25:07 -04:00
vport.hh implement vtophys and 32bit gdb support 2007-02-18 19:57:46 -05:00