gem5/src/mem
Nathan Binkert abc76f20cb Major changes to how SimObjects are created and initialized. Almost all
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23 21:51:38 -07:00
..
cache Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
config Backing in more changsets, getting closer to compile 2006-06-28 14:35:00 -04:00
bridge.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
bridge.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
Bridge.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
bus.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
bus.hh Add a startup function that will fast forward to the right clock edge 2007-06-09 23:01:47 -07:00
Bus.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
dram.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
dram.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
mem_object.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
mem_object.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
MemObject.py Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
packet.cc Reformat comments to meet line length restriction. 2007-05-28 08:04:33 -07:00
packet.hh Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we don't spend so much time calling malloc() 2007-06-21 13:50:35 -04:00
packet_access.hh Make byteswap work correctly on Twin??_t types. 2007-03-07 17:46:04 +00:00
page_table.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
page_table.hh Clean up some of vincent's code and commit it 2007-06-05 01:03:35 -04:00
physical.cc Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
physical.hh Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
PhysicalMemory.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
port.cc The MemoryObject tha owns a port should delete it if it so chooses when deletePortRefs() is called on it with that port as a parameter. 2007-04-04 13:56:38 -04:00
port.hh Change getDeviceAddressRanges to use bool for snoop arg. 2007-05-21 23:36:09 -07:00
port_impl.hh Put the ProcessInfo and StackTrace objects into the ISA namespaces. 2006-11-08 00:52:04 -05:00
request.hh Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we don't spend so much time calling malloc() 2007-06-21 13:50:35 -04:00
SConscript Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
tport.cc tport.cc: 2007-05-30 01:53:28 -04:00
tport.hh A little more cleanup & refactoring of SimpleTimingPort. 2007-05-29 22:23:41 -07:00
translating_port.cc fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
translating_port.hh fix the translating ports so it can add a page on a fault 2007-05-09 15:37:46 -04:00
vport.cc implement vtophys and 32bit gdb support 2007-02-18 19:57:46 -05:00
vport.hh implement vtophys and 32bit gdb support 2007-02-18 19:57:46 -05:00