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ruby: Added atomic support to MOESI_hammer

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This commit is contained in:
Brad Beckmann 2010-01-29 20:29:23 -08:00
parent 45230a4f6b
commit 66279fac3f
1 changed files with 3 additions and 3 deletions
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6
src/mem/protocol/MOESI_hammer-cache.sm
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@ -245,7 +245,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
// Forward Network
in_port(forwardToCache_in, RequestMsg, forwardToCache) {
if (forwardToCache_in.isReady()) {
peek(forwardToCache_in, RequestMsg) {
peek(forwardToCache_in, RequestMsg, block_on="Address") {
if (in_msg.Type == CoherenceRequestType:GETX) {
trigger(Event:Other_GETX, in_msg.Address);
} else if (in_msg.Type == CoherenceRequestType:GETS) {
@ -264,7 +264,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
// Response Network
in_port(responseToCache_in, ResponseMsg, responseToCache) {
if (responseToCache_in.isReady()) {
peek(responseToCache_in, ResponseMsg) {
peek(responseToCache_in, ResponseMsg, block_on="Address") {
if (in_msg.Type == CoherenceResponseType:ACK) {
trigger(Event:Ack, in_msg.Address);
} else if (in_msg.Type == CoherenceResponseType:ACK_SHARED) {
@ -287,7 +287,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
// Mandatory Queue
in_port(mandatoryQueue_in, CacheMsg, mandatoryQueue, desc="...") {
if (mandatoryQueue_in.isReady()) {
peek(mandatoryQueue_in, CacheMsg) {
peek(mandatoryQueue_in, CacheMsg, block_on="LineAddress") {
// Check for data access to blocks in I-cache and ifetchs to blocks in D-cache