Commit graph

552 commits

Author SHA1 Message Date
Gabe Black
c3d41a2def Merge with the main repo.
--HG--
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-28 07:24:01 -08:00
Gabe Black
da2a4acc26 Merge yet again with the main repository. 2012-01-16 04:27:10 -08:00
Ali Saidi
a17dbdf883 stats: Update stats for final tick and memory bandwidth patches 2012-01-25 17:19:50 +00:00
Andreas Hansson
2208ea049f MEM: Make the bus bridge unidirectional and fixed address range
This patch makes the bus bridge uni-directional and specialises the
bus ports to be a master port and a slave port. This greatly
simplifies the assumptions on both sides as either port only has to
deal with requests or responses. The following patches introduce the
notion of master and slave ports, and would not be possible without
this split of responsibilities.

In making the bridge unidirectional, the address range mechanism of
the bridge is also changed. For the cases where communication is
taking place both ways, an additional bridge is needed. This causes
issues with the existing mechanism, as the busses cannot determine
when to stop iterating the address updates from the two bridges. To
avoid this issue, and also greatly simplify the specification, the
bridge now has a fixed set of address ranges, specified at creation
time.
2012-01-17 12:55:09 -06:00
Andreas Hansson
f85286b3de MEM: Add port proxies instead of non-structural ports
Port proxies are used to replace non-structural ports, and thus enable
all ports in the system to correspond to a structural entity. This has
the advantage of accessing memory through the normal memory subsystem
and thus allowing any constellation of distributed memories, address
maps, etc. Most accesses are done through the "system port" that is
used for loading binaries, debugging etc. For the entities that belong
to the CPU, e.g. threads and thread contexts, they wrap the CPU data
port in a port proxy.

The following replacements are made:
FunctionalPort      > PortProxy
TranslatingPort     > SETranslatingPortProxy
VirtualPort         > FSTranslatingPortProxy

--HG--
rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc
rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh
rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc
rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-17 12:55:08 -06:00
Andreas Hansson
06c39a154c Ruby: Change the access permissions for MOESI hammer
Regression statistics update.
2012-01-17 12:55:07 -06:00
Ali Saidi
8c7936c40c stats: undo parser change from initparam change 2012-01-16 22:37:05 -05:00
Nilay Vaish
d272bdb1bf MOESI Hammer: Update regression test output 2012-01-10 17:28:49 -06:00
Nilay Vaish
a5a2b9ecbd X86 Regressions: Update stats due to fence instruction 2012-01-10 09:59:01 -06:00
Ali Saidi
8d757038b5 stats: Update stats for ARM init param changes. 2012-01-09 18:08:20 -06:00
Gabe Black
ec936364b7 Merge with the main repository again. 2012-01-07 02:15:35 -08:00
Gabe Black
36a822f08e Merge with main repository. 2012-01-07 02:10:34 -08:00
Brad Beckmann
cb6ea0492f regress: updated hammer memtest and rubytest outputs
--HG--
extra : rebase_source : b02ad38b477d87bf28f7677c985ec7fe9a7d4694
2011-12-01 11:54:30 -08:00
Ali Saidi
d1dd7a24db imported patch ext/stats_updates.patch
--HG--
extra : rebase_source : 4697ba9eb1ca8c67fe0915fb8340d7d4ae94caba
2011-12-01 00:15:23 -08:00
Chander Sudanthi
61c14da751 O3: Remove hardcoded tgts_per_mshr in O3CPU.py.
There are two lines in O3CPU.py that set the dcache and icache
tgts_per_mshr to 20, ignoring any pre-configured value of tgts_per_mshr.
This patch removes these hardcoded lines from O3CPU.py and sets the default
L1 cache mshr targets to 20.

--HG--
extra : rebase_source : 6f92d950e90496a3102967442814e97dc84db08b
2011-12-01 00:15:22 -08:00
Ali Saidi
e436d187e7 SPARC: update SE stats for FP fix
--HG--
extra : rebase_source : 954a009a9f8eef6cae6050ee99f264e0fb456f85
2011-11-30 18:57:11 -05:00
Gabe Black
0e621fd136 SPARC: Update the FS stats for the recent FP fix.
--HG--
extra : rebase_source : 643e3541507576e30d9cd4dec045e5b94532c342
2011-11-28 04:19:57 -05:00
Nilay Vaish
f171a29118 Regression: Update statistics for x86 long regression tests
This patch updates reference statistics for the regression tests. This
update was necessitated by a recent change in behavior of some instructions
in the x86 architecture.
2011-11-17 22:53:56 -06:00
Nilay Vaish
472645d62a Tests: Update stats due to addition of fence microop 2011-11-05 15:32:23 -05:00
Steve Reinhardt
c6dd122fee tests: fix spurious scons "Error 1" messages
Turns out these are due to diff reporting that files
acutally differed via a non-zero exit code.
2011-10-22 16:52:07 -07:00
Gabe Black
020e923ba7 Configs: Use connectAllPorts to connect ports for simple-timing-ruby. 2011-10-08 23:24:34 -07:00
Ali Saidi
ae62d97158 MIPS: Fix regressions tests 2011-09-17 12:34:03 -04:00
Ali Saidi
28a2236ec1 O3: Update stats for new ordering fix. 2011-09-13 12:58:09 -04:00
Gabe Black
c5fd6f4fec MIPS: Update MIPS stats for cleaned up operand checks. 2011-09-09 01:35:05 -07:00
Ali Saidi
ba265abbfd ARM: Add some MP regressions and clean up the disk images and kernels a bit 2011-08-19 15:08:09 -05:00
Ali Saidi
999cd8aef5 StoreSet: Update stats for store-set clearing 2011-08-19 15:08:08 -05:00
Ali Saidi
f125ef22b9 O3: Update stats for LSQ changes. 2011-08-19 15:08:06 -05:00
Gabe Black
cbf7982081 X86: Add an X86_FS o3 regression. 2011-08-14 18:34:17 -07:00
Gabe Black
a81d4a8fcd Stats: Small update to stats for change to x86 inst flags. 2011-08-13 23:03:21 -07:00
Gabe Black
6bbd74e2d9 SCons,tests: Tell scons about pc-o3-timing regressions. 2011-08-09 11:33:12 -07:00
Gabe Black
c3e7b57fe7 Stats: Update stats for the end of macroop O3 fix. 2011-08-09 11:31:48 -07:00
Gabe Black
8586a800b7 Stats: Update stats for the recent O3 interrupt change. 2011-08-09 03:37:45 -07:00
Nilay Vaish
821dfc1289 BuildEnv: Eliminate RUBY as build environment variable
This patch replaces RUBY with PROTOCOL in all the SConscript files as
the environment variable that decides whether or not certain components
of the simulator are compiled.
2011-08-08 10:50:13 -05:00
Gabe Black
9c806fe65a Stats: Update stats for the previous change. 2011-08-07 15:41:09 -07:00
Gabe Black
a1aaeac2f9 Stats: Update the stats after the uninitialized branch predictor variable fix. 2011-08-07 09:22:18 -07:00
Nilay Vaish
1b49c56679 Scons: Drop RUBY as compile time option.
This patch drops RUBY as a compile time option. Instead the PROTOCOL option
is used to figure out whether or not to build Ruby. If the specified protocol
is 'None', then Ruby is not compiled.
2011-08-02 00:10:08 -05:00
Gabe Black
6308ca27ff Stats: Update stats for the recent fix to fetch. 2011-07-30 23:23:01 -07:00
Korey Sewell
145deb7c88 inorder-fs: temp. regression removal
remove this regression till the fix for the hwrei instruction is put in
2011-07-15 21:26:18 -04:00
Ali Saidi
09914cdf8f ARM: Update stats for better miscreg support for MP configurations. 2011-07-15 11:53:35 -05:00
Ali Saidi
3ebfe2eb01 O3: Update stats for fetch and bp changes. 2011-07-10 12:56:09 -05:00
Gabe Black
a4bd05dc37 X86: Add a config for an FS regression on O3. 2011-07-05 17:46:46 -07:00
Gabe Black
d42e471baa Stats: Update stats for the x86 store fault fix. 2011-07-02 22:31:42 -07:00
Brad Beckmann
12dc51ff0d Regression: Updates regression outputs for Ruby memtest
This patch updates the regression outputs for Ruby memtest. This was
required because of the changes carried out by the addition of functional
access support to Ruby.
2011-06-30 19:57:26 -05:00
Brad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
c86f849d5a Ruby: Add support for functional accesses
This patch rpovides functional access support in Ruby. Currently only
the M5Port of RubyPort supports functional accesses. The support for
functional through the PioPort will be added as a separate patch.
2011-06-30 19:49:26 -05:00
Korey Sewell
6630d4c64b inorder: sparc: add 02.insttest regression 2011-06-20 22:44:24 -04:00
Korey Sewell
d1e8be9a73 inorder: sparc: add hello world regression
- add InOrderCPU compile option to SPARC
- add hello regression for SPARC
2011-06-20 22:44:22 -04:00
Korey Sewell
08c1a6f41b merge regression updates 2011-06-20 18:58:31 -04:00
Korey Sewell
b5736ba4ef alpha:o3:simple: update simout/err files
A few prior changesets have changed the gem5 output in a way that wont cause
errors but may be confusing for someone trying to debug the regressions. Ones that I caught
were:
- no more "warn: <hash address"
- typo in the ALPHA Prefetch unimplemented warning

Additionaly, the last updated stats changes rearrange the ordering of the stats output even though
they are still correct stats (gem5 is smart enough to detect this). All the regressions pass
w/the same stats even though it looks like they are being changed.
2011-06-20 18:57:14 -04:00
Korey Sewell
9124f46587 inorder: alpha-hello regression update 2011-06-20 12:21:10 -04:00
Korey Sewell
97449ef3da inorder: update eon regr w/eon info
previous commit copied over O3 stats, this one puts the inorder ones in the right place
2011-06-19 21:54:53 -04:00
Korey Sewell
d16b0dc319 inorder: add 10.linux-boot regression 2011-06-19 21:43:43 -04:00
Korey Sewell
60da569846 inorder: add eon regression 2011-06-19 21:43:43 -04:00
Korey Sewell
55dce6419d inorder: update SE regressions 2011-06-19 21:43:42 -04:00
Korey Sewell
e8b7df072b inorder: make InOrder CPU FS compilable/visible
make syscall a SE mode only functionality
copy over basic FS functions (hwrei) to make FS compile
2011-06-19 21:43:39 -04:00
Korey Sewell
1aa4869ff0 sparc: update long regressions 2011-06-12 21:35:03 -04:00
Korey Sewell
fb8c958241 sparc: update o3 regressions 2011-06-10 22:15:34 -04:00
Korey Sewell
9331b5d26a sparc: update simple cpu regressions
use stats file generated by zizzer
2011-06-10 03:45:24 -04:00
Steve Reinhardt
8a652f9871 config: tweak ruby configs to clean up hierarchy
Re-enabling implicit parenting (see previous patch) causes current
Ruby config scripts to create some strange hierarchies and generate
several warnings.  This patch makes three general changes to address
these issues.

1. The order of object creation in the ruby config files makes the L1
   caches children of the sequencer rather than the controller; these
   config ciles are rewritten to assign the L1 caches to the
   controller first.

2. The assignment of the sequencer list to system.ruby.cpu_ruby_ports
   causes the sequencers to be children of system.ruby, generating
   warnings because they are already parented to their respective
   controllers.  Changing this attribute to _cpu_ruby_ports fixes this
   because the leading underscore means this is now treated as a plain
   Python attribute rather than a child assignment. As a result, the
   configuration hierarchy changes such that, e.g.,
   system.ruby.cpu_ruby_ports0 becomes system.l1_cntrl0.sequencer.

3. In the topology classes, the routers become children of some random
   internal link node rather than direct children of the topology.
   The topology classes are rewritten to assign the routers to the
   topology object first.
2011-05-23 14:29:23 -07:00
Ali Saidi
5d5b0f49cc Stats: Update stats for minor O3 changes below. 2011-05-23 10:59:13 -05:00
Ali Saidi
44e599a1a4 ARM: Fix up stats for previous changes to condition codes 2011-05-13 17:29:27 -05:00
Ali Saidi
fea2c26402 ARM: Update ARM_FS stats for mp changes 2011-05-04 20:38:28 -05:00
Ali Saidi
307f089e7f O3/ARM: Update stats for recent changes. 2011-05-04 20:38:27 -05:00
Brad Beckmann
001c16bc6d regress: updates after changing ruby network bandwidth 2011-04-28 17:18:16 -07:00
Nathan Binkert
3d93439ee0 stats: update 20.parser o3 now that it works. realview-o3 works too. 2011-04-25 14:18:08 -07:00
Nathan Binkert
a7e27f9a82 tests: updates for stat name change 2011-04-22 10:18:51 -07:00
Nathan Binkert
8c1563096c tests: update stats for name changes 2011-04-19 18:45:23 -07:00
Ali Saidi
d50d0152d0 ARM: Fix stats for ARM_SE checkpoint restore fix.
Register reads/writes done in startup() count against the stats while they
don't count if done in initState().
2011-04-12 16:09:20 -04:00
Ali Saidi
afa897403d ARM: Update stats for default inclusion of CF adapter. 2011-04-04 11:42:32 -05:00
Ali Saidi
b20e92e1ca ARM: Update stats for previous changes. 2011-04-04 11:42:31 -05:00
Ali Saidi
1114be4b78 O3: Update stats for memory order violation checking patch. 2011-04-04 11:42:25 -05:00
Steve Reinhardt
bb67c706d6 tests: update reference outputs for ruby cache index change
MOESI_CMP_token is the only protocol that showed noticeable stats
differences.
2011-03-26 22:24:36 -07:00
Ali Saidi
63eb337b3b ARM: Update stats for the previous changes and add ARM_FS/O3 regression. 2011-03-17 19:20:22 -05:00
Ali Saidi
845f791f37 Stats: Update the statistics for rfe patch. 2011-03-17 19:20:20 -05:00
Ali Saidi
7112b44362 O3: Update regressions for mem block caching change. 2011-03-17 19:20:19 -05:00
Ali Saidi
a432d8e085 Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.
This change fixes the problem for all the cases we actively use. If you want to try
more creative I/O device attachments (E.g. sharing an L2), this won't work. You
would need another level of caching between the I/O device and the cache
(which you actually need anyway with our current code to make sure writes
propagate). This is required so that you can mark the cache in between as
top level and it won't try to send ownership of a block to the I/O device.
Asserts have been added that should catch any issues.
2011-03-17 19:20:19 -05:00
Ali Saidi
3a44307e94 X86: Update the stats for parser on x86 O3. 2011-03-17 00:43:54 -04:00
Gabe Black
27f5a8c812 X86: Update the stats for gzip on x86 O3. 2011-03-16 19:08:41 -07:00
Gabe Black
47615d06bd Regressions: Move the X86_FS regressions to "quick" instead of "long".
--HG--
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal
2011-03-12 14:41:30 -08:00
Gabe Black
fa448129b1 SCons: Turn some scons variables into command line options. 2011-03-03 23:54:31 -08:00
Gabe Black
e8b982e247 X86: Update stats for the x86 o3 hello world regression. 2011-03-01 23:18:00 -08:00
Gabe Black
b84ae9bd40 X86: Update X86_FS stats. 2011-02-27 16:24:54 -08:00
Korey Sewell
8135b81ae4 inorder: bzip2 regression update 2011-02-27 14:17:26 -05:00
Brad Beckmann
ae52ff631f regress: MOESI_hammer memtest updates 2011-02-23 16:41:59 -08:00
Korey Sewell
72fb282ab1 inorder: add 00.gzip and 60.bzip2 regression tests 2011-02-23 16:35:25 -05:00
Ali Saidi
73603c2b17 ARM: Update regression tests for preceeding changes. 2011-02-23 15:10:50 -06:00
Ali Saidi
79dac89552 ARM: Clarifies creation of Linux and baremetal ARM systems.
makeArmSystem creates both bare-metal and Linux systems more cleanly.
machine_type was never optional though listed as an optional argument; a system
such as "RealView_PBX" must now be explicitly specified.  Now that it is a
required argument, the placement of the arguments has changed slightly
requiring some changes to calls that create ARM systems.
2011-02-23 15:10:48 -06:00
Korey Sewell
66bb732c04 m5: merge inorder/release-notes/make_release changes 2011-02-18 14:35:15 -05:00
Korey Sewell
ab9c20cc78 inorder: regr-update: reduce dynamic mem. use to speedup sims
previous changesets took a closer look at memory mgmt in the inorder model and sought to avoid
dynamic memory mgmt (for access to pipeline resources) as much as possible. For the regressions
that were run, the sims are about 2x speedup from changeset 7726 which is the last change
since the recent commits in Feb. (note: these regressions now are 4-issue CPUs instead of just 1-issue)
2011-02-18 14:31:37 -05:00
Gabe Black
5ec5794456 X86: Update stats for the improved branch detection/prediction. 2011-02-13 17:46:04 -08:00
Gabe Black
44306e8114 X86: Update stats now that the dest reg isn't read unnecessarily to set flags. 2011-02-13 17:45:30 -08:00
Gabe Black
b046f3feb6 X86: Update stats for the reduced register reads. 2011-02-13 17:44:32 -08:00
Korey Sewell
2971b8401a inorder:regress: host-inst-rate improved ~58%
there are still only a few inorder benchmark but for the lengthier benchmarks (twolf and vortext)
the latest changes to how instruction scheduling (how instructions figure out what they want to
do on each pipeline stage in the inorder model) were able to improve performance by a nice
amount... The latest results for the inorder model process about 100k insts/second
(note: 58% is over the last time run on 64-bit pool machines at UM)
2011-02-12 10:14:52 -05:00
Ali Saidi
2055df8322 Stats: Update the statistics for vnc patch. 2011-02-11 18:29:36 -06:00
Brad Beckmann
4eab18fd06 regess: protocol regression tester updates 2011-02-08 18:07:54 -08:00
Brad Beckmann
ea9d4c3a97 memtest: due to contention increase, increased deadlock threshold 2011-02-08 15:53:33 -08:00
Gabe Black
0851580aad Stats: Re update stats. 2011-02-07 19:23:13 -08:00
Gabe Black
1b64bfa933 Stats: Back out broken update. 2011-02-07 19:23:11 -08:00
Gabe Black
2107258d24 X86: Add stats for the new x86 fs regressions. 2011-02-07 01:23:16 -08:00
Gabe Black
dd53743797 X86: Add scripts to support X86 FS configurations in the regressions. 2011-02-07 01:23:02 -08:00
Brad Beckmann
45f881919f regress: Regression Tester output updates 2011-02-06 22:14:23 -08:00
Gabe Black
55df9e348c X86: Add o3 regressions in SE mode.
Exclude bzip2 for now. It works, it just takes too long to run.
2011-02-05 00:16:09 -08:00
Gabe Black
0aafbe4098 X86: Update ruby stats for stupd change. 2011-02-04 03:47:23 -08:00
Korey Sewell
a48fe2729a imported patch regression_updates 2011-02-04 00:09:22 -05:00
Gabe Black
00f24ae92c Config: Keep track of uncached and cached ports separately.
This makes sure that the address ranges requested for caches and uncached ports
don't conflict with each other, and that accesses which are always uncached
(message signaled interrupts for instance) don't waste time passing through
caches.
2011-02-03 20:23:00 -08:00
Gabe Black
54f88d84c2 Stats: Update the x86 stats to reflect changing stupd to a store and update. 2011-02-02 19:56:49 -08:00
Ali Saidi
f7885b8f26 ARM/O3: Add regressions for ARM w/ O3 CPU. 2011-01-18 16:30:06 -06:00
Ali Saidi
9b67f3723e Stats: Update stats for previous set of patches. 2011-01-18 16:30:06 -06:00
Gabe Black
6fb521faba SPARC: Update stats for the call r15 as source change. 2011-01-15 15:30:34 -08:00
Nilay Vaish
bec0103bb4 Regression Tests: Update the output for MESI_CMP_directory
This patch updates the output for regression tests that are carried out on
MESI_CMP_directory protocol. The changes made to the protocol in order to
remove the bugs present result in regression failure for the 60.rubytest.
Since the earlier protocol was incorrect, so we certainly cannot relay on the
earlier reference output. Hence, the update.
2011-01-13 22:48:03 -06:00
Ali Saidi
1cfe2c8820 Stats: Fix stats for cumulative flags change. 2010-12-07 16:19:57 -08:00
Gabe Black
0e41d4e5ea Stats: Update the O3 fetch stats for SPARC. 2010-11-15 19:37:15 -08:00
Ali Saidi
371110fb0a Regressions: Update regressions for SIMD opclass changes 2010-11-15 14:04:05 -06:00
Ali Saidi
c370866331 ARM: Update regressions for CLCD and KMI additions 2010-11-15 14:04:03 -06:00
Ali Saidi
0b7967d606 Update EIO regressions for last set of patches 2010-11-10 00:48:03 -06:00
Ali Saidi
06c5283930 ARM: Update SE stats for TLB stats additions 2010-11-08 13:59:35 -06:00
Ali Saidi
fe300c6de2 ARM: Add full-system regressions 2010-11-08 13:58:25 -06:00
Ali Saidi
b4b6a2338a ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads. 2010-11-08 13:58:24 -06:00
Gabe Black
b53231e7fe Ref output: Update refs for PCState change. 2010-10-31 00:07:48 -07:00
Steve Reinhardt
13a15c55a4 stats: update stats for previous cset
Coherence protocol change basically got rid
of UpgradeReqs in L2 caches, other minor
related cache stat changes.
2010-09-21 23:07:35 -07:00
Steve Reinhardt
0bd9cea340 diff-out: clean up options
Make diff-out sort stats changes by percentage
by default, with '-a' to use current alpha sort
(instead of requiring '-p' to sort by percentage).
Other minor options cleanup too.
2010-09-21 23:07:34 -07:00
Steve Reinhardt
db2f226834 tests: print if output files match
Add '-s' flag to diff command generating outdiff
file so we have positive confirmation when
outputs match.
2010-09-21 23:07:34 -07:00
Steve Reinhardt
9e45ada171 stats: update stats for preceding coherence changes
Because the handling of the E state for multilevel caches
has changed, stats are affected for any non-ruby config
with caches, even uniprocessor simple CPU.
2010-09-09 14:40:19 -04:00
Ali Saidi
e6d3fe8a0c ARM: Update regression tests for ldr/str microcode changes. 2010-08-25 19:10:42 -05:00
Ali Saidi
03584ad439 ALPHA: The previous O3 patch causes a slight stats change with fullsys. 2010-08-23 11:18:42 -05:00
Brad Beckmann
3d93afe348 regress: Regression tester updates
Regression tester updates required by the following patches:

brad/moved_python_protocol_files: config: moved python protocol config files
brad/ruby_options_movement: config: reorganized how ruby specifies command-line options
brad/config_token_bcast: ruby: added token broadcast config params to cmd options
brad/topology_name: config: Added the topology description to m5 config.ini
brad/ruby_system_names: config: Improve ruby simobject names
brad/consolidated_protocol_stats: slicc: Consolidated the protocol stats printing
brad/ruby_request_type_ostream_fix: ruby: Added ruby_request_type ostream def to libruby.hh
brad/memtest_dma_extension: memtest: Memtester support for DMA
brad/token_dma_lockdown_fix: MOESI_CMP_token: Fixed dma persistent lockdown bugs
brad/profile_generic_mach_type: ruby: Reincarnated the responding machine profiling
brad/network_msg_consolidated_stats: ruby: Added consolidated network msg stats
brad/bcast_msg_profiling: ruby: Added bcast msg profiling to hammer and token
brad/l2cache_profiling_fix: ruby: Fixed L2 cache miss profiling
brad/llsc_ruby_m5_fix: ruby: fix ruby llsc support to sync sc outcomes
brad/ruby_latency_fixes: ruby: Reduced ruby latencies
brad/hammer_l2_cache_latency: ruby: Updated MOESI_hammer L2 latency behavior
brad/deterministic_resurrection: ruby: Resurrected Ruby's deterministic tests
brad/token_dma_fixes: ruby: MOESI_CMP_token dma fixes
brad/ruby_cmd_options: config: added cmd options to control ruby debug
brad/token_owner_fixes: ruby: fixed token bugs associated with owner token counts
brad/ruby_remove_try_except: ruby: Improved try except blocks in ruby creation
brad/ruby_port_callback_fix: ruby: Fixed RubyPort sendTiming callbacks
brad/interrupt_drain_fix: devices: Fixed periodic interrupts to work with draining
brad/llsc_trace_profile: ruby: Added SC fail indication to trace profiling
brad/no_migrate_atomic: ruby: Disable migratory sharing for token and hammer
brad/ruby_start_time_fix: ruby: Reset ruby stats in RubySystem unserialize
brad/numa_bit_select_fix: ruby: fixed DirectoryMemory's numa_high_bit configuration
brad/hammer_probe_filter: ruby: added probe filter support to hammer
brad/miss_latency_detail_profile: MOESI_hammer: break down miss latency stalled cycles
brad/recycle_latency_fix: ruby: Recycle latency fix for hammer
brad/stall_and_wait: ruby: Stall and wait input messages instead of recycling
brad/rubytest_request_flag_fix: ruby: Fixed minor bug in ruby test for setting the request type
brad/hammer_merge_gets: ruby: Added merge GETS optimization to hammer
brad/regress_updates: regress: Regression tester updates
2010-08-20 17:44:26 -07:00
Steve Reinhardt
5577048bcf test: Update stats for python object iteration.
Small changes in tests with data races due to new object creation
order.
2010-08-17 05:14:03 -07:00
Steve Reinhardt
c2cce96a0b sim: fail on implicit creation of orphans via ports
Orphan SimObjects (not in the config hierarchy) could get
created implicitly if they have a port connection to a SimObject
that is in the hierarchy.  This means that there are objects on
the C++ SimObject list (created via the C++ SimObject
constructor call) that are unknown to Python and will get
skipped if we walk the hierarchy from the Python side (as we are
about to do).  This patch detects this situation and prints an
error message.

Also fix the rubytester config script which happened to rely on
this behavior.
2010-08-17 05:06:22 -07:00
Steve Reinhardt
1fbe466345 sim: make Python Root object a singleton
Enforce that the Python Root SimObject is instantiated only
once.  The C++ Root object already panics if more than one is
created.  This change avoids the need to track what the root
object is, since it's available from Root.getInstance() (if it
exists).  It's now redundant to have the user pass the root
object to functions like instantiate(), checkpoint(), and
restoreCheckpoint(), so that arg is gone.  Users who use
configs/common/Simulate.py should not notice.
2010-08-17 05:06:22 -07:00
Steve Reinhardt
0f8b5afd7a tests: update reference config.ini files for previous cset
Rename 'responder_set' to 'use_default_range'.
2010-08-17 05:06:22 -07:00
Ali Saidi
1b73376b0b ARM: Add regression tests 2010-07-27 01:03:44 -04:00
Korey Sewell
f2eba81f50 inorder: update regressions from RAS fix 2010-06-25 17:42:55 -04:00
Korey Sewell
0135cdab8d inorder: update regressions 2010-06-24 15:34:21 -04:00
Korey Sewell
e17c41c176 inorder: update regressions 2010-06-23 18:21:44 -04:00
Steve Reinhardt
625854785b stats: update stats for SC protocol change
Some subset of UpgradeReq messages shifted to the
new SCUpgradeReq type.  Other than that there
are no significant differences.
2010-06-16 15:25:57 -07:00
Nathan Binkert
86a93fe7b9 stats: only consider a formula initialized if there is a formula 2010-06-15 01:18:36 -07:00
m5test
744b59d6de tests: Update O3 ref outputs to reflect Lisa's dist format change. 2010-06-06 18:39:10 -04:00
Steve Reinhardt
30deac9050 stats: fix stats diff script
Previously the return value ignored missing/added stats,
making the regressions not tell you when you needed to
update the reference stats because of these changes.
Also stop filtering distributions when reporting these;
not sure why we did that in the first place.
Also get rid of obsolete hacks for the "fetch-loss" stats
that have been gone for a long time.
2010-06-06 01:22:14 -04:00
Ali Saidi
f703e9c975 ARM: Updated regressions for changes in SE mode stack 2010-06-02 12:58:17 -05:00
Gabe Black
caa95639ec ARM: Update the stats for the new syscall behavior. 2010-06-02 12:58:05 -05:00
Gabe Black
d8294575e1 ARM: Update the stats now that VFP load/store multiple is implemented. 2010-06-02 12:58:04 -05:00
Ali Saidi
a990335b32 BPRED: Update one missing regression 2010-05-19 00:36:05 -04:00
Ali Saidi
e63c73b45d BPRED: Update regressions for tournament predictor fix. 2010-05-13 23:45:59 -04:00
Gabe Black
81e68287bb X86: Update the stats for the new aux vectors in the ruby regression.
I forgot to turn on ruby when updating the stats before.
2010-05-06 13:41:08 -07:00
Gabe Black
8b0c83008e X86: Update stats for the updated auxilliary vectors. 2010-05-03 00:45:01 -07:00
Korey Sewell
c90ee27283 inorder: update regressions for fwd-ing patch 2010-04-11 00:21:49 -04:00
Korey Sewell
941399728f inorder: update twolf/vortex regressions 2010-03-27 02:21:22 -04:00
Korey Sewell
70308bc835 inorder: update hello world for alpha and mips 2010-03-23 00:26:53 -04:00
Korey Sewell
6364fbac39 inorder: update twolf regression 2010-03-23 00:14:52 -04:00
Korey Sewell
ef0fb9bee4 inorder: update vortex regression 2010-03-22 23:39:23 -04:00
Brad Beckmann
7aba8d7db0 ruby: Regression updates for new ruby config locations 2010-03-21 21:22:22 -07:00