Regression: Updates regression outputs for Ruby memtest

This patch updates the regression outputs for Ruby memtest. This was
required because of the changes carried out by the addition of functional
access support to Ruby.
This commit is contained in:
Brad Beckmann 2011-06-30 19:57:26 -05:00
parent 0b7b3766af
commit 12dc51ff0d
25 changed files with 3555 additions and 3466 deletions

View file

@ -25,14 +25,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[0]
test=system.ruby.cpu_ruby_ports0.port[0]
test=system.l1_cntrl0.sequencer.port[0]
[system.cpu1]
type=MemTest
@ -41,14 +42,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[1]
test=system.ruby.cpu_ruby_ports1.port[0]
test=system.l1_cntrl1.sequencer.port[0]
[system.cpu2]
type=MemTest
@ -57,14 +59,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[2]
test=system.ruby.cpu_ruby_ports2.port[0]
test=system.l1_cntrl2.sequencer.port[0]
[system.cpu3]
type=MemTest
@ -73,14 +76,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[3]
test=system.ruby.cpu_ruby_ports3.port[0]
test=system.l1_cntrl3.sequencer.port[0]
[system.cpu4]
type=MemTest
@ -89,14 +93,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[4]
test=system.ruby.cpu_ruby_ports4.port[0]
test=system.l1_cntrl4.sequencer.port[0]
[system.cpu5]
type=MemTest
@ -105,14 +110,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[5]
test=system.ruby.cpu_ruby_ports5.port[0]
test=system.l1_cntrl5.sequencer.port[0]
[system.cpu6]
type=MemTest
@ -121,14 +127,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[6]
test=system.ruby.cpu_ruby_ports6.port[0]
test=system.l1_cntrl6.sequencer.port[0]
[system.cpu7]
type=MemTest
@ -137,14 +144,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[7]
test=system.ruby.cpu_ruby_ports7.port[0]
test=system.l1_cntrl7.sequencer.port[0]
[system.dir_cntrl0]
type=Directory_Controller
@ -156,6 +164,7 @@ directory_latency=6
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
to_mem_ctrl_latency=1
transitions_per_cycle=32
version=0
@ -201,7 +210,7 @@ port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
@ -211,7 +220,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports0
ruby_system=system.ruby
sequencer=system.l1_cntrl0.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=0
@ -232,9 +242,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
buffer_size=0
@ -244,7 +269,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports1
ruby_system=system.ruby
sequencer=system.l1_cntrl1.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=1
@ -265,9 +291,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory
buffer_size=0
@ -277,7 +318,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports2
ruby_system=system.ruby
sequencer=system.l1_cntrl2.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=2
@ -298,9 +340,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory
buffer_size=0
@ -310,7 +367,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports3
ruby_system=system.ruby
sequencer=system.l1_cntrl3.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=3
@ -331,9 +389,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory
buffer_size=0
@ -343,7 +416,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports4
ruby_system=system.ruby
sequencer=system.l1_cntrl4.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=4
@ -364,9 +438,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory
buffer_size=0
@ -376,7 +465,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports5
ruby_system=system.ruby
sequencer=system.l1_cntrl5.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=5
@ -397,9 +487,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory
buffer_size=0
@ -409,7 +514,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports6
ruby_system=system.ruby
sequencer=system.l1_cntrl6.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=6
@ -430,9 +536,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory
buffer_size=0
@ -442,7 +563,8 @@ l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports7
ruby_system=system.ruby
sequencer=system.l1_cntrl7.sequencer
to_l2_latency=1
transitions_per_cycle=32
version=7
@ -463,6 +585,21 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
@ -473,6 +610,7 @@ l2_request_latency=2
l2_response_latency=2
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
to_l1_latency=1
transitions_per_cycle=32
version=0
@ -493,133 +631,18 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.cpu_ruby_ports0.physMemPort system.ruby.cpu_ruby_ports1.physMemPort system.ruby.cpu_ruby_ports2.physMemPort system.ruby.cpu_ruby_ports3.physMemPort system.ruby.cpu_ruby_ports4.physMemPort system.ruby.cpu_ruby_ports5.physMemPort system.ruby.cpu_ruby_ports6.physMemPort system.ruby.cpu_ruby_ports7.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort system.l1_cntrl1.sequencer.physMemPort system.l1_cntrl2.sequencer.physMemPort system.l1_cntrl3.sequencer.physMemPort system.l1_cntrl4.sequencer.physMemPort system.l1_cntrl5.sequencer.physMemPort system.l1_cntrl6.sequencer.physMemPort system.l1_cntrl7.sequencer.physMemPort
[system.ruby]
type=RubySystem
children=cpu_ruby_ports0 cpu_ruby_ports1 cpu_ruby_ports2 cpu_ruby_ports3 cpu_ruby_ports4 cpu_ruby_ports5 cpu_ruby_ports6 cpu_ruby_ports7 network profiler tracer
children=network profiler tracer
block_size_bytes=64
clock=1
mem_size=134217728
network=system.ruby.network
no_mem_vec=false
profiler=system.ruby.profiler
random_seed=1234
randomization=false
stats_filename=ruby.stats
tracer=system.ruby.tracer
[system.ruby.cpu_ruby_ports0]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.ruby.cpu_ruby_ports1]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.ruby.cpu_ruby_ports2]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.ruby.cpu_ruby_ports3]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.ruby.cpu_ruby_ports4]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.ruby.cpu_ruby_ports5]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.ruby.cpu_ruby_ports6]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.ruby.cpu_ruby_ports7]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.ruby.network]
type=SimpleNetwork
@ -629,6 +652,7 @@ buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
@ -869,8 +893,10 @@ type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=8
ruby_system=system.ruby
[system.ruby.tracer]
type=RubyTracer
ruby_system=system.ruby
warmup_length=100000

View file

@ -34,29 +34,29 @@ periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
Real time: Apr/28/2011 14:47:04
Real time: Jun/30/2011 15:33:35
Profiler Stats
--------------
Elapsed_time_in_seconds: 848
Elapsed_time_in_minutes: 14.1333
Elapsed_time_in_hours: 0.235556
Elapsed_time_in_days: 0.00981481
Elapsed_time_in_seconds: 376
Elapsed_time_in_minutes: 6.26667
Elapsed_time_in_hours: 0.104444
Elapsed_time_in_days: 0.00435185
Virtual_time_in_seconds: 848.11
Virtual_time_in_minutes: 14.1352
Virtual_time_in_hours: 0.235586
Virtual_time_in_days: 0.00981609
Virtual_time_in_seconds: 376.16
Virtual_time_in_minutes: 6.26933
Virtual_time_in_hours: 0.104489
Virtual_time_in_days: 0.0043537
Ruby_current_time: 45377925
Ruby_current_time: 22570074
Ruby_start_time: 0
Ruby_cycles: 45377925
Ruby_cycles: 22570074
mbytes_resident: 38.5039
mbytes_total: 349.91
resident_ratio: 0.110062
mbytes_resident: 38.7617
mbytes_total: 350.738
resident_ratio: 0.110515
ruby_cycles_executed: [ 45377926 45377926 45377926 45377926 45377926 45377926 45377926 45377926 ]
ruby_cycles_executed: [ 22570075 22570075 22570075 22570075 22570075 22570075 22570075 22570075 ]
Busy Controller Counts:
L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
@ -67,14 +67,14 @@ Directory-0:0
Busy Bank Count:0
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1222667 average: 15.9992 | standard deviation: 0.0900745 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1222547 ]
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 607977 average: 15.9984 | standard deviation: 0.127729 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 607857 ]
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
miss_latency: [binsize: 4096 max: 768575 count: 1222539 average: 4750.02 | standard deviation: 10432.8 | 713663 337972 120474 30722 6705 1917 973 835 718 652 646 598 527 471 427 398 367 388 291 303 268 218 238 185 198 172 185 164 138 131 126 116 109 80 74 72 81 84 63 55 51 50 42 45 46 34 23 35 27 24 30 20 27 19 20 23 15 15 12 11 16 13 8 11 12 9 7 11 3 7 6 2 2 5 1 5 2 3 1 3 2 1 1 0 2 1 1 2 1 1 2 1 1 1 2 2 1 0 1 1 0 1 0 1 0 1 0 2 0 0 1 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD: [binsize: 4096 max: 768575 count: 794782 average: 4754.13 | standard deviation: 10728.4 | 464420 219484 78177 19903 4316 1256 627 548 460 425 408 377 355 307 269 251 216 264 189 188 170 138 155 135 133 117 125 117 90 90 90 80 72 59 47 51 53 57 37 41 35 37 28 31 32 17 16 22 16 15 23 16 18 13 13 16 4 11 10 6 9 8 5 7 7 6 5 6 2 4 5 0 2 3 0 4 1 1 1 2 2 1 0 0 2 0 1 1 0 1 2 1 1 1 1 2 0 0 0 1 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST: [binsize: 4096 max: 649274 count: 427757 average: 4742.39 | standard deviation: 8996.35 | 249243 118488 42297 10819 2389 661 346 287 258 227 238 221 172 164 158 147 151 124 102 115 98 80 83 50 65 55 60 47 48 41 36 36 37 21 27 21 28 27 26 14 16 13 14 14 14 17 7 13 11 9 7 4 9 6 7 7 11 4 2 5 7 5 3 4 5 3 2 5 1 3 1 2 0 2 1 1 1 2 0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_NULL: [binsize: 4096 max: 768575 count: 1222539 average: 4750.02 | standard deviation: 10432.8 | 713663 337972 120474 30722 6705 1917 973 835 718 652 646 598 527 471 427 398 367 388 291 303 268 218 238 185 198 172 185 164 138 131 126 116 109 80 74 72 81 84 63 55 51 50 42 45 46 34 23 35 27 24 30 20 27 19 20 23 15 15 12 11 16 13 8 11 12 9 7 11 3 7 6 2 2 5 1 5 2 3 1 3 2 1 1 0 2 1 1 2 1 1 2 1 1 1 2 2 1 0 1 1 0 1 0 1 0 1 0 2 0 0 1 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency: [binsize: 4096 max: 496494 count: 607849 average: 4750.99 | standard deviation: 9556.54 | 355105 169191 59645 14289 3099 901 533 416 339 360 301 307 272 222 195 214 182 182 146 147 133 117 100 98 103 77 85 58 69 51 57 65 48 59 50 44 45 36 43 28 31 29 24 23 23 19 19 22 17 13 14 15 12 8 6 15 10 7 8 9 7 9 6 5 9 4 6 4 3 3 3 1 1 6 2 4 5 2 1 3 0 1 3 0 1 1 2 1 0 1 0 0 1 3 0 2 0 2 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD: [binsize: 4096 max: 490436 count: 394834 average: 4762.86 | standard deviation: 9711.77 | 230455 110075 38816 9210 2008 585 365 253 208 244 197 195 174 145 133 148 107 123 104 108 87 77 61 55 64 55 53 44 49 35 37 39 30 46 33 26 25 24 35 18 23 18 20 11 13 15 9 15 11 8 8 9 6 4 4 7 7 5 5 7 5 5 4 4 7 4 4 4 2 3 2 0 1 2 1 2 4 2 0 3 0 1 3 0 0 1 2 1 0 1 0 0 1 2 0 1 0 1 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST: [binsize: 4096 max: 496494 count: 213015 average: 4728.98 | standard deviation: 9261.9 | 124650 59116 20829 5079 1091 316 168 163 131 116 104 112 98 77 62 66 75 59 42 39 46 40 39 43 39 22 32 14 20 16 20 26 18 13 17 18 20 12 8 10 8 11 4 12 10 4 10 7 6 5 6 6 6 4 2 8 3 2 3 2 2 4 2 1 2 0 2 0 1 0 1 1 0 4 1 2 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_NULL: [binsize: 4096 max: 496494 count: 607849 average: 4750.99 | standard deviation: 9556.54 | 355105 169191 59645 14289 3099 901 533 416 339 360 301 307 272 222 195 214 182 182 146 147 133 117 100 98 103 77 85 58 69 51 57 65 48 59 50 44 45 36 43 28 31 29 24 23 23 19 19 22 17 13 14 15 12 8 6 15 10 7 8 9 7 9 6 5 9 4 6 4 3 3 3 1 1 6 2 4 5 2 1 3 0 1 3 0 1 1 2 1 0 1 0 0 1 3 0 2 0 2 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@ -85,8 +85,8 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_dir_Times: 0
miss_latency_LD_NULL: [binsize: 4096 max: 768575 count: 794782 average: 4754.13 | standard deviation: 10728.4 | 464420 219484 78177 19903 4316 1256 627 548 460 425 408 377 355 307 269 251 216 264 189 188 170 138 155 135 133 117 125 117 90 90 90 80 72 59 47 51 53 57 37 41 35 37 28 31 32 17 16 22 16 15 23 16 18 13 13 16 4 11 10 6 9 8 5 7 7 6 5 6 2 4 5 0 2 3 0 4 1 1 1 2 2 1 0 0 2 0 1 1 0 1 2 1 1 1 1 2 0 0 0 1 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST_NULL: [binsize: 4096 max: 649274 count: 427757 average: 4742.39 | standard deviation: 8996.35 | 249243 118488 42297 10819 2389 661 346 287 258 227 238 221 172 164 158 147 151 124 102 115 98 80 83 50 65 55 60 47 48 41 36 36 37 21 27 21 28 27 26 14 16 13 14 14 14 17 7 13 11 9 7 4 9 6 7 7 11 4 2 5 7 5 3 4 5 3 2 5 1 3 1 2 0 2 1 1 1 2 0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD_NULL: [binsize: 4096 max: 490436 count: 394834 average: 4762.86 | standard deviation: 9711.77 | 230455 110075 38816 9210 2008 585 365 253 208 244 197 195 174 145 133 148 107 123 104 108 87 77 61 55 64 55 53 44 49 35 37 39 30 46 33 26 25 24 35 18 23 18 20 11 13 15 9 15 11 8 8 9 6 4 4 7 7 5 5 7 5 5 4 4 7 4 4 4 2 3 2 0 1 2 1 2 4 2 0 3 0 1 3 0 0 1 2 1 0 1 0 0 1 2 0 1 0 1 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST_NULL: [binsize: 4096 max: 496494 count: 213015 average: 4728.98 | standard deviation: 9261.9 | 124650 59116 20829 5079 1091 316 168 163 131 116 104 112 98 77 62 66 75 59 42 39 46 40 39 43 39 22 32 14 20 16 20 26 18 13 17 18 20 12 8 10 8 11 4 12 10 4 10 7 6 5 6 6 6 4 2 8 3 2 3 2 2 4 2 1 2 0 2 0 1 0 1 1 0 4 1 2 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
All Non-Zero Cycle SW Prefetch Requests
------------------------------------
@ -100,12 +100,12 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
Message Delayed Cycles
----------------------
Total_delay_cycles: [binsize: 512 max: 15025 count: 9238010 average: 71.7727 | standard deviation: 386.094 | 8944416 144186 51666 26499 17015 13103 10605 8526 6334 4666 3408 2419 1694 1171 808 540 319 217 162 95 65 43 23 12 5 4 2 3 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 18 count: 6203874 average: 0.207737 | standard deviation: 0.794821 | 5536169 445618 61689 41060 45531 40102 29025 1511 1098 867 904 179 33 25 40 14 5 1 3 ]
virtual_network_0_delay_cycles: [binsize: 512 max: 15025 count: 3034136 average: 218.101 | standard deviation: 649.602 | 2740542 144186 51666 26499 17015 13103 10605 8526 6334 4666 3408 2419 1694 1171 808 540 319 217 162 95 65 43 23 12 5 4 2 3 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
Total_delay_cycles: [binsize: 512 max: 14615 count: 4591131 average: 71.483 | standard deviation: 382.552 | 4445303 71429 25716 13355 8643 6710 5118 4179 3087 2370 1645 1185 778 570 386 232 170 104 53 31 26 11 12 5 2 5 3 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 20 count: 3083256 average: 0.208137 | standard deviation: 0.796792 | 2751370 221517 30254 20578 22740 19744 14634 794 583 437 475 70 19 8 21 6 2 0 2 1 1 ]
virtual_network_0_delay_cycles: [binsize: 512 max: 14615 count: 1507875 average: 217.224 | standard deviation: 643.398 | 1362047 71429 25716 13355 8643 6710 5118 4179 3087 2370 1645 1185 778 570 386 232 170 104 53 31 26 11 12 5 2 5 3 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 18 count: 976703 average: 0.229716 | standard deviation: 0.829621 | 844977 98912 13960 3129 3768 5876 3597 804 198 490 714 169 27 20 40 13 5 1 3 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 15 count: 5227171 average: 0.20363 | standard deviation: 0.788081 | 4691192 346706 47729 37931 41763 34226 25428 707 900 377 190 10 6 5 0 1 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 20 count: 485327 average: 0.227906 | standard deviation: 0.828193 | 420344 48971 6701 1578 1851 2838 1762 436 88 273 369 61 15 7 21 6 2 0 2 1 1 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 13 count: 2597929 average: 0.204444 | standard deviation: 0.790733 | 2331026 172546 23553 19000 20889 16906 12872 358 495 164 106 9 4 1 ]
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@ -116,9 +116,9 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 18 count: 6203874 average: 0.207737 |
Resource Usage
--------------
page_size: 4096
user_time: 847
user_time: 376
system_time: 0
page_reclaims: 11150
page_reclaims: 11076
page_faults: 0
swaps: 0
block_inputs: 0
@ -127,208 +127,208 @@ block_outputs: 0
Network Stats
-------------
total_msg_count_Control: 7315725 58525800
total_msg_count_Request_Control: 2925285 23402280
total_msg_count_Response_Data: 8596080 618917760
total_msg_count_Response_Control: 12675051 101400408
total_msg_count_Writeback_Data: 2330742 167813424
total_msg_count_Writeback_Control: 1158525 9268200
total_msgs: 35001408 total_bytes: 979327872
total_msg_count_Control: 3637485 29099880
total_msg_count_Request_Control: 1453647 11629176
total_msg_count_Response_Data: 4275051 307803672
total_msg_count_Response_Control: 6300513 50404104
total_msg_count_Writeback_Data: 1156890 83296080
total_msg_count_Writeback_Control: 573396 4587168
total_msgs: 17396982 total_bytes: 486820080
switch_0_inlinks: 2
switch_0_outlinks: 2
links_utilized_percent_switch_0: 1.5756
links_utilized_percent_switch_0_link_0: 1.73525 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 1.41594 bw: 16000 base_latency: 1
links_utilized_percent_switch_0: 1.58871
links_utilized_percent_switch_0_link_0: 1.75155 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 1.42586 bw: 16000 base_latency: 1
outgoing_messages_switch_0_link_0_Request_Control: 122565 980520 [ 122565 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 153074 11021328 [ 0 153074 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Control: 74610 596880 [ 0 74610 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Control: 153075 1224600 [ 153075 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Data: 371 26712 [ 0 371 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Control: 203411 1627288 [ 0 51292 152119 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Data: 97449 7016328 [ 26425 71024 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Control: 48185 385480 [ 48185 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Request_Control: 61316 490528 [ 61316 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 76858 5533776 [ 0 76858 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Control: 37620 300960 [ 0 37620 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Control: 76861 614888 [ 76861 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Data: 168 12096 [ 0 168 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Control: 102017 816136 [ 0 25650 76367 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Data: 48759 3510648 [ 13206 35553 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Writeback_Control: 24414 195312 [ 24414 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_1_inlinks: 2
switch_1_outlinks: 2
links_utilized_percent_switch_1: 1.57409
links_utilized_percent_switch_1_link_0: 1.73543 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 1.41276 bw: 16000 base_latency: 1
links_utilized_percent_switch_1: 1.57407
links_utilized_percent_switch_1_link_0: 1.73518 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 1.41296 bw: 16000 base_latency: 1
outgoing_messages_switch_1_link_0_Request_Control: 122162 977296 [ 122162 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Data: 153108 11023776 [ 0 153108 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Control: 74866 598928 [ 0 74866 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Control: 153110 1224880 [ 153110 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 341 24552 [ 0 341 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Control: 203398 1627184 [ 0 51231 152167 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Writeback_Data: 97128 6993216 [ 26433 70695 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Writeback_Control: 48433 387464 [ 48433 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Request_Control: 60819 486552 [ 60819 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Data: 76153 5483016 [ 0 76153 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Control: 37066 296528 [ 0 37066 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Control: 76155 609240 [ 76155 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 171 12312 [ 0 171 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Control: 101164 809312 [ 0 25505 75659 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Writeback_Data: 48336 3480192 [ 13138 35198 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Writeback_Control: 23928 191424 [ 23928 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_2_inlinks: 2
switch_2_outlinks: 2
links_utilized_percent_switch_2: 1.57796
links_utilized_percent_switch_2_link_0: 1.74037 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 1.41555 bw: 16000 base_latency: 1
links_utilized_percent_switch_2: 1.55874
links_utilized_percent_switch_2_link_0: 1.71975 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 1.39772 bw: 16000 base_latency: 1
outgoing_messages_switch_2_link_0_Request_Control: 122379 979032 [ 122379 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 153553 11055816 [ 0 153553 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Control: 75135 601080 [ 0 75135 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Control: 153554 1228432 [ 153554 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Data: 347 24984 [ 0 347 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Control: 203735 1629880 [ 0 51141 152594 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Writeback_Data: 97269 7003368 [ 26268 71001 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Writeback_Control: 48863 390904 [ 48863 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Request_Control: 60425 483400 [ 60425 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 75466 5433552 [ 0 75466 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Control: 36678 293424 [ 0 36678 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Control: 75468 603744 [ 75468 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Data: 185 13320 [ 0 185 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Control: 100414 803312 [ 0 25436 74978 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Writeback_Data: 47731 3436632 [ 12870 34861 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Writeback_Control: 23809 190472 [ 23809 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_3_inlinks: 2
switch_3_outlinks: 2
links_utilized_percent_switch_3: 1.58227
links_utilized_percent_switch_3_link_0: 1.74303 bw: 16000 base_latency: 1
links_utilized_percent_switch_3_link_1: 1.42152 bw: 16000 base_latency: 1
links_utilized_percent_switch_3: 1.57195
links_utilized_percent_switch_3_link_0: 1.73065 bw: 16000 base_latency: 1
links_utilized_percent_switch_3_link_1: 1.41325 bw: 16000 base_latency: 1
outgoing_messages_switch_3_link_0_Request_Control: 122771 982168 [ 122771 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Data: 153761 11070792 [ 0 153761 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Control: 75280 602240 [ 0 75280 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Control: 153763 1230104 [ 153763 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Data: 363 26136 [ 0 363 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Control: 204115 1632920 [ 0 51380 152735 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Writeback_Data: 97818 7042896 [ 26672 71146 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Writeback_Control: 48606 388848 [ 48606 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Request_Control: 60661 485288 [ 60661 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Data: 75942 5467824 [ 0 75942 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Control: 37080 296640 [ 0 37080 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Control: 75945 607560 [ 75945 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Data: 156 11232 [ 0 156 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Control: 100823 806584 [ 0 25377 75446 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Writeback_Data: 48440 3487680 [ 13266 35174 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Writeback_Control: 23813 190504 [ 23813 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_4_inlinks: 2
switch_4_outlinks: 2
links_utilized_percent_switch_4: 1.58336
links_utilized_percent_switch_4_link_0: 1.74253 bw: 16000 base_latency: 1
links_utilized_percent_switch_4_link_1: 1.42419 bw: 16000 base_latency: 1
links_utilized_percent_switch_4: 1.56082
links_utilized_percent_switch_4_link_0: 1.72098 bw: 16000 base_latency: 1
links_utilized_percent_switch_4_link_1: 1.40066 bw: 16000 base_latency: 1
outgoing_messages_switch_4_link_0_Request_Control: 122674 981392 [ 122674 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Response_Data: 153697 11066184 [ 0 153697 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Response_Control: 75505 604040 [ 0 75505 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Control: 153699 1229592 [ 153699 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Response_Data: 365 26280 [ 0 365 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Response_Control: 203701 1629608 [ 0 51005 152696 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Writeback_Data: 98117 7064424 [ 26702 71415 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Writeback_Control: 48801 390408 [ 48801 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Request_Control: 60424 483392 [ 60424 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Response_Data: 75520 5437440 [ 0 75520 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Response_Control: 36748 293984 [ 0 36748 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Control: 75521 604168 [ 75521 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Response_Data: 150 10800 [ 0 150 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Response_Control: 100453 803624 [ 0 25381 75072 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Writeback_Data: 47907 3449304 [ 12973 34934 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Writeback_Control: 23775 190200 [ 23775 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_5_inlinks: 2
switch_5_outlinks: 2
links_utilized_percent_switch_5: 1.56125
links_utilized_percent_switch_5_link_0: 1.72103 bw: 16000 base_latency: 1
links_utilized_percent_switch_5_link_1: 1.40146 bw: 16000 base_latency: 1
links_utilized_percent_switch_5: 1.56684
links_utilized_percent_switch_5_link_0: 1.73026 bw: 16000 base_latency: 1
links_utilized_percent_switch_5_link_1: 1.40342 bw: 16000 base_latency: 1
outgoing_messages_switch_5_link_0_Request_Control: 121446 971568 [ 121446 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Response_Data: 151839 10932408 [ 0 151839 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Response_Control: 73940 591520 [ 0 73940 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Control: 151840 1214720 [ 151840 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Response_Data: 335 24120 [ 0 335 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Response_Control: 201813 1614504 [ 0 50961 150852 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Writeback_Data: 96382 6939504 [ 26135 70247 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Writeback_Control: 47805 382440 [ 47805 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Request_Control: 60530 484240 [ 60530 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Response_Data: 75951 5468472 [ 0 75951 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Response_Control: 36954 295632 [ 0 36954 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Control: 75953 607624 [ 75953 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Response_Data: 151 10872 [ 0 151 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Response_Control: 101090 808720 [ 0 25567 75523 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Writeback_Data: 47912 3449664 [ 13060 34852 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Writeback_Control: 23894 191152 [ 23894 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_6_inlinks: 2
switch_6_outlinks: 2
links_utilized_percent_switch_6: 1.56395
links_utilized_percent_switch_6_link_0: 1.72329 bw: 16000 base_latency: 1
links_utilized_percent_switch_6_link_1: 1.40461 bw: 16000 base_latency: 1
links_utilized_percent_switch_6: 1.56294
links_utilized_percent_switch_6_link_0: 1.72248 bw: 16000 base_latency: 1
links_utilized_percent_switch_6_link_1: 1.40339 bw: 16000 base_latency: 1
outgoing_messages_switch_6_link_0_Request_Control: 121670 973360 [ 121670 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Response_Data: 152039 10946808 [ 0 152039 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Response_Control: 73968 591744 [ 0 73968 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Control: 152042 1216336 [ 152042 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Response_Data: 325 23400 [ 0 325 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Response_Control: 201961 1615688 [ 0 50936 151025 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Writeback_Data: 96672 6960384 [ 26179 70493 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Writeback_Control: 47787 382296 [ 47787 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Request_Control: 60256 482048 [ 60256 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Response_Data: 75607 5443704 [ 0 75607 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Response_Control: 36813 294504 [ 0 36813 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Control: 75611 604888 [ 75611 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Response_Data: 190 13680 [ 0 190 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Response_Control: 100454 803632 [ 0 25339 75115 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Writeback_Data: 48015 3457080 [ 13233 34782 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Writeback_Control: 23582 188656 [ 23582 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_7_inlinks: 2
switch_7_outlinks: 2
links_utilized_percent_switch_7: 1.557
links_utilized_percent_switch_7_link_0: 1.71657 bw: 16000 base_latency: 1
links_utilized_percent_switch_7_link_1: 1.39743 bw: 16000 base_latency: 1
links_utilized_percent_switch_7: 1.57836
links_utilized_percent_switch_7_link_0: 1.73917 bw: 16000 base_latency: 1
links_utilized_percent_switch_7_link_1: 1.41756 bw: 16000 base_latency: 1
outgoing_messages_switch_7_link_0_Request_Control: 121036 968288 [ 121036 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Response_Data: 151462 10905264 [ 0 151462 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Response_Control: 73694 589552 [ 0 73694 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Control: 151464 1211712 [ 151464 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Response_Data: 361 25992 [ 0 361 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Response_Control: 201128 1609024 [ 0 50708 150420 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Writeback_Data: 96079 6917688 [ 25999 70080 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Writeback_Control: 47695 381560 [ 47695 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Request_Control: 60896 487168 [ 60896 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Response_Data: 76341 5496552 [ 0 76341 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Response_Control: 37097 296776 [ 0 37097 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Control: 76345 610760 [ 76345 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Response_Data: 180 12960 [ 0 180 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Response_Control: 101238 809904 [ 0 25420 75818 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Writeback_Data: 48530 3494160 [ 13181 35349 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Writeback_Control: 23917 191336 [ 23917 0 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_8_inlinks: 2
switch_8_outlinks: 2
links_utilized_percent_switch_8: 22.4563
links_utilized_percent_switch_8_link_0: 24.6729 bw: 16000 base_latency: 1
links_utilized_percent_switch_8_link_1: 20.2396 bw: 16000 base_latency: 1
links_utilized_percent_switch_8: 22.444
links_utilized_percent_switch_8_link_0: 24.6504 bw: 16000 base_latency: 1
links_utilized_percent_switch_8_link_1: 20.2375 bw: 16000 base_latency: 1
outgoing_messages_switch_8_link_0_Control: 1222547 9780376 [ 1222547 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Response_Data: 1216881 87615432 [ 0 1216881 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Response_Control: 2839266 22714128 [ 0 1624658 1214608 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Writeback_Data: 776914 55937808 [ 210813 566101 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Writeback_Control: 386175 3089400 [ 386175 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Control: 1216028 9728224 [ 1216028 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Request_Control: 971879 7775032 [ 971879 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Response_Data: 1643889 118360008 [ 0 1643889 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Response_Control: 1385741 11085928 [ 0 1385741 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Control: 607859 4862872 [ 607859 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Response_Data: 605033 43562376 [ 0 605033 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Response_Control: 1412277 11298216 [ 0 808299 603978 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Writeback_Data: 385630 27765360 [ 104927 280703 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Writeback_Control: 191132 1529056 [ 191132 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Control: 604636 4837088 [ 604636 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Request_Control: 482993 3863944 [ 482993 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Response_Data: 817747 58877784 [ 0 817747 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Response_Control: 687892 5503136 [ 0 687892 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_9_inlinks: 2
switch_9_outlinks: 2
links_utilized_percent_switch_9: 9.92244
links_utilized_percent_switch_9_link_0: 6.44607 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_1: 13.3988 bw: 16000 base_latency: 1
links_utilized_percent_switch_9: 9.92231
links_utilized_percent_switch_9_link_0: 6.4501 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_1: 13.3945 bw: 16000 base_latency: 1
outgoing_messages_switch_9_link_0_Control: 1216028 9728224 [ 1216028 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Response_Data: 427267 30763224 [ 0 427267 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Response_Control: 788753 6310024 [ 0 788753 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Response_Data: 1216021 87553512 [ 0 1216021 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Response_Control: 1216014 9728112 [ 0 1216014 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Control: 604636 4837088 [ 604636 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Response_Data: 212790 15320880 [ 0 212790 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Response_Control: 391838 3134704 [ 0 391838 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Response_Data: 604631 43533432 [ 0 604631 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Response_Control: 604626 4837008 [ 0 604626 0 0 0 0 0 0 0 0 ] base_latency: 1
switch_10_inlinks: 10
switch_10_outlinks: 10
links_utilized_percent_switch_10: 4.49765
links_utilized_percent_switch_10_link_0: 1.73525 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_1: 1.73543 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_2: 1.74037 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_3: 1.74303 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_4: 1.74253 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_5: 1.72103 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_6: 1.72329 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_7: 1.71657 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_8: 24.6729 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_9: 6.44607 bw: 16000 base_latency: 1
links_utilized_percent_switch_10: 4.49505
links_utilized_percent_switch_10_link_0: 1.75156 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_1: 1.73518 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_2: 1.71975 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_3: 1.73065 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_4: 1.72098 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_5: 1.73026 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_6: 1.72248 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_7: 1.73917 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_8: 24.6504 bw: 16000 base_latency: 1
links_utilized_percent_switch_10_link_9: 6.4501 bw: 16000 base_latency: 1
outgoing_messages_switch_10_link_0_Request_Control: 122565 980520 [ 122565 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_0_Response_Data: 153074 11021328 [ 0 153074 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_0_Response_Control: 74610 596880 [ 0 74610 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_1_Request_Control: 122162 977296 [ 122162 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_1_Response_Data: 153108 11023776 [ 0 153108 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_1_Response_Control: 74866 598928 [ 0 74866 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_2_Request_Control: 122379 979032 [ 122379 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_2_Response_Data: 153553 11055816 [ 0 153553 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_2_Response_Control: 75135 601080 [ 0 75135 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_3_Request_Control: 122771 982168 [ 122771 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_3_Response_Data: 153761 11070792 [ 0 153761 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_3_Response_Control: 75280 602240 [ 0 75280 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_4_Request_Control: 122674 981392 [ 122674 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_4_Response_Data: 153697 11066184 [ 0 153697 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_4_Response_Control: 75505 604040 [ 0 75505 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_5_Request_Control: 121446 971568 [ 121446 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_5_Response_Data: 151839 10932408 [ 0 151839 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_5_Response_Control: 73940 591520 [ 0 73940 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_6_Request_Control: 121670 973360 [ 121670 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_6_Response_Data: 152039 10946808 [ 0 152039 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_6_Response_Control: 73968 591744 [ 0 73968 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_7_Request_Control: 121036 968288 [ 121036 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_7_Response_Data: 151462 10905264 [ 0 151462 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_7_Response_Control: 73694 589552 [ 0 73694 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Control: 1222547 9780376 [ 1222547 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Response_Data: 1216881 87615432 [ 0 1216881 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Response_Control: 2839266 22714128 [ 0 1624658 1214608 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Writeback_Data: 776914 55937808 [ 210813 566101 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Writeback_Control: 386175 3089400 [ 386175 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_9_Control: 1216028 9728224 [ 1216028 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_9_Response_Data: 427267 30763224 [ 0 427267 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_9_Response_Control: 788753 6310024 [ 0 788753 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_0_Request_Control: 61316 490528 [ 61316 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_0_Response_Data: 76858 5533776 [ 0 76858 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_0_Response_Control: 37620 300960 [ 0 37620 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_1_Request_Control: 60819 486552 [ 60819 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_1_Response_Data: 76153 5483016 [ 0 76153 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_1_Response_Control: 37066 296528 [ 0 37066 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_2_Request_Control: 60425 483400 [ 60425 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_2_Response_Data: 75466 5433552 [ 0 75466 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_2_Response_Control: 36678 293424 [ 0 36678 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_3_Request_Control: 60661 485288 [ 60661 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_3_Response_Data: 75942 5467824 [ 0 75942 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_3_Response_Control: 37080 296640 [ 0 37080 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_4_Request_Control: 60424 483392 [ 60424 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_4_Response_Data: 75520 5437440 [ 0 75520 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_4_Response_Control: 36748 293984 [ 0 36748 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_5_Request_Control: 60530 484240 [ 60530 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_5_Response_Data: 75951 5468472 [ 0 75951 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_5_Response_Control: 36954 295632 [ 0 36954 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_6_Request_Control: 60256 482048 [ 60256 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_6_Response_Data: 75607 5443704 [ 0 75607 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_6_Response_Control: 36813 294504 [ 0 36813 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_7_Request_Control: 60896 487168 [ 60896 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_7_Response_Data: 76341 5496552 [ 0 76341 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_7_Response_Control: 37097 296776 [ 0 37097 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Control: 607859 4862872 [ 607859 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Response_Data: 605033 43562376 [ 0 605033 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Response_Control: 1412277 11298216 [ 0 808299 603978 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Writeback_Data: 385630 27765360 [ 104927 280703 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_8_Writeback_Control: 191132 1529056 [ 191132 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_9_Control: 604636 4837088 [ 604636 0 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_9_Response_Data: 212790 15320880 [ 0 212790 0 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_10_link_9_Response_Control: 391838 3134704 [ 0 391838 0 0 0 0 0 0 0 0 ] base_latency: 1
Cache Stats: system.l1_cntrl0.L1IcacheMemory
system.l1_cntrl0.L1IcacheMemory_total_misses: 0
@ -348,115 +348,115 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory
--- L1Cache ---
- Event Counts -
Load [99818 98786 98925 98382 99464 99659 100001 100501 ] 795536
Load [49165 49521 48931 49371 50057 49427 49260 49197 ] 394929
Ifetch [0 0 0 0 0 0 0 0 ] 0
Store [53898 53065 53885 53130 53615 53597 53580 53821 ] 428591
Inv [122420 121208 121429 120788 122316 121926 122142 122526 ] 974755
L1_Replacement [62240347 62362195 62335359 62344624 62310711 62313217 62322211 62256568 ] 498485232
Fwd_GETX [143 141 157 135 127 131 127 127 ] 1088
Fwd_GETS [111 97 84 113 122 105 110 118 ] 860
Store [26362 26470 26682 27010 26838 26732 26219 26752 ] 213065
Inv [60315 60419 60121 60769 61203 60703 60297 60551 ] 484378
L1_Replacement [31022878 30992943 30998511 31011137 30978735 31015750 31000258 30989218 ] 248009430
Fwd_GETX [68 71 80 74 58 61 71 64 ] 547
Fwd_GETS [41 40 55 53 55 55 57 46 ] 402
Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
Data [1 0 1 0 0 0 2 1 ] 5
Data_Exclusive [98684 97674 97615 97238 98413 98612 98941 98817 ] 785994
DataS_fromL1 [116 119 121 97 91 104 101 111 ] 860
Data_all_Acks [54896 54046 54302 54127 54570 54392 54509 54832 ] 435674
Ack [1 0 1 0 0 0 2 1 ] 5
Ack_all [1 0 1 0 0 0 2 1 ] 5
WB_Ack [75503 73940 73966 73694 74610 74866 75131 75278 ] 596988
Data [0 0 0 0 0 0 0 1 ] 1
Data_Exclusive [48660 48995 48393 48761 49518 48885 48703 48651 ] 390566
DataS_fromL1 [51 61 42 54 47 45 58 44 ] 402
Data_all_Acks [26809 26895 27172 27526 27293 27223 26705 27246 ] 216869
Ack [0 0 0 0 0 0 0 1 ] 1
Ack_all [0 0 0 0 0 0 0 1 ] 1
WB_Ack [36748 36954 36813 37097 37620 37066 36678 37078 ] 296054
- Transitions -
NP Load [99782 98751 98737 98340 99438 99632 99977 99934 ] 794591
NP Load [49142 49463 48921 49325 50043 49409 49240 49171 ] 394714
NP Ifetch [0 0 0 0 0 0 0 0 ] 0
NP Store [53883 53041 53275 53067 53606 53431 53535 53792 ] 427630
NP Inv [631 574 635 618 617 576 608 637 ] 4896
NP Store [26354 26461 26670 26992 26798 26723 26210 26739 ] 212947
NP Inv [259 267 325 321 292 299 308 289 ] 2360
NP L1_Replacement [0 0 0 0 0 0 0 0 ] 0
I Load [20 30 16 39 22 26 24 20 ] 197
I Load [18 22 9 14 13 16 9 22 ] 123
I Ifetch [0 0 0 0 0 0 0 0 ] 0
I Store [14 18 14 18 9 21 18 17 ] 129
I Store [7 7 11 14 7 7 9 13 ] 75
I Inv [0 0 0 0 0 0 0 0 ] 0
I L1_Replacement [77547 77289 77429 77116 77846 77632 77793 77831 ] 620483
I L1_Replacement [38492 38706 38461 38904 38940 38776 38480 38549 ] 309308
S Load [0 0 0 0 0 0 0 0 ] 0
S Ifetch [0 0 0 0 0 0 0 0 ] 0
S Store [0 0 0 0 0 0 0 0 ] 0
S Inv [597 629 584 634 548 572 560 617 ] 4741
S L1_Replacement [611 559 613 593 584 561 584 613 ] 4718
S Inv [279 262 261 309 300 295 294 297 ] 2297
S L1_Replacement [252 260 311 311 277 286 287 278 ] 2262
E Load [1 1 0 0 0 0 0 1 ] 3
E Load [2 1 1 0 0 0 1 0 ] 5
E Ifetch [0 0 0 0 0 0 0 0 ] 0
E Store [0 0 1 0 0 0 0 0 ] 1
E Inv [49777 49758 49717 49456 50124 50081 49972 50125 ] 399010
E L1_Replacement [48825 47824 47801 47715 48203 48447 48886 48620 ] 386321
E Fwd_GETX [61 80 84 55 72 59 61 59 ] 531
E Fwd_GETS [21 12 12 12 14 25 21 13 ] 130
E Store [0 0 1 0 0 1 0 0 ] 2
E Inv [24841 25038 24750 24790 25058 24911 24833 24791 ] 199012
E L1_Replacement [23788 23910 23588 23928 24424 23937 23820 23820 ] 191215
E Fwd_GETX [26 36 46 35 28 30 46 34 ] 281
E Fwd_GETS [5 11 8 8 7 6 4 6 ] 55
E Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
M Load [1 0 0 0 0 0 0 0 ] 1
M Load [0 1 0 0 1 0 0 0 ] 2
M Ifetch [0 0 0 0 0 0 0 0 ] 0
M Store [1 0 0 0 0 0 0 0 ] 1
M Inv [27113 26844 27040 26992 27106 26935 27208 27030 ] 216268
M L1_Replacement [26678 26116 26165 25979 26407 26419 26245 26658 ] 210667
M Fwd_GETX [35 29 35 38 30 34 36 39 ] 276
M Fwd_GETS [70 70 50 76 72 63 64 80 ] 545
M Store [0 1 0 0 0 1 0 0 ] 2
M Inv [13349 13381 13403 13783 13564 13551 13314 13451 ] 107796
M L1_Replacement [12960 13044 13227 13170 13196 13129 12859 13259 ] 104844
M Fwd_GETX [24 20 20 15 10 14 13 12 ] 128
M Fwd_GETS [28 22 31 35 33 36 31 29 ] 245
M Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
IS Load [0 0 0 0 0 0 0 0 ] 0
IS Ifetch [0 0 0 0 0 0 0 0 ] 0
IS Store [0 0 0 0 0 0 0 0 ] 0
IS Inv [0 0 0 0 0 0 0 0 ] 0
IS L1_Replacement [40054758 40218775 40199371 40249634 40166799 40276697 40328496 40380416 ] 321874946
IS Data_Exclusive [98684 97674 97615 97238 98413 98612 98941 98817 ] 785994
IS DataS_fromL1 [116 119 121 97 91 104 101 111 ] 860
IS Data_all_Acks [1001 987 1014 1042 955 941 958 1026 ] 7924
IS Inv [1 0 1 0 0 0 0 0 ] 2
IS L1_Replacement [20157546 20081658 19830753 19901991 20110300 19902485 20045187 19917415 ] 159947335
IS Data_Exclusive [48660 48995 48393 48761 49518 48885 48703 48651 ] 390566
IS DataS_fromL1 [51 61 42 54 47 45 58 44 ] 402
IS Data_all_Acks [447 428 491 523 490 494 488 496 ] 3857
IM Load [0 0 0 0 0 0 0 0 ] 0
IM Ifetch [0 0 0 0 0 0 0 0 ] 0
IM Store [0 0 0 0 0 0 0 0 ] 0
IM Inv [0 0 0 0 0 0 0 0 ] 0
IM L1_Replacement [22031927 21991632 21983980 21943587 21990872 21883461 21840202 21722420 ] 175388081
IM Data [1 0 1 0 0 0 2 1 ] 5
IM Data_all_Acks [53895 53059 53288 53085 53615 53451 53551 53806 ] 427750
IM L1_Replacement [10789830 10835365 11092162 11032833 10791598 11037137 10879625 10995881 ] 87454431
IM Data [0 0 0 0 0 0 0 1 ] 1
IM Data_all_Acks [26361 26467 26680 27003 26803 26729 26217 26750 ] 213010
IM Ack [0 0 0 0 0 0 0 0 ] 0
SM Load [0 0 0 0 0 0 0 0 ] 0
SM Ifetch [0 0 0 0 0 0 0 0 ] 0
SM Store [0 0 0 0 0 0 0 0 ] 0
SM Inv [0 0 0 0 0 0 0 0 ] 0
SM L1_Replacement [1 0 0 0 0 0 5 10 ] 16
SM Ack [1 0 1 0 0 0 2 1 ] 5
SM Ack_all [1 0 1 0 0 0 2 1 ] 5
SM L1_Replacement [0 0 0 0 0 0 0 16 ] 16
SM Ack [0 0 0 0 0 0 0 1 ] 1
SM Ack_all [0 0 0 0 0 0 0 1 ] 1
IS_I Load [0 0 0 0 0 0 0 0 ] 0
IS_I Ifetch [0 0 0 0 0 0 0 0 ] 0
IS_I Store [0 0 0 0 0 0 0 0 ] 0
IS_I Inv [0 0 0 0 0 0 0 0 ] 0
IS_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
IS_I L1_Replacement [10 0 9 0 0 0 0 0 ] 19
IS_I Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
IS_I DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
IS_I Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
IS_I Data_all_Acks [1 0 1 0 0 0 0 0 ] 2
M_I Load [0 0 0 0 1 0 0 0 ] 1
M_I Load [0 0 0 0 0 0 0 0 ] 0
M_I Ifetch [0 0 0 0 0 0 0 0 ] 0
M_I Store [0 0 0 0 0 0 0 0 ] 0
M_I Inv [44302 43403 43453 43088 43918 43760 43793 44116 ] 349833
M_I Inv [21585 21471 21379 21566 21989 21647 21547 21723 ] 172907
M_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
M_I Fwd_GETX [47 32 38 42 25 38 30 29 ] 281
M_I Fwd_GETS [20 15 22 25 36 17 25 25 ] 185
M_I Fwd_GETX [18 15 14 24 20 17 12 18 ] 138
M_I Fwd_GETS [8 7 16 10 15 13 22 11 ] 102
M_I Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
M_I WB_Ack [31134 30490 30453 30539 30631 31051 31283 31108 ] 246689
M_I WB_Ack [15137 15461 15406 15498 15596 15389 15098 15327 ] 122912
E_I Load [0 0 0 0 0 0 0 0 ] 0
E_I Ifetch [0 0 0 0 0 0 0 0 ] 0
E_I Store [0 0 0 0 0 0 0 0 ] 0
E_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK Load [14 4 172 3 3 1 0 546 ] 743
SINK_WB_ACK Load [3 34 0 32 0 2 10 4 ] 85
SINK_WB_ACK Ifetch [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK Store [0 6 595 45 0 145 27 12 ] 830
SINK_WB_ACK Inv [0 0 0 0 3 2 1 1 ] 7
SINK_WB_ACK Store [1 1 0 4 33 0 0 0 ] 39
SINK_WB_ACK Inv [1 0 2 0 0 0 1 0 ] 4
SINK_WB_ACK L1_Replacement [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK WB_Ack [44369 43450 43513 43155 43979 43815 43848 44170 ] 350299
SINK_WB_ACK WB_Ack [21611 21493 21407 21599 22024 21677 21580 21751 ] 173142
Cache Stats: system.l1_cntrl1.L1IcacheMemory
system.l1_cntrl1.L1IcacheMemory_total_misses: 0
@ -581,69 +581,69 @@ Cache Stats: system.l2_cntrl0.L2cacheMemory
--- L2Cache ---
- Event Counts -
L1_GET_INSTR [0 ] 0
L1_GETS [847308 ] 847308
L1_GETX [502711 ] 502711
L1_GETS [422091 ] 422091
L1_GETX [248760 ] 248760
L1_UPGRADE [0 ] 0
L1_PUTX [248019 ] 248019
L1_PUTX_old [421373 ] 421373
L1_PUTX [123601 ] 123601
L1_PUTX_old [208407 ] 208407
Fwd_L1_GETX [0 ] 0
Fwd_L1_GETS [0 ] 0
Fwd_L1_GET_INSTR [0 ] 0
L2_Replacement [87757 ] 87757
L2_Replacement_clean [66875398 ] 66875398
Mem_Data [1216021 ] 1216021
Mem_Ack [1216014 ] 1216014
WB_Data [340589 ] 340589
WB_Data_clean [226372 ] 226372
Ack [4819 ] 4819
Ack_all [403825 ] 403825
Unblock [860 ] 860
L2_Replacement [43801 ] 43801
L2_Replacement_clean [33104485 ] 33104485
Mem_Data [604631 ] 604631
Mem_Ack [604626 ] 604626
WB_Data [169468 ] 169468
WB_Data_clean [111637 ] 111637
Ack [2333 ] 2333
Ack_all [201340 ] 201340
Unblock [402 ] 402
Unblock_Cancel [0 ] 0
Exclusive_Unblock [1213748 ] 1213748
Exclusive_Unblock [603576 ] 603576
MEM_Inv [0 ] 0
- Transitions -
NP L1_GET_INSTR [0 ] 0
NP L1_GETS [789654 ] 789654
NP L1_GETX [426374 ] 426374
NP L1_GETS [392321 ] 392321
NP L1_GETX [212315 ] 212315
NP L1_PUTX [0 ] 0
NP L1_PUTX_old [238851 ] 238851
NP L1_PUTX_old [117846 ] 117846
SS L1_GET_INSTR [0 ] 0
SS L1_GETS [1 ] 1
SS L1_GETX [5 ] 5
SS L1_GETS [0 ] 0
SS L1_GETX [1 ] 1
SS L1_UPGRADE [0 ] 0
SS L1_PUTX [29 ] 29
SS L1_PUTX [18 ] 18
SS L1_PUTX_old [0 ] 0
SS L2_Replacement [719 ] 719
SS L2_Replacement_clean [4096 ] 4096
SS L2_Replacement [344 ] 344
SS L2_Replacement_clean [1984 ] 1984
SS MEM_Inv [0 ] 0
M L1_GET_INSTR [0 ] 0
M L1_GETS [304 ] 304
M L1_GETX [291 ] 291
M L1_GETS [174 ] 174
M L1_GETX [151 ] 151
M L1_PUTX [0 ] 0
M L1_PUTX_old [10 ] 10
M L2_Replacement [86604 ] 86604
M L2_Replacement_clean [159490 ] 159490
M L1_PUTX_old [4 ] 4
M L2_Replacement [43275 ] 43275
M L2_Replacement_clean [79310 ] 79310
M MEM_Inv [0 ] 0
MT L1_GET_INSTR [0 ] 0
MT L1_GETS [860 ] 860
MT L1_GETX [1088 ] 1088
MT L1_PUTX [246689 ] 246689
MT L1_PUTX_old [180 ] 180
MT L2_Replacement [133 ] 133
MT L2_Replacement_clean [964978 ] 964978
MT L1_GETS [402 ] 402
MT L1_GETX [547 ] 547
MT L1_PUTX [122912 ] 122912
MT L1_PUTX_old [89 ] 89
MT L2_Replacement [72 ] 72
MT L2_Replacement_clean [479643 ] 479643
MT MEM_Inv [0 ] 0
M_I L1_GET_INSTR [0 ] 0
M_I L1_GETS [5544 ] 5544
M_I L1_GETX [2963 ] 2963
M_I L1_GETS [3243 ] 3243
M_I L1_GETX [1799 ] 1799
M_I L1_UPGRADE [0 ] 0
M_I L1_PUTX [0 ] 0
M_I L1_PUTX_old [110275 ] 110275
M_I Mem_Ack [1216014 ] 1216014
M_I L1_PUTX_old [54713 ] 54713
M_I Mem_Ack [604626 ] 604626
M_I MEM_Inv [0 ] 0
MT_I L1_GET_INSTR [0 ] 0
@ -652,68 +652,68 @@ MT_I L1_GETX [0 ] 0
MT_I L1_UPGRADE [0 ] 0
MT_I L1_PUTX [0 ] 0
MT_I L1_PUTX_old [2 ] 2
MT_I WB_Data [57 ] 57
MT_I WB_Data [25 ] 25
MT_I WB_Data_clean [0 ] 0
MT_I Ack_all [76 ] 76
MT_I Ack_all [47 ] 47
MT_I MEM_Inv [0 ] 0
MCT_I L1_GET_INSTR [0 ] 0
MCT_I L1_GETS [236 ] 236
MCT_I L1_GETX [318 ] 318
MCT_I L1_GETS [106 ] 106
MCT_I L1_GETX [144 ] 144
MCT_I L1_UPGRADE [0 ] 0
MCT_I L1_PUTX [0 ] 0
MCT_I L1_PUTX_old [71249 ] 71249
MCT_I WB_Data [339811 ] 339811
MCT_I WB_Data_clean [226233 ] 226233
MCT_I Ack_all [398934 ] 398934
MCT_I L1_PUTX_old [35361 ] 35361
MCT_I WB_Data [169099 ] 169099
MCT_I WB_Data_clean [111579 ] 111579
MCT_I Ack_all [198965 ] 198965
I_I L1_GET_INSTR [0 ] 0
I_I L1_GETS [0 ] 0
I_I L1_GETX [1 ] 1
I_I L1_GETX [0 ] 0
I_I L1_UPGRADE [0 ] 0
I_I L1_PUTX [0 ] 0
I_I L1_PUTX_old [0 ] 0
I_I Ack [4100 ] 4100
I_I Ack_all [4096 ] 4096
I_I Ack [1989 ] 1989
I_I Ack_all [1984 ] 1984
S_I L1_GET_INSTR [0 ] 0
S_I L1_GETS [0 ] 0
S_I L1_GETX [0 ] 0
S_I L1_UPGRADE [0 ] 0
S_I L1_PUTX [0 ] 0
S_I L1_PUTX_old [1 ] 1
S_I Ack [719 ] 719
S_I Ack_all [719 ] 719
S_I L1_PUTX_old [0 ] 0
S_I Ack [344 ] 344
S_I Ack_all [344 ] 344
S_I MEM_Inv [0 ] 0
ISS L1_GET_INSTR [0 ] 0
ISS L1_GETS [3960 ] 3960
ISS L1_GETX [42929 ] 42929
ISS L1_GETS [1927 ] 1927
ISS L1_GETX [20828 ] 20828
ISS L1_PUTX [0 ] 0
ISS L1_PUTX_old [453 ] 453
ISS L1_PUTX_old [212 ] 212
ISS L2_Replacement [0 ] 0
ISS L2_Replacement_clean [38554702 ] 38554702
ISS Mem_Data [785690 ] 785690
ISS L2_Replacement_clean [19036421 ] 19036421
ISS Mem_Data [390392 ] 390392
ISS MEM_Inv [0 ] 0
IS L1_GET_INSTR [0 ] 0
IS L1_GETS [3 ] 3
IS L1_GETX [238 ] 238
IS L1_GETS [5 ] 5
IS L1_GETX [143 ] 143
IS L1_PUTX [0 ] 0
IS L1_PUTX_old [0 ] 0
IS L2_Replacement [0 ] 0
IS L2_Replacement_clean [212822 ] 212822
IS Mem_Data [3960 ] 3960
IS L2_Replacement_clean [97464 ] 97464
IS Mem_Data [1927 ] 1927
IS MEM_Inv [0 ] 0
IM L1_GET_INSTR [0 ] 0
IM L1_GETS [43582 ] 43582
IM L1_GETX [23712 ] 23712
IM L1_GETS [22267 ] 22267
IM L1_GETX [10554 ] 10554
IM L1_PUTX [0 ] 0
IM L1_PUTX_old [352 ] 352
IM L1_PUTX_old [180 ] 180
IM L2_Replacement [0 ] 0
IM L2_Replacement_clean [20821018 ] 20821018
IM Mem_Data [426371 ] 426371
IM L2_Replacement_clean [10368191 ] 10368191
IM Mem_Data [212312 ] 212312
IM MEM_Inv [0 ] 0
SS_MB L1_GET_INSTR [0 ] 0
@ -725,19 +725,19 @@ SS_MB L1_PUTX_old [0 ] 0
SS_MB L2_Replacement [0 ] 0
SS_MB L2_Replacement_clean [0 ] 0
SS_MB Unblock_Cancel [0 ] 0
SS_MB Exclusive_Unblock [5 ] 5
SS_MB Exclusive_Unblock [1 ] 1
SS_MB MEM_Inv [0 ] 0
MT_MB L1_GET_INSTR [0 ] 0
MT_MB L1_GETS [3162 ] 3162
MT_MB L1_GETX [4790 ] 4790
MT_MB L1_GETS [1646 ] 1646
MT_MB L1_GETX [2278 ] 2278
MT_MB L1_UPGRADE [0 ] 0
MT_MB L1_PUTX [791 ] 791
MT_MB L1_PUTX [388 ] 388
MT_MB L1_PUTX_old [0 ] 0
MT_MB L2_Replacement [110 ] 110
MT_MB L2_Replacement_clean [6157474 ] 6157474
MT_MB L2_Replacement [19 ] 19
MT_MB L2_Replacement_clean [3040991 ] 3040991
MT_MB Unblock_Cancel [0 ] 0
MT_MB Exclusive_Unblock [1213743 ] 1213743
MT_MB Exclusive_Unblock [603575 ] 603575
MT_MB MEM_Inv [0 ] 0
M_MB L1_GET_INSTR [0 ] 0
@ -752,16 +752,16 @@ M_MB Exclusive_Unblock [0 ] 0
M_MB MEM_Inv [0 ] 0
MT_IIB L1_GET_INSTR [0 ] 0
MT_IIB L1_GETS [2 ] 2
MT_IIB L1_GETX [2 ] 2
MT_IIB L1_GETS [0 ] 0
MT_IIB L1_GETX [0 ] 0
MT_IIB L1_UPGRADE [0 ] 0
MT_IIB L1_PUTX [362 ] 362
MT_IIB L1_PUTX [203 ] 203
MT_IIB L1_PUTX_old [0 ] 0
MT_IIB L2_Replacement [0 ] 0
MT_IIB L2_Replacement_clean [805 ] 805
MT_IIB WB_Data [721 ] 721
MT_IIB WB_Data_clean [137 ] 137
MT_IIB Unblock [2 ] 2
MT_IIB L2_Replacement_clean [480 ] 480
MT_IIB WB_Data [343 ] 343
MT_IIB WB_Data_clean [58 ] 58
MT_IIB Unblock [1 ] 1
MT_IIB MEM_Inv [0 ] 0
MT_IB L1_GET_INSTR [0 ] 0
@ -772,8 +772,8 @@ MT_IB L1_PUTX [0 ] 0
MT_IB L1_PUTX_old [0 ] 0
MT_IB L2_Replacement [0 ] 0
MT_IB L2_Replacement_clean [0 ] 0
MT_IB WB_Data [0 ] 0
MT_IB WB_Data_clean [2 ] 2
MT_IB WB_Data [1 ] 1
MT_IB WB_Data_clean [0 ] 0
MT_IB Unblock_Cancel [0 ] 0
MT_IB MEM_Inv [0 ] 0
@ -781,45 +781,45 @@ MT_SB L1_GET_INSTR [0 ] 0
MT_SB L1_GETS [0 ] 0
MT_SB L1_GETX [0 ] 0
MT_SB L1_UPGRADE [0 ] 0
MT_SB L1_PUTX [148 ] 148
MT_SB L1_PUTX [80 ] 80
MT_SB L1_PUTX_old [0 ] 0
MT_SB L2_Replacement [191 ] 191
MT_SB L2_Replacement_clean [13 ] 13
MT_SB Unblock [858 ] 858
MT_SB L2_Replacement [91 ] 91
MT_SB L2_Replacement_clean [1 ] 1
MT_SB Unblock [401 ] 401
MT_SB MEM_Inv [0 ] 0
Memory controller: system.dir_cntrl0.memBuffer:
memory_total_requests: 1643295
memory_reads: 1216024
memory_writes: 427261
memory_refreshes: 94538
memory_total_request_delays: 20935930
memory_delays_per_request: 12.7402
memory_delays_in_input_queue: 717207
memory_delays_behind_head_of_bank_queue: 2709589
memory_delays_stalled_at_head_of_bank_queue: 17509134
memory_stalls_for_bank_busy: 3074341
memory_total_requests: 817426
memory_reads: 604635
memory_writes: 212789
memory_refreshes: 47021
memory_total_request_delays: 10414985
memory_delays_per_request: 12.7412
memory_delays_in_input_queue: 359587
memory_delays_behind_head_of_bank_queue: 1350935
memory_delays_stalled_at_head_of_bank_queue: 8704463
memory_stalls_for_bank_busy: 1530499
memory_stalls_for_random_busy: 0
memory_stalls_for_anti_starvation: 1361169
memory_stalls_for_arbitration: 3571370
memory_stalls_for_bus: 5509201
memory_stalls_for_anti_starvation: 674659
memory_stalls_for_arbitration: 1774410
memory_stalls_for_bus: 2738438
memory_stalls_for_tfaw: 0
memory_stalls_for_read_write_turnaround: 2841227
memory_stalls_for_read_read_turnaround: 1151826
accesses_per_bank: 51721 51397 51175 51369 51424 51695 51701 51002 51610 51436 51700 51400 51298 51361 51275 50968 51513 51112 51646 51252 51220 51237 51257 51230 51431 51060 51148 50990 51432 51253 51708 51274
memory_stalls_for_read_write_turnaround: 1415262
memory_stalls_for_read_read_turnaround: 571195
accesses_per_bank: 25739 25325 25438 25683 25679 25637 25766 25555 25740 25505 25578 25662 25344 25393 25488 25442 25462 25509 25568 25516 25705 25537 25668 25458 25453 25173 25551 25126 25479 25713 25863 25671
--- Directory ---
- Event Counts -
Fetch [1216028 ] 1216028
Data [427267 ] 427267
Memory_Data [1216021 ] 1216021
Memory_Ack [427261 ] 427261
Fetch [604636 ] 604636
Data [212790 ] 212790
Memory_Data [604631 ] 604631
Memory_Ack [212788 ] 212788
DMA_READ [0 ] 0
DMA_WRITE [0 ] 0
CleanReplacement [788753 ] 788753
CleanReplacement [391838 ] 391838
- Transitions -
I Fetch [1216028 ] 1216028
I Fetch [604636 ] 604636
I DMA_READ [0 ] 0
I DMA_WRITE [0 ] 0
@ -835,20 +835,20 @@ ID_W Memory_Ack [0 ] 0
ID_W DMA_READ [0 ] 0
ID_W DMA_WRITE [0 ] 0
M Data [427267 ] 427267
M Data [212790 ] 212790
M DMA_READ [0 ] 0
M DMA_WRITE [0 ] 0
M CleanReplacement [788753 ] 788753
M CleanReplacement [391838 ] 391838
IM Fetch [0 ] 0
IM Data [0 ] 0
IM Memory_Data [1216021 ] 1216021
IM Memory_Data [604631 ] 604631
IM DMA_READ [0 ] 0
IM DMA_WRITE [0 ] 0
MI Fetch [0 ] 0
MI Data [0 ] 0
MI Memory_Ack [427261 ] 427261
MI Memory_Ack [212788 ] 212788
MI DMA_READ [0 ] 0
MI DMA_WRITE [0 ] 0

View file

@ -1,74 +1,74 @@
system.cpu3: completed 10000 read accesses @4449675
system.cpu2: completed 10000 read accesses @4485535
system.cpu5: completed 10000 read accesses @4567955
system.cpu0: completed 10000 read accesses @4568975
system.cpu1: completed 10000 read accesses @4604615
system.cpu6: completed 10000 read accesses @4622685
system.cpu4: completed 10000 read accesses @4629885
system.cpu7: completed 10000 read accesses @4654005
system.cpu3: completed 20000 read accesses @8957835
system.cpu1: completed 20000 read accesses @9039955
system.cpu5: completed 20000 read accesses @9104145
system.cpu2: completed 20000 read accesses @9114205
system.cpu7: completed 20000 read accesses @9166145
system.cpu0: completed 20000 read accesses @9167985
system.cpu6: completed 20000 read accesses @9178785
system.cpu4: completed 20000 read accesses @9251745
system.cpu3: completed 30000 read accesses @13439625
system.cpu1: completed 30000 read accesses @13605615
system.cpu0: completed 30000 read accesses @13722185
system.cpu7: completed 30000 read accesses @13742945
system.cpu2: completed 30000 read accesses @13744605
system.cpu4: completed 30000 read accesses @13801475
system.cpu5: completed 30000 read accesses @13844335
system.cpu6: completed 30000 read accesses @13848035
system.cpu3: completed 40000 read accesses @18011765
system.cpu1: completed 40000 read accesses @18063955
system.cpu2: completed 40000 read accesses @18232015
system.cpu0: completed 40000 read accesses @18299565
system.cpu4: completed 40000 read accesses @18310375
system.cpu7: completed 40000 read accesses @18352785
system.cpu6: completed 40000 read accesses @18534295
system.cpu5: completed 40000 read accesses @18537935
system.cpu1: completed 50000 read accesses @22571605
system.cpu3: completed 50000 read accesses @22619715
system.cpu2: completed 50000 read accesses @22695005
system.cpu4: completed 50000 read accesses @22851875
system.cpu0: completed 50000 read accesses @22861445
system.cpu7: completed 50000 read accesses @22939125
system.cpu5: completed 50000 read accesses @23139205
system.cpu6: completed 50000 read accesses @23212405
system.cpu2: completed 60000 read accesses @27186315
system.cpu1: completed 60000 read accesses @27206635
system.cpu3: completed 60000 read accesses @27347815
system.cpu4: completed 60000 read accesses @27406875
system.cpu7: completed 60000 read accesses @27413255
system.cpu0: completed 60000 read accesses @27547905
system.cpu5: completed 60000 read accesses @27639105
system.cpu6: completed 60000 read accesses @27670915
system.cpu2: completed 70000 read accesses @31615075
system.cpu1: completed 70000 read accesses @31739335
system.cpu3: completed 70000 read accesses @31897835
system.cpu4: completed 70000 read accesses @31933315
system.cpu7: completed 70000 read accesses @32085265
system.cpu0: completed 70000 read accesses @32094535
system.cpu5: completed 70000 read accesses @32182575
system.cpu6: completed 70000 read accesses @32377575
system.cpu2: completed 80000 read accesses @36173285
system.cpu4: completed 80000 read accesses @36323345
system.cpu1: completed 80000 read accesses @36375669
system.cpu3: completed 80000 read accesses @36443885
system.cpu0: completed 80000 read accesses @36502365
system.cpu7: completed 80000 read accesses @36712625
system.cpu5: completed 80000 read accesses @36804605
system.cpu6: completed 80000 read accesses @36881305
system.cpu2: completed 90000 read accesses @40815815
system.cpu3: completed 90000 read accesses @40829405
system.cpu4: completed 90000 read accesses @40973075
system.cpu1: completed 90000 read accesses @41069165
system.cpu0: completed 90000 read accesses @41139895
system.cpu5: completed 90000 read accesses @41339385
system.cpu6: completed 90000 read accesses @41345065
system.cpu7: completed 90000 read accesses @41413045
system.cpu2: completed 100000 read accesses @45377925
system.cpu7: completed 10000 read, 5407 write accesses @2193104
system.cpu5: completed 10000 read, 5417 write accesses @2227894
system.cpu3: completed 10000 read, 5304 write accesses @2241899
system.cpu0: completed 10000 read, 5406 write accesses @2286999
system.cpu6: completed 10000 read, 5500 write accesses @2314615
system.cpu2: completed 10000 read, 5192 write accesses @2332464
system.cpu4: completed 10000 read, 5484 write accesses @2351825
system.cpu1: completed 10000 read, 5601 write accesses @2421215
system.cpu7: completed 20000 read, 10600 write accesses @4362574
system.cpu2: completed 20000 read, 10442 write accesses @4540254
system.cpu5: completed 20000 read, 10862 write accesses @4558355
system.cpu3: completed 20000 read, 10634 write accesses @4562696
system.cpu0: completed 20000 read, 10789 write accesses @4572225
system.cpu6: completed 20000 read, 10964 write accesses @4613315
system.cpu4: completed 20000 read, 10859 write accesses @4624135
system.cpu1: completed 20000 read, 10860 write accesses @4669865
system.cpu7: completed 30000 read, 16054 write accesses @6655525
system.cpu0: completed 30000 read, 16092 write accesses @6770115
system.cpu1: completed 30000 read, 16284 write accesses @6828865
system.cpu3: completed 30000 read, 16125 write accesses @6864285
system.cpu4: completed 30000 read, 16227 write accesses @6890965
system.cpu6: completed 30000 read, 16336 write accesses @6904064
system.cpu2: completed 30000 read, 15932 write accesses @6953085
system.cpu5: completed 30000 read, 16240 write accesses @6957625
system.cpu7: completed 40000 read, 21410 write accesses @8901178
system.cpu0: completed 40000 read, 21509 write accesses @9069465
system.cpu1: completed 40000 read, 21632 write accesses @9091094
system.cpu3: completed 40000 read, 21475 write accesses @9116195
system.cpu4: completed 40000 read, 21761 write accesses @9209395
system.cpu5: completed 40000 read, 21553 write accesses @9245188
system.cpu6: completed 40000 read, 21832 write accesses @9310296
system.cpu2: completed 40000 read, 21265 write accesses @9325324
system.cpu7: completed 50000 read, 26853 write accesses @11255815
system.cpu0: completed 50000 read, 26977 write accesses @11286865
system.cpu1: completed 50000 read, 27136 write accesses @11385455
system.cpu5: completed 50000 read, 26999 write accesses @11446175
system.cpu4: completed 50000 read, 27138 write accesses @11497105
system.cpu3: completed 50000 read, 26925 write accesses @11513845
system.cpu6: completed 50000 read, 27245 write accesses @11629194
system.cpu2: completed 50000 read, 26613 write accesses @11642405
system.cpu0: completed 60000 read, 32322 write accesses @13513714
system.cpu7: completed 60000 read, 32300 write accesses @13580354
system.cpu5: completed 60000 read, 32335 write accesses @13650056
system.cpu1: completed 60000 read, 32734 write accesses @13710275
system.cpu4: completed 60000 read, 32403 write accesses @13735965
system.cpu2: completed 60000 read, 31942 write accesses @13824435
system.cpu6: completed 60000 read, 32511 write accesses @13871344
system.cpu3: completed 60000 read, 32324 write accesses @13913205
system.cpu0: completed 70000 read, 37723 write accesses @15813186
system.cpu7: completed 70000 read, 37805 write accesses @15917425
system.cpu5: completed 70000 read, 37663 write accesses @15942505
system.cpu4: completed 70000 read, 37631 write accesses @16028785
system.cpu1: completed 70000 read, 38017 write accesses @16031454
system.cpu3: completed 70000 read, 37707 write accesses @16112322
system.cpu6: completed 70000 read, 37910 write accesses @16120997
system.cpu2: completed 70000 read, 37183 write accesses @16150764
system.cpu0: completed 80000 read, 42908 write accesses @18001745
system.cpu5: completed 80000 read, 42901 write accesses @18163144
system.cpu4: completed 80000 read, 42765 write accesses @18206905
system.cpu7: completed 80000 read, 43338 write accesses @18261574
system.cpu6: completed 80000 read, 43257 write accesses @18334555
system.cpu1: completed 80000 read, 43298 write accesses @18408395
system.cpu3: completed 80000 read, 43106 write accesses @18453978
system.cpu2: completed 80000 read, 42466 write accesses @18467507
system.cpu0: completed 90000 read, 48230 write accesses @20259175
system.cpu5: completed 90000 read, 48356 write accesses @20526365
system.cpu7: completed 90000 read, 48874 write accesses @20532605
system.cpu4: completed 90000 read, 48159 write accesses @20555334
system.cpu1: completed 90000 read, 48676 write accesses @20572365
system.cpu6: completed 90000 read, 48688 write accesses @20703625
system.cpu2: completed 90000 read, 47767 write accesses @20716675
system.cpu3: completed 90000 read, 48620 write accesses @20769265
system.cpu0: completed 100000 read, 53615 write accesses @22570074
hack: be nice to actually delete the event here

View file

@ -1,14 +1,10 @@
M5 Simulator System
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Apr 28 2011 14:32:19
M5 started Apr 28 2011 14:32:56
M5 executing on SC2B0617
command line: build/ALPHA_SE_MESI_CMP_directory/m5.opt -d build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory
gem5 compiled Jun 30 2011 15:26:55
gem5 started Jun 30 2011 15:27:19
gem5 executing on SC2B0622
command line: build/ALPHA_SE_MESI_CMP_directory/gem5.opt -d build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 45377925 because maximum number of loads reached
Exiting @ tick 22570074 because maximum number of loads reached

View file

@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 358312 # Number of bytes of host memory used
host_seconds 848.02 # Real time elapsed on the host
host_tick_rate 53511 # Simulator tick rate (ticks/s)
sim_seconds 0.022570 # Number of seconds simulated
sim_ticks 22570074 # Number of ticks simulated
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.045378 # Number of seconds simulated
sim_ticks 45377925 # Number of ticks simulated
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu0.num_reads 99459 # number of read accesses completed
host_tick_rate 60026 # Simulator tick rate (ticks/s)
host_mem_usage 359160 # Number of bytes of host memory used
host_seconds 376.01 # Real time elapsed on the host
system.cpu0.num_reads 100000 # number of read accesses completed
system.cpu0.num_writes 53615 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 98926 # number of read accesses completed
system.cpu1.num_writes 53490 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99657 # number of read accesses completed
system.cpu1.num_writes 53451 # number of write accesses completed
system.cpu2.num_reads 98053 # number of read accesses completed
system.cpu2.num_writes 52227 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 100000 # number of read accesses completed
system.cpu2.num_writes 53553 # number of write accesses completed
system.cpu3.num_reads 98222 # number of read accesses completed
system.cpu3.num_writes 53057 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99955 # number of read accesses completed
system.cpu3.num_writes 53807 # number of write accesses completed
system.cpu4.num_reads 98292 # number of read accesses completed
system.cpu4.num_writes 52603 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99803 # number of read accesses completed
system.cpu4.num_writes 53897 # number of write accesses completed
system.cpu5.num_reads 98988 # number of read accesses completed
system.cpu5.num_writes 53055 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 98781 # number of read accesses completed
system.cpu5.num_writes 53059 # number of write accesses completed
system.cpu6.num_reads 98007 # number of read accesses completed
system.cpu6.num_writes 53041 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 98750 # number of read accesses completed
system.cpu6.num_writes 53290 # number of write accesses completed
system.cpu7.num_reads 99081 # number of read accesses completed
system.cpu7.num_writes 53785 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 98377 # number of read accesses completed
system.cpu7.num_writes 53085 # number of write accesses completed
---------- End Simulation Statistics ----------

View file

@ -25,14 +25,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[0]
test=system.ruby.cpu_ruby_ports0.port[0]
test=system.l1_cntrl0.sequencer.port[0]
[system.cpu1]
type=MemTest
@ -41,14 +42,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[1]
test=system.ruby.cpu_ruby_ports1.port[0]
test=system.l1_cntrl1.sequencer.port[0]
[system.cpu2]
type=MemTest
@ -57,14 +59,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[2]
test=system.ruby.cpu_ruby_ports2.port[0]
test=system.l1_cntrl2.sequencer.port[0]
[system.cpu3]
type=MemTest
@ -73,14 +76,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[3]
test=system.ruby.cpu_ruby_ports3.port[0]
test=system.l1_cntrl3.sequencer.port[0]
[system.cpu4]
type=MemTest
@ -89,14 +93,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[4]
test=system.ruby.cpu_ruby_ports4.port[0]
test=system.l1_cntrl4.sequencer.port[0]
[system.cpu5]
type=MemTest
@ -105,14 +110,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[5]
test=system.ruby.cpu_ruby_ports5.port[0]
test=system.l1_cntrl5.sequencer.port[0]
[system.cpu6]
type=MemTest
@ -121,14 +127,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[6]
test=system.ruby.cpu_ruby_ports6.port[0]
test=system.l1_cntrl6.sequencer.port[0]
[system.cpu7]
type=MemTest
@ -137,14 +144,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[7]
test=system.ruby.cpu_ruby_ports7.port[0]
test=system.l1_cntrl7.sequencer.port[0]
[system.dir_cntrl0]
type=Directory_Controller
@ -156,6 +164,7 @@ directory_latency=6
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
@ -200,7 +209,7 @@ port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
@ -209,7 +218,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports0
ruby_system=system.ruby
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
@ -229,9 +239,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
buffer_size=0
@ -240,7 +265,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports1
ruby_system=system.ruby
sequencer=system.l1_cntrl1.sequencer
transitions_per_cycle=32
version=1
@ -260,9 +286,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory
buffer_size=0
@ -271,7 +312,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports2
ruby_system=system.ruby
sequencer=system.l1_cntrl2.sequencer
transitions_per_cycle=32
version=2
@ -291,9 +333,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory
buffer_size=0
@ -302,7 +359,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports3
ruby_system=system.ruby
sequencer=system.l1_cntrl3.sequencer
transitions_per_cycle=32
version=3
@ -322,9 +380,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory
buffer_size=0
@ -333,7 +406,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports4
ruby_system=system.ruby
sequencer=system.l1_cntrl4.sequencer
transitions_per_cycle=32
version=4
@ -353,9 +427,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory
buffer_size=0
@ -364,7 +453,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports5
ruby_system=system.ruby
sequencer=system.l1_cntrl5.sequencer
transitions_per_cycle=32
version=5
@ -384,9 +474,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory
buffer_size=0
@ -395,7 +500,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports6
ruby_system=system.ruby
sequencer=system.l1_cntrl6.sequencer
transitions_per_cycle=32
version=6
@ -415,9 +521,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory
buffer_size=0
@ -426,7 +547,8 @@ l2_select_num_bits=0
number_of_TBEs=256
recycle_latency=10
request_latency=2
sequencer=system.ruby.cpu_ruby_ports7
ruby_system=system.ruby
sequencer=system.l1_cntrl7.sequencer
transitions_per_cycle=32
version=7
@ -446,6 +568,21 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
@ -456,6 +593,7 @@ number_of_TBEs=256
recycle_latency=10
request_latency=2
response_latency=2
ruby_system=system.ruby
transitions_per_cycle=32
version=0
@ -475,133 +613,18 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.cpu_ruby_ports0.physMemPort system.ruby.cpu_ruby_ports1.physMemPort system.ruby.cpu_ruby_ports2.physMemPort system.ruby.cpu_ruby_ports3.physMemPort system.ruby.cpu_ruby_ports4.physMemPort system.ruby.cpu_ruby_ports5.physMemPort system.ruby.cpu_ruby_ports6.physMemPort system.ruby.cpu_ruby_ports7.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort system.l1_cntrl1.sequencer.physMemPort system.l1_cntrl2.sequencer.physMemPort system.l1_cntrl3.sequencer.physMemPort system.l1_cntrl4.sequencer.physMemPort system.l1_cntrl5.sequencer.physMemPort system.l1_cntrl6.sequencer.physMemPort system.l1_cntrl7.sequencer.physMemPort
[system.ruby]
type=RubySystem
children=cpu_ruby_ports0 cpu_ruby_ports1 cpu_ruby_ports2 cpu_ruby_ports3 cpu_ruby_ports4 cpu_ruby_ports5 cpu_ruby_ports6 cpu_ruby_ports7 network profiler tracer
children=network profiler tracer
block_size_bytes=64
clock=1
mem_size=134217728
network=system.ruby.network
no_mem_vec=false
profiler=system.ruby.profiler
random_seed=1234
randomization=false
stats_filename=ruby.stats
tracer=system.ruby.tracer
[system.ruby.cpu_ruby_ports0]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.ruby.cpu_ruby_ports1]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.ruby.cpu_ruby_ports2]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.ruby.cpu_ruby_ports3]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.ruby.cpu_ruby_ports4]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.ruby.cpu_ruby_ports5]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.ruby.cpu_ruby_ports6]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.ruby.cpu_ruby_ports7]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.ruby.network]
type=SimpleNetwork
@ -611,6 +634,7 @@ buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
@ -851,8 +875,10 @@ type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=8
ruby_system=system.ruby
[system.ruby.tracer]
type=RubyTracer
ruby_system=system.ruby
warmup_length=100000

View file

@ -1,74 +1,74 @@
system.cpu6: completed 10000 read accesses @3870766
system.cpu3: completed 10000 read accesses @3878746
system.cpu0: completed 10000 read accesses @3886856
system.cpu5: completed 10000 read accesses @3927076
system.cpu4: completed 10000 read accesses @3928136
system.cpu1: completed 10000 read accesses @3933986
system.cpu7: completed 10000 read accesses @3939136
system.cpu2: completed 10000 read accesses @3961336
system.cpu3: completed 20000 read accesses @7711976
system.cpu6: completed 20000 read accesses @7755206
system.cpu1: completed 20000 read accesses @7790946
system.cpu0: completed 20000 read accesses @7793836
system.cpu7: completed 20000 read accesses @7819156
system.cpu5: completed 20000 read accesses @7842116
system.cpu2: completed 20000 read accesses @7861796
system.cpu4: completed 20000 read accesses @7869216
system.cpu6: completed 30000 read accesses @11632716
system.cpu3: completed 30000 read accesses @11640476
system.cpu0: completed 30000 read accesses @11674406
system.cpu7: completed 30000 read accesses @11723106
system.cpu1: completed 30000 read accesses @11750786
system.cpu5: completed 30000 read accesses @11771946
system.cpu2: completed 30000 read accesses @11779206
system.cpu4: completed 30000 read accesses @11786866
system.cpu6: completed 40000 read accesses @15549176
system.cpu3: completed 40000 read accesses @15569106
system.cpu0: completed 40000 read accesses @15575406
system.cpu1: completed 40000 read accesses @15639866
system.cpu7: completed 40000 read accesses @15651376
system.cpu4: completed 40000 read accesses @15684456
system.cpu2: completed 40000 read accesses @15693786
system.cpu5: completed 40000 read accesses @15694256
system.cpu3: completed 50000 read accesses @19433226
system.cpu6: completed 50000 read accesses @19494266
system.cpu0: completed 50000 read accesses @19522326
system.cpu7: completed 50000 read accesses @19555506
system.cpu2: completed 50000 read accesses @19582037
system.cpu5: completed 50000 read accesses @19602186
system.cpu4: completed 50000 read accesses @19612156
system.cpu1: completed 50000 read accesses @19619536
system.cpu3: completed 60000 read accesses @23350676
system.cpu6: completed 60000 read accesses @23398486
system.cpu7: completed 60000 read accesses @23413166
system.cpu2: completed 60000 read accesses @23446897
system.cpu0: completed 60000 read accesses @23459826
system.cpu5: completed 60000 read accesses @23480596
system.cpu1: completed 60000 read accesses @23493697
system.cpu4: completed 60000 read accesses @23550560
system.cpu6: completed 70000 read accesses @27257556
system.cpu3: completed 70000 read accesses @27284686
system.cpu7: completed 70000 read accesses @27295276
system.cpu0: completed 70000 read accesses @27323626
system.cpu2: completed 70000 read accesses @27347866
system.cpu5: completed 70000 read accesses @27397476
system.cpu1: completed 70000 read accesses @27431506
system.cpu4: completed 70000 read accesses @27445496
system.cpu3: completed 80000 read accesses @31119376
system.cpu6: completed 80000 read accesses @31139476
system.cpu7: completed 80000 read accesses @31156808
system.cpu0: completed 80000 read accesses @31162576
system.cpu2: completed 80000 read accesses @31207156
system.cpu5: completed 80000 read accesses @31296626
system.cpu1: completed 80000 read accesses @31342336
system.cpu4: completed 80000 read accesses @31369706
system.cpu3: completed 90000 read accesses @34977986
system.cpu7: completed 90000 read accesses @35027516
system.cpu0: completed 90000 read accesses @35081906
system.cpu6: completed 90000 read accesses @35116116
system.cpu2: completed 90000 read accesses @35133146
system.cpu5: completed 90000 read accesses @35236356
system.cpu1: completed 90000 read accesses @35243480
system.cpu4: completed 90000 read accesses @35321756
system.cpu3: completed 100000 read accesses @38906196
system.cpu1: completed 10000 read, 5302 write accesses @1928146
system.cpu4: completed 10000 read, 5365 write accesses @1942166
system.cpu7: completed 10000 read, 5319 write accesses @1965207
system.cpu3: completed 10000 read, 5359 write accesses @1968836
system.cpu0: completed 10000 read, 5498 write accesses @1974677
system.cpu2: completed 10000 read, 5513 write accesses @1977476
system.cpu6: completed 10000 read, 5448 write accesses @1980956
system.cpu5: completed 10000 read, 5483 write accesses @1995684
system.cpu4: completed 20000 read, 10717 write accesses @3830467
system.cpu1: completed 20000 read, 10577 write accesses @3871337
system.cpu7: completed 20000 read, 10556 write accesses @3902287
system.cpu5: completed 20000 read, 10901 write accesses @3923395
system.cpu0: completed 20000 read, 10861 write accesses @3926315
system.cpu2: completed 20000 read, 10674 write accesses @3934695
system.cpu6: completed 20000 read, 10925 write accesses @3939046
system.cpu3: completed 20000 read, 10752 write accesses @3981115
system.cpu4: completed 30000 read, 16128 write accesses @5754566
system.cpu7: completed 30000 read, 16027 write accesses @5841539
system.cpu5: completed 30000 read, 16312 write accesses @5857206
system.cpu2: completed 30000 read, 16104 write accesses @5869696
system.cpu1: completed 30000 read, 16084 write accesses @5872577
system.cpu0: completed 30000 read, 16133 write accesses @5895696
system.cpu6: completed 30000 read, 16259 write accesses @5909016
system.cpu3: completed 30000 read, 16253 write accesses @5970997
system.cpu4: completed 40000 read, 21443 write accesses @7732298
system.cpu7: completed 40000 read, 21518 write accesses @7817106
system.cpu0: completed 40000 read, 21561 write accesses @7817675
system.cpu2: completed 40000 read, 21432 write accesses @7822846
system.cpu1: completed 40000 read, 21383 write accesses @7845525
system.cpu5: completed 40000 read, 21816 write accesses @7858096
system.cpu6: completed 40000 read, 21672 write accesses @7885486
system.cpu3: completed 40000 read, 21581 write accesses @7941597
system.cpu4: completed 50000 read, 26787 write accesses @9651285
system.cpu7: completed 50000 read, 26989 write accesses @9793686
system.cpu0: completed 50000 read, 26994 write accesses @9797807
system.cpu2: completed 50000 read, 26921 write accesses @9830875
system.cpu5: completed 50000 read, 27153 write accesses @9839316
system.cpu6: completed 50000 read, 27189 write accesses @9858608
system.cpu1: completed 50000 read, 26834 write accesses @9863587
system.cpu3: completed 50000 read, 27039 write accesses @9921406
system.cpu4: completed 60000 read, 32175 write accesses @11605575
system.cpu2: completed 60000 read, 32358 write accesses @11729986
system.cpu0: completed 60000 read, 32424 write accesses @11735436
system.cpu7: completed 60000 read, 32432 write accesses @11778007
system.cpu6: completed 60000 read, 32473 write accesses @11788255
system.cpu5: completed 60000 read, 32623 write accesses @11789575
system.cpu1: completed 60000 read, 32116 write accesses @11821356
system.cpu3: completed 60000 read, 32229 write accesses @11884826
system.cpu4: completed 70000 read, 37533 write accesses @13546365
system.cpu0: completed 70000 read, 37907 write accesses @13701646
system.cpu2: completed 70000 read, 37745 write accesses @13708257
system.cpu6: completed 70000 read, 37768 write accesses @13710576
system.cpu7: completed 70000 read, 37843 write accesses @13719776
system.cpu5: completed 70000 read, 37934 write accesses @13770505
system.cpu1: completed 70000 read, 37322 write accesses @13773596
system.cpu3: completed 70000 read, 37575 write accesses @13859246
system.cpu4: completed 80000 read, 42663 write accesses @15468226
system.cpu6: completed 80000 read, 43059 write accesses @15617186
system.cpu7: completed 80000 read, 43185 write accesses @15635279
system.cpu0: completed 80000 read, 43129 write accesses @15668486
system.cpu2: completed 80000 read, 43262 write accesses @15680656
system.cpu1: completed 80000 read, 42658 write accesses @15703946
system.cpu5: completed 80000 read, 43215 write accesses @15712586
system.cpu3: completed 80000 read, 42991 write accesses @15858096
system.cpu4: completed 90000 read, 48047 write accesses @17468576
system.cpu2: completed 90000 read, 48557 write accesses @17581105
system.cpu7: completed 90000 read, 48648 write accesses @17584296
system.cpu6: completed 90000 read, 48515 write accesses @17584397
system.cpu1: completed 90000 read, 48024 write accesses @17672186
system.cpu0: completed 90000 read, 48750 write accesses @17683641
system.cpu5: completed 90000 read, 48534 write accesses @17695277
system.cpu3: completed 90000 read, 48496 write accesses @17843215
system.cpu4: completed 100000 read, 53558 write accesses @19400856
hack: be nice to actually delete the event here

View file

@ -1,14 +1,10 @@
M5 Simulator System
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Apr 28 2011 14:48:31
M5 started Apr 28 2011 14:49:14
M5 executing on SC2B0617
command line: build/ALPHA_SE_MOESI_CMP_directory/m5.opt -d build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
gem5 compiled Jun 30 2011 15:10:22
gem5 started Jun 30 2011 15:10:46
gem5 executing on SC2B0622
command line: build/ALPHA_SE_MOESI_CMP_directory/gem5.opt -d build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 38906196 because maximum number of loads reached
Exiting @ tick 19400856 because maximum number of loads reached

View file

@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 358708 # Number of bytes of host memory used
host_seconds 778.15 # Real time elapsed on the host
host_tick_rate 49999 # Simulator tick rate (ticks/s)
sim_seconds 0.019401 # Number of seconds simulated
sim_ticks 19400856 # Number of ticks simulated
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.038906 # Number of seconds simulated
sim_ticks 38906196 # Number of ticks simulated
host_tick_rate 55434 # Simulator tick rate (ticks/s)
host_mem_usage 359424 # Number of bytes of host memory used
host_seconds 349.98 # Real time elapsed on the host
system.cpu0.num_reads 98844 # number of read accesses completed
system.cpu0.num_writes 53478 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu0.num_reads 99780 # number of read accesses completed
system.cpu0.num_writes 53840 # number of write accesses completed
system.cpu1.num_reads 98643 # number of read accesses completed
system.cpu1.num_writes 52679 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99496 # number of read accesses completed
system.cpu1.num_writes 53772 # number of write accesses completed
system.cpu2.num_reads 99369 # number of read accesses completed
system.cpu2.num_writes 53574 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 99777 # number of read accesses completed
system.cpu2.num_writes 53680 # number of write accesses completed
system.cpu3.num_reads 97889 # number of read accesses completed
system.cpu3.num_writes 52711 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 100000 # number of read accesses completed
system.cpu3.num_writes 53475 # number of write accesses completed
system.cpu4.num_reads 100000 # number of read accesses completed
system.cpu4.num_writes 53558 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99286 # number of read accesses completed
system.cpu4.num_writes 53457 # number of write accesses completed
system.cpu5.num_reads 98762 # number of read accesses completed
system.cpu5.num_writes 53328 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99290 # number of read accesses completed
system.cpu5.num_writes 53647 # number of write accesses completed
system.cpu6.num_reads 99308 # number of read accesses completed
system.cpu6.num_writes 53445 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 99687 # number of read accesses completed
system.cpu6.num_writes 53645 # number of write accesses completed
system.cpu7.num_reads 99141 # number of read accesses completed
system.cpu7.num_writes 53490 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 99914 # number of read accesses completed
system.cpu7.num_writes 53699 # number of write accesses completed
---------- End Simulation Statistics ----------

View file

@ -25,14 +25,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[0]
test=system.ruby.cpu_ruby_ports0.port[0]
test=system.l1_cntrl0.sequencer.port[0]
[system.cpu1]
type=MemTest
@ -41,14 +42,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[1]
test=system.ruby.cpu_ruby_ports1.port[0]
test=system.l1_cntrl1.sequencer.port[0]
[system.cpu2]
type=MemTest
@ -57,14 +59,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[2]
test=system.ruby.cpu_ruby_ports2.port[0]
test=system.l1_cntrl2.sequencer.port[0]
[system.cpu3]
type=MemTest
@ -73,14 +76,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[3]
test=system.ruby.cpu_ruby_ports3.port[0]
test=system.l1_cntrl3.sequencer.port[0]
[system.cpu4]
type=MemTest
@ -89,14 +93,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[4]
test=system.ruby.cpu_ruby_ports4.port[0]
test=system.l1_cntrl4.sequencer.port[0]
[system.cpu5]
type=MemTest
@ -105,14 +110,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[5]
test=system.ruby.cpu_ruby_ports5.port[0]
test=system.l1_cntrl5.sequencer.port[0]
[system.cpu6]
type=MemTest
@ -121,14 +127,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[6]
test=system.ruby.cpu_ruby_ports6.port[0]
test=system.l1_cntrl6.sequencer.port[0]
[system.cpu7]
type=MemTest
@ -137,14 +144,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[7]
test=system.ruby.cpu_ruby_ports7.port[0]
test=system.l1_cntrl7.sequencer.port[0]
[system.dir_cntrl0]
type=Directory_Controller
@ -159,6 +167,7 @@ l2_select_num_bits=0
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
@ -203,7 +212,7 @@ port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
N_tokens=9
@ -218,7 +227,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports0
ruby_system=system.ruby
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
@ -238,9 +248,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
N_tokens=9
@ -255,7 +280,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports1
ruby_system=system.ruby
sequencer=system.l1_cntrl1.sequencer
transitions_per_cycle=32
version=1
@ -275,9 +301,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory
N_tokens=9
@ -292,7 +333,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports2
ruby_system=system.ruby
sequencer=system.l1_cntrl2.sequencer
transitions_per_cycle=32
version=2
@ -312,9 +354,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory
N_tokens=9
@ -329,7 +386,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports3
ruby_system=system.ruby
sequencer=system.l1_cntrl3.sequencer
transitions_per_cycle=32
version=3
@ -349,9 +407,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory
N_tokens=9
@ -366,7 +439,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports4
ruby_system=system.ruby
sequencer=system.l1_cntrl4.sequencer
transitions_per_cycle=32
version=4
@ -386,9 +460,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory
N_tokens=9
@ -403,7 +492,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports5
ruby_system=system.ruby
sequencer=system.l1_cntrl5.sequencer
transitions_per_cycle=32
version=5
@ -423,9 +513,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory
N_tokens=9
@ -440,7 +545,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports6
ruby_system=system.ruby
sequencer=system.l1_cntrl6.sequencer
transitions_per_cycle=32
version=6
@ -460,9 +566,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory
children=L1DcacheMemory L1IcacheMemory sequencer
L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory
N_tokens=9
@ -477,7 +598,8 @@ no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
retry_threshold=1
sequencer=system.ruby.cpu_ruby_ports7
ruby_system=system.ruby
sequencer=system.l1_cntrl7.sequencer
transitions_per_cycle=32
version=7
@ -497,6 +619,21 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.l2_cntrl0]
type=L2Cache_Controller
children=L2cacheMemory
@ -509,6 +646,7 @@ l2_request_latency=5
l2_response_latency=5
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
@ -528,133 +666,18 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.cpu_ruby_ports0.physMemPort system.ruby.cpu_ruby_ports1.physMemPort system.ruby.cpu_ruby_ports2.physMemPort system.ruby.cpu_ruby_ports3.physMemPort system.ruby.cpu_ruby_ports4.physMemPort system.ruby.cpu_ruby_ports5.physMemPort system.ruby.cpu_ruby_ports6.physMemPort system.ruby.cpu_ruby_ports7.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort system.l1_cntrl1.sequencer.physMemPort system.l1_cntrl2.sequencer.physMemPort system.l1_cntrl3.sequencer.physMemPort system.l1_cntrl4.sequencer.physMemPort system.l1_cntrl5.sequencer.physMemPort system.l1_cntrl6.sequencer.physMemPort system.l1_cntrl7.sequencer.physMemPort
[system.ruby]
type=RubySystem
children=cpu_ruby_ports0 cpu_ruby_ports1 cpu_ruby_ports2 cpu_ruby_ports3 cpu_ruby_ports4 cpu_ruby_ports5 cpu_ruby_ports6 cpu_ruby_ports7 network profiler tracer
children=network profiler tracer
block_size_bytes=64
clock=1
mem_size=134217728
network=system.ruby.network
no_mem_vec=false
profiler=system.ruby.profiler
random_seed=1234
randomization=false
stats_filename=ruby.stats
tracer=system.ruby.tracer
[system.ruby.cpu_ruby_ports0]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.ruby.cpu_ruby_ports1]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.ruby.cpu_ruby_ports2]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.ruby.cpu_ruby_ports3]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.ruby.cpu_ruby_ports4]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.ruby.cpu_ruby_ports5]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.ruby.cpu_ruby_ports6]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.ruby.cpu_ruby_ports7]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.ruby.network]
type=SimpleNetwork
@ -664,6 +687,7 @@ buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
@ -904,8 +928,10 @@ type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=8
ruby_system=system.ruby
[system.ruby.tracer]
type=RubyTracer
ruby_system=system.ruby
warmup_length=100000

View file

@ -1,74 +1,74 @@
system.cpu5: completed 10000 read accesses @3864070
system.cpu3: completed 10000 read accesses @3887280
system.cpu6: completed 10000 read accesses @3903410
system.cpu1: completed 10000 read accesses @3920870
system.cpu0: completed 10000 read accesses @3932660
system.cpu7: completed 10000 read accesses @3972490
system.cpu4: completed 10000 read accesses @3988880
system.cpu2: completed 10000 read accesses @3999780
system.cpu5: completed 20000 read accesses @7762000
system.cpu3: completed 20000 read accesses @7788490
system.cpu6: completed 20000 read accesses @7797950
system.cpu4: completed 20000 read accesses @7836830
system.cpu0: completed 20000 read accesses @7851780
system.cpu1: completed 20000 read accesses @7855270
system.cpu7: completed 20000 read accesses @7927330
system.cpu2: completed 20000 read accesses @7934880
system.cpu6: completed 30000 read accesses @11684890
system.cpu5: completed 30000 read accesses @11694840
system.cpu3: completed 30000 read accesses @11712050
system.cpu1: completed 30000 read accesses @11744490
system.cpu2: completed 30000 read accesses @11785460
system.cpu4: completed 30000 read accesses @11842360
system.cpu0: completed 30000 read accesses @11862270
system.cpu7: completed 30000 read accesses @11924410
system.cpu6: completed 40000 read accesses @15548250
system.cpu5: completed 40000 read accesses @15643680
system.cpu3: completed 40000 read accesses @15689320
system.cpu1: completed 40000 read accesses @15695330
system.cpu2: completed 40000 read accesses @15709870
system.cpu4: completed 40000 read accesses @15791270
system.cpu0: completed 40000 read accesses @15799560
system.cpu7: completed 40000 read accesses @15821180
system.cpu6: completed 50000 read accesses @19475000
system.cpu1: completed 50000 read accesses @19607010
system.cpu5: completed 50000 read accesses @19635570
system.cpu3: completed 50000 read accesses @19650690
system.cpu0: completed 50000 read accesses @19697330
system.cpu4: completed 50000 read accesses @19719920
system.cpu2: completed 50000 read accesses @19744940
system.cpu7: completed 50000 read accesses @19782490
system.cpu6: completed 60000 read accesses @23426390
system.cpu5: completed 60000 read accesses @23533250
system.cpu1: completed 60000 read accesses @23567580
system.cpu3: completed 60000 read accesses @23593260
system.cpu4: completed 60000 read accesses @23602460
system.cpu0: completed 60000 read accesses @23648560
system.cpu2: completed 60000 read accesses @23656180
system.cpu7: completed 60000 read accesses @23659550
system.cpu6: completed 70000 read accesses @27345980
system.cpu5: completed 70000 read accesses @27475560
system.cpu1: completed 70000 read accesses @27476270
system.cpu4: completed 70000 read accesses @27494890
system.cpu3: completed 70000 read accesses @27516530
system.cpu7: completed 70000 read accesses @27536870
system.cpu0: completed 70000 read accesses @27594710
system.cpu2: completed 70000 read accesses @27619520
system.cpu6: completed 80000 read accesses @31229530
system.cpu1: completed 80000 read accesses @31343360
system.cpu5: completed 80000 read accesses @31416330
system.cpu4: completed 80000 read accesses @31424910
system.cpu3: completed 80000 read accesses @31429580
system.cpu7: completed 80000 read accesses @31433290
system.cpu2: completed 80000 read accesses @31497820
system.cpu0: completed 80000 read accesses @31533420
system.cpu6: completed 90000 read accesses @35111970
system.cpu1: completed 90000 read accesses @35276350
system.cpu3: completed 90000 read accesses @35330230
system.cpu4: completed 90000 read accesses @35344050
system.cpu5: completed 90000 read accesses @35379990
system.cpu7: completed 90000 read accesses @35447480
system.cpu2: completed 90000 read accesses @35468940
system.cpu0: completed 90000 read accesses @35525900
system.cpu6: completed 100000 read accesses @39106650
system.cpu1: completed 10000 read, 5259 write accesses @1943940
system.cpu2: completed 10000 read, 5332 write accesses @1962761
system.cpu3: completed 10000 read, 5358 write accesses @1964980
system.cpu7: completed 10000 read, 5453 write accesses @1976539
system.cpu4: completed 10000 read, 5456 write accesses @1987569
system.cpu5: completed 10000 read, 5433 write accesses @1990190
system.cpu6: completed 10000 read, 5519 write accesses @1993800
system.cpu0: completed 10000 read, 5421 write accesses @2013689
system.cpu2: completed 20000 read, 10590 write accesses @3882080
system.cpu5: completed 20000 read, 10671 write accesses @3928400
system.cpu7: completed 20000 read, 10790 write accesses @3932180
system.cpu1: completed 20000 read, 10547 write accesses @3932310
system.cpu0: completed 20000 read, 10834 write accesses @3948113
system.cpu6: completed 20000 read, 10955 write accesses @3962050
system.cpu3: completed 20000 read, 10821 write accesses @3971009
system.cpu4: completed 20000 read, 10681 write accesses @3977300
system.cpu2: completed 30000 read, 16006 write accesses @5865020
system.cpu1: completed 30000 read, 15879 write accesses @5876820
system.cpu7: completed 30000 read, 16218 write accesses @5900140
system.cpu5: completed 30000 read, 15930 write accesses @5906200
system.cpu0: completed 30000 read, 16190 write accesses @5930280
system.cpu4: completed 30000 read, 16199 write accesses @5936740
system.cpu3: completed 30000 read, 16401 write accesses @5958400
system.cpu6: completed 30000 read, 16369 write accesses @5969590
system.cpu2: completed 40000 read, 21434 write accesses @7815170
system.cpu7: completed 40000 read, 21668 write accesses @7856120
system.cpu1: completed 40000 read, 21296 write accesses @7859890
system.cpu5: completed 40000 read, 21183 write accesses @7885749
system.cpu0: completed 40000 read, 21572 write accesses @7901159
system.cpu6: completed 40000 read, 21926 write accesses @7959459
system.cpu3: completed 40000 read, 21755 write accesses @7975160
system.cpu4: completed 40000 read, 21520 write accesses @8005850
system.cpu2: completed 50000 read, 26840 write accesses @9789230
system.cpu1: completed 50000 read, 26675 write accesses @9813220
system.cpu0: completed 50000 read, 26961 write accesses @9857191
system.cpu7: completed 50000 read, 27124 write accesses @9870470
system.cpu5: completed 50000 read, 26683 write accesses @9908920
system.cpu3: completed 50000 read, 27202 write accesses @9939500
system.cpu6: completed 50000 read, 27538 write accesses @10014701
system.cpu4: completed 50000 read, 26958 write accesses @10027591
system.cpu2: completed 60000 read, 32206 write accesses @11734940
system.cpu1: completed 60000 read, 32043 write accesses @11782013
system.cpu5: completed 60000 read, 31930 write accesses @11824240
system.cpu7: completed 60000 read, 32526 write accesses @11842030
system.cpu0: completed 60000 read, 32219 write accesses @11858030
system.cpu3: completed 60000 read, 32666 write accesses @11893660
system.cpu6: completed 60000 read, 32876 write accesses @11988610
system.cpu4: completed 60000 read, 32390 write accesses @11997042
system.cpu2: completed 70000 read, 37578 write accesses @13743359
system.cpu5: completed 70000 read, 37050 write accesses @13756570
system.cpu1: completed 70000 read, 37370 write accesses @13758070
system.cpu0: completed 70000 read, 37494 write accesses @13761040
system.cpu7: completed 70000 read, 37955 write accesses @13842700
system.cpu3: completed 70000 read, 38057 write accesses @13861012
system.cpu4: completed 70000 read, 37766 write accesses @13960260
system.cpu6: completed 70000 read, 38323 write accesses @14032912
system.cpu2: completed 80000 read, 42857 write accesses @15688757
system.cpu0: completed 80000 read, 42870 write accesses @15694240
system.cpu5: completed 80000 read, 42300 write accesses @15735600
system.cpu1: completed 80000 read, 42715 write accesses @15772000
system.cpu7: completed 80000 read, 43184 write accesses @15806450
system.cpu3: completed 80000 read, 43353 write accesses @15812610
system.cpu4: completed 80000 read, 43208 write accesses @15920280
system.cpu6: completed 80000 read, 43672 write accesses @16021870
system.cpu0: completed 90000 read, 48147 write accesses @17663030
system.cpu2: completed 90000 read, 48318 write accesses @17663170
system.cpu1: completed 90000 read, 47923 write accesses @17705777
system.cpu5: completed 90000 read, 47730 write accesses @17748050
system.cpu7: completed 90000 read, 48616 write accesses @17754820
system.cpu3: completed 90000 read, 48969 write accesses @17819630
system.cpu4: completed 90000 read, 48647 write accesses @17880960
system.cpu6: completed 90000 read, 49180 write accesses @18069050
system.cpu0: completed 100000 read, 53504 write accesses @19658320
hack: be nice to actually delete the event here

View file

@ -1,14 +1,10 @@
M5 Simulator System
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Apr 28 2011 15:03:17
M5 started Apr 28 2011 15:03:52
M5 executing on SC2B0617
command line: build/ALPHA_SE_MOESI_CMP_token/m5.opt -d build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token
gem5 compiled Jun 30 2011 15:37:32
gem5 started Jun 30 2011 15:37:57
gem5 executing on SC2B0622
command line: build/ALPHA_SE_MOESI_CMP_token/gem5.opt -d build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_SE_MOESI_CMP_token/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 39106650 because maximum number of loads reached
Exiting @ tick 19658320 because maximum number of loads reached

View file

@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 358180 # Number of bytes of host memory used
host_seconds 393.50 # Real time elapsed on the host
host_tick_rate 99381 # Simulator tick rate (ticks/s)
sim_seconds 0.019658 # Number of seconds simulated
sim_ticks 19658320 # Number of ticks simulated
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.039107 # Number of seconds simulated
sim_ticks 39106650 # Number of ticks simulated
host_tick_rate 112174 # Simulator tick rate (ticks/s)
host_mem_usage 358892 # Number of bytes of host memory used
host_seconds 175.25 # Real time elapsed on the host
system.cpu0.num_reads 100000 # number of read accesses completed
system.cpu0.num_writes 53504 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu0.num_reads 99196 # number of read accesses completed
system.cpu0.num_writes 53578 # number of write accesses completed
system.cpu1.num_reads 99869 # number of read accesses completed
system.cpu1.num_writes 53121 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99823 # number of read accesses completed
system.cpu1.num_writes 53492 # number of write accesses completed
system.cpu2.num_reads 99994 # number of read accesses completed
system.cpu2.num_writes 53565 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 99265 # number of read accesses completed
system.cpu2.num_writes 53864 # number of write accesses completed
system.cpu3.num_reads 99591 # number of read accesses completed
system.cpu3.num_writes 54122 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99502 # number of read accesses completed
system.cpu3.num_writes 53622 # number of write accesses completed
system.cpu4.num_reads 98976 # number of read accesses completed
system.cpu4.num_writes 53568 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99629 # number of read accesses completed
system.cpu4.num_writes 53849 # number of write accesses completed
system.cpu5.num_reads 99562 # number of read accesses completed
system.cpu5.num_writes 52869 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99563 # number of read accesses completed
system.cpu5.num_writes 53328 # number of write accesses completed
system.cpu6.num_reads 98114 # number of read accesses completed
system.cpu6.num_writes 53480 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 100000 # number of read accesses completed
system.cpu6.num_writes 53550 # number of write accesses completed
system.cpu7.num_reads 99618 # number of read accesses completed
system.cpu7.num_writes 53886 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 99336 # number of read accesses completed
system.cpu7.num_writes 53387 # number of write accesses completed
---------- End Simulation Statistics ----------

View file

@ -25,14 +25,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[0]
test=system.ruby.cpu_ruby_ports0.port[0]
test=system.l1_cntrl0.sequencer.port[0]
[system.cpu1]
type=MemTest
@ -41,14 +42,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[1]
test=system.ruby.cpu_ruby_ports1.port[0]
test=system.l1_cntrl1.sequencer.port[0]
[system.cpu2]
type=MemTest
@ -57,14 +59,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[2]
test=system.ruby.cpu_ruby_ports2.port[0]
test=system.l1_cntrl2.sequencer.port[0]
[system.cpu3]
type=MemTest
@ -73,14 +76,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[3]
test=system.ruby.cpu_ruby_ports3.port[0]
test=system.l1_cntrl3.sequencer.port[0]
[system.cpu4]
type=MemTest
@ -89,14 +93,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[4]
test=system.ruby.cpu_ruby_ports4.port[0]
test=system.l1_cntrl4.sequencer.port[0]
[system.cpu5]
type=MemTest
@ -105,14 +110,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[5]
test=system.ruby.cpu_ruby_ports5.port[0]
test=system.l1_cntrl5.sequencer.port[0]
[system.cpu6]
type=MemTest
@ -121,14 +127,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[6]
test=system.ruby.cpu_ruby_ports6.port[0]
test=system.l1_cntrl6.sequencer.port[0]
[system.cpu7]
type=MemTest
@ -137,14 +144,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[7]
test=system.ruby.cpu_ruby_ports7.port[0]
test=system.l1_cntrl7.sequencer.port[0]
[system.dir_cntrl0]
type=Directory_Controller
@ -159,6 +167,7 @@ number_of_TBEs=256
probeFilter=system.dir_cntrl0.probeFilter
probe_filter_enabled=false
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
@ -211,7 +220,7 @@ port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system
[system.l1_cntrl0]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
L2cacheMemory=system.l1_cntrl0.L2cacheMemory
@ -223,7 +232,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports0
ruby_system=system.ruby
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
@ -251,9 +261,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
L2cacheMemory=system.l1_cntrl1.L2cacheMemory
@ -265,7 +290,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports1
ruby_system=system.ruby
sequencer=system.l1_cntrl1.sequencer
transitions_per_cycle=32
version=1
@ -293,9 +319,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory
L2cacheMemory=system.l1_cntrl2.L2cacheMemory
@ -307,7 +348,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports2
ruby_system=system.ruby
sequencer=system.l1_cntrl2.sequencer
transitions_per_cycle=32
version=2
@ -335,9 +377,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory
L2cacheMemory=system.l1_cntrl3.L2cacheMemory
@ -349,7 +406,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports3
ruby_system=system.ruby
sequencer=system.l1_cntrl3.sequencer
transitions_per_cycle=32
version=3
@ -377,9 +435,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory
L2cacheMemory=system.l1_cntrl4.L2cacheMemory
@ -391,7 +464,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports4
ruby_system=system.ruby
sequencer=system.l1_cntrl4.sequencer
transitions_per_cycle=32
version=4
@ -419,9 +493,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory
L2cacheMemory=system.l1_cntrl5.L2cacheMemory
@ -433,7 +522,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports5
ruby_system=system.ruby
sequencer=system.l1_cntrl5.sequencer
transitions_per_cycle=32
version=5
@ -461,9 +551,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory
L2cacheMemory=system.l1_cntrl6.L2cacheMemory
@ -475,7 +580,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports6
ruby_system=system.ruby
sequencer=system.l1_cntrl6.sequencer
transitions_per_cycle=32
version=6
@ -503,9 +609,24 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
children=L1DcacheMemory L1IcacheMemory L2cacheMemory
children=L1DcacheMemory L1IcacheMemory L2cacheMemory sequencer
L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory
L2cacheMemory=system.l1_cntrl7.L2cacheMemory
@ -517,7 +638,8 @@ l2_cache_hit_latency=10
no_mig_atomic=true
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports7
ruby_system=system.ruby
sequencer=system.l1_cntrl7.sequencer
transitions_per_cycle=32
version=7
@ -545,6 +667,21 @@ replacement_policy=PSEUDO_LRU
size=512
start_index_bit=6
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.physmem]
type=PhysicalMemory
file=
@ -553,133 +690,18 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.cpu_ruby_ports0.physMemPort system.ruby.cpu_ruby_ports1.physMemPort system.ruby.cpu_ruby_ports2.physMemPort system.ruby.cpu_ruby_ports3.physMemPort system.ruby.cpu_ruby_ports4.physMemPort system.ruby.cpu_ruby_ports5.physMemPort system.ruby.cpu_ruby_ports6.physMemPort system.ruby.cpu_ruby_ports7.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort system.l1_cntrl1.sequencer.physMemPort system.l1_cntrl2.sequencer.physMemPort system.l1_cntrl3.sequencer.physMemPort system.l1_cntrl4.sequencer.physMemPort system.l1_cntrl5.sequencer.physMemPort system.l1_cntrl6.sequencer.physMemPort system.l1_cntrl7.sequencer.physMemPort
[system.ruby]
type=RubySystem
children=cpu_ruby_ports0 cpu_ruby_ports1 cpu_ruby_ports2 cpu_ruby_ports3 cpu_ruby_ports4 cpu_ruby_ports5 cpu_ruby_ports6 cpu_ruby_ports7 network profiler tracer
children=network profiler tracer
block_size_bytes=64
clock=1
mem_size=134217728
network=system.ruby.network
no_mem_vec=false
profiler=system.ruby.profiler
random_seed=1234
randomization=false
stats_filename=ruby.stats
tracer=system.ruby.tracer
[system.ruby.cpu_ruby_ports0]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.ruby.cpu_ruby_ports1]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl1.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.ruby.cpu_ruby_ports2]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl2.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.ruby.cpu_ruby_ports3]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl3.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.ruby.cpu_ruby_ports4]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl4.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.ruby.cpu_ruby_ports5]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl5.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.ruby.cpu_ruby_ports6]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl6.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.ruby.cpu_ruby_ports7]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl7.L1DcacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.L1IcacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.ruby.network]
type=SimpleNetwork
@ -689,6 +711,7 @@ buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
@ -907,8 +930,10 @@ type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=8
ruby_system=system.ruby
[system.ruby.tracer]
type=RubyTracer
ruby_system=system.ruby
warmup_length=100000

View file

@ -1,74 +1,74 @@
system.cpu4: completed 10000 read accesses @3778879
system.cpu7: completed 10000 read accesses @3828349
system.cpu6: completed 10000 read accesses @3830789
system.cpu5: completed 10000 read accesses @3842829
system.cpu3: completed 10000 read accesses @3854909
system.cpu2: completed 10000 read accesses @3855489
system.cpu0: completed 10000 read accesses @3862129
system.cpu1: completed 10000 read accesses @3879479
system.cpu7: completed 20000 read accesses @7625319
system.cpu6: completed 20000 read accesses @7629029
system.cpu2: completed 20000 read accesses @7631609
system.cpu5: completed 20000 read accesses @7631629
system.cpu4: completed 20000 read accesses @7633209
system.cpu1: completed 20000 read accesses @7684185
system.cpu3: completed 20000 read accesses @7689729
system.cpu0: completed 20000 read accesses @7708279
system.cpu4: completed 30000 read accesses @11450269
system.cpu6: completed 30000 read accesses @11456709
system.cpu5: completed 30000 read accesses @11475169
system.cpu7: completed 30000 read accesses @11482899
system.cpu2: completed 30000 read accesses @11502059
system.cpu1: completed 30000 read accesses @11514086
system.cpu3: completed 30000 read accesses @11521339
system.cpu0: completed 30000 read accesses @11542969
system.cpu4: completed 40000 read accesses @15255969
system.cpu6: completed 40000 read accesses @15278669
system.cpu2: completed 40000 read accesses @15290769
system.cpu1: completed 40000 read accesses @15300319
system.cpu7: completed 40000 read accesses @15313589
system.cpu5: completed 40000 read accesses @15390579
system.cpu3: completed 40000 read accesses @15390819
system.cpu0: completed 40000 read accesses @15399559
system.cpu6: completed 50000 read accesses @19059809
system.cpu2: completed 50000 read accesses @19122329
system.cpu4: completed 50000 read accesses @19145469
system.cpu1: completed 50000 read accesses @19153539
system.cpu7: completed 50000 read accesses @19223169
system.cpu3: completed 50000 read accesses @19226049
system.cpu0: completed 50000 read accesses @19230099
system.cpu5: completed 50000 read accesses @19239419
system.cpu6: completed 60000 read accesses @22898929
system.cpu2: completed 60000 read accesses @22938119
system.cpu1: completed 60000 read accesses @22962849
system.cpu4: completed 60000 read accesses @22981819
system.cpu7: completed 60000 read accesses @23024057
system.cpu5: completed 60000 read accesses @23033999
system.cpu3: completed 60000 read accesses @23067579
system.cpu0: completed 60000 read accesses @23093579
system.cpu6: completed 70000 read accesses @26691269
system.cpu2: completed 70000 read accesses @26721679
system.cpu1: completed 70000 read accesses @26772899
system.cpu5: completed 70000 read accesses @26828129
system.cpu4: completed 70000 read accesses @26855529
system.cpu7: completed 70000 read accesses @26884089
system.cpu0: completed 70000 read accesses @26900219
system.cpu3: completed 70000 read accesses @26900829
system.cpu6: completed 80000 read accesses @30482859
system.cpu2: completed 80000 read accesses @30507709
system.cpu1: completed 80000 read accesses @30533719
system.cpu4: completed 80000 read accesses @30653069
system.cpu5: completed 80000 read accesses @30669589
system.cpu7: completed 80000 read accesses @30671399
system.cpu3: completed 80000 read accesses @30690249
system.cpu0: completed 80000 read accesses @30769769
system.cpu1: completed 90000 read accesses @34345799
system.cpu2: completed 90000 read accesses @34348669
system.cpu6: completed 90000 read accesses @34356669
system.cpu4: completed 90000 read accesses @34461309
system.cpu5: completed 90000 read accesses @34516129
system.cpu7: completed 90000 read accesses @34533379
system.cpu3: completed 90000 read accesses @34557649
system.cpu0: completed 90000 read accesses @34612149
system.cpu2: completed 100000 read accesses @38145419
system.cpu2: completed 10000 read, 5303 write accesses @1876789
system.cpu6: completed 10000 read, 5467 write accesses @1901719
system.cpu1: completed 10000 read, 5435 write accesses @1922051
system.cpu7: completed 10000 read, 5297 write accesses @1933459
system.cpu4: completed 10000 read, 5524 write accesses @1940138
system.cpu5: completed 10000 read, 5406 write accesses @1942088
system.cpu0: completed 10000 read, 5366 write accesses @1952899
system.cpu3: completed 10000 read, 5440 write accesses @1977948
system.cpu4: completed 20000 read, 10787 write accesses @3784460
system.cpu6: completed 20000 read, 10802 write accesses @3793699
system.cpu2: completed 20000 read, 10675 write accesses @3812149
system.cpu5: completed 20000 read, 10824 write accesses @3843809
system.cpu7: completed 20000 read, 10635 write accesses @3848309
system.cpu1: completed 20000 read, 10760 write accesses @3864739
system.cpu0: completed 20000 read, 10677 write accesses @3867909
system.cpu3: completed 20000 read, 10802 write accesses @3932189
system.cpu4: completed 30000 read, 16195 write accesses @5712798
system.cpu2: completed 30000 read, 16031 write accesses @5729519
system.cpu5: completed 30000 read, 16208 write accesses @5744739
system.cpu1: completed 30000 read, 16141 write accesses @5773879
system.cpu7: completed 30000 read, 16141 write accesses @5780239
system.cpu6: completed 30000 read, 16232 write accesses @5784103
system.cpu0: completed 30000 read, 16012 write accesses @5799238
system.cpu3: completed 30000 read, 16245 write accesses @5831409
system.cpu5: completed 40000 read, 21576 write accesses @7645389
system.cpu2: completed 40000 read, 21332 write accesses @7669349
system.cpu4: completed 40000 read, 21616 write accesses @7685173
system.cpu1: completed 40000 read, 21665 write accesses @7712158
system.cpu0: completed 40000 read, 21358 write accesses @7717389
system.cpu6: completed 40000 read, 21602 write accesses @7718461
system.cpu3: completed 40000 read, 21484 write accesses @7735829
system.cpu7: completed 40000 read, 21641 write accesses @7781308
system.cpu2: completed 50000 read, 26834 write accesses @9615299
system.cpu0: completed 50000 read, 26760 write accesses @9622459
system.cpu3: completed 50000 read, 26814 write accesses @9627019
system.cpu5: completed 50000 read, 27114 write accesses @9630983
system.cpu4: completed 50000 read, 27066 write accesses @9656028
system.cpu6: completed 50000 read, 27209 write accesses @9657908
system.cpu1: completed 50000 read, 27012 write accesses @9661059
system.cpu7: completed 50000 read, 26974 write accesses @9754120
system.cpu2: completed 60000 read, 32159 write accesses @11510528
system.cpu5: completed 60000 read, 32406 write accesses @11518191
system.cpu6: completed 60000 read, 32617 write accesses @11553009
system.cpu3: completed 60000 read, 32203 write accesses @11554678
system.cpu0: completed 60000 read, 32053 write accesses @11566058
system.cpu1: completed 60000 read, 32501 write accesses @11568721
system.cpu4: completed 60000 read, 32470 write accesses @11604588
system.cpu7: completed 60000 read, 32381 write accesses @11680099
system.cpu2: completed 70000 read, 37529 write accesses @13430348
system.cpu5: completed 70000 read, 37835 write accesses @13440518
system.cpu6: completed 70000 read, 37972 write accesses @13479051
system.cpu3: completed 70000 read, 37489 write accesses @13479829
system.cpu0: completed 70000 read, 37464 write accesses @13498959
system.cpu4: completed 70000 read, 37713 write accesses @13503400
system.cpu1: completed 70000 read, 37879 write accesses @13506829
system.cpu7: completed 70000 read, 37696 write accesses @13588959
system.cpu2: completed 80000 read, 42898 write accesses @15336919
system.cpu3: completed 80000 read, 42777 write accesses @15361220
system.cpu5: completed 80000 read, 43096 write accesses @15388319
system.cpu4: completed 80000 read, 42937 write accesses @15407799
system.cpu0: completed 80000 read, 42740 write accesses @15414688
system.cpu6: completed 80000 read, 43294 write accesses @15425669
system.cpu1: completed 80000 read, 43269 write accesses @15452049
system.cpu7: completed 80000 read, 42960 write accesses @15504918
system.cpu2: completed 90000 read, 48377 write accesses @17274228
system.cpu3: completed 90000 read, 48234 write accesses @17290569
system.cpu5: completed 90000 read, 48524 write accesses @17330090
system.cpu6: completed 90000 read, 48654 write accesses @17333398
system.cpu0: completed 90000 read, 48119 write accesses @17336459
system.cpu4: completed 90000 read, 48219 write accesses @17373599
system.cpu1: completed 90000 read, 48746 write accesses @17384429
system.cpu7: completed 90000 read, 48558 write accesses @17482399
system.cpu2: completed 100000 read, 53807 write accesses @19206609
hack: be nice to actually delete the event here

View file

@ -1,14 +1,10 @@
M5 Simulator System
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Apr 28 2011 15:11:39
M5 started Apr 28 2011 15:12:18
M5 executing on SC2B0617
command line: build/ALPHA_SE_MOESI_hammer/m5.opt -d build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
gem5 compiled Jun 30 2011 15:20:24
gem5 started Jun 30 2011 15:20:49
gem5 executing on SC2B0622
command line: build/ALPHA_SE_MOESI_hammer/gem5.opt -d build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_SE_MOESI_hammer/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 38145419 because maximum number of loads reached
Exiting @ tick 19206609 because maximum number of loads reached

View file

@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 357828 # Number of bytes of host memory used
host_seconds 324.05 # Real time elapsed on the host
host_tick_rate 117713 # Simulator tick rate (ticks/s)
sim_seconds 0.019207 # Number of seconds simulated
sim_ticks 19206609 # Number of ticks simulated
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.038145 # Number of seconds simulated
sim_ticks 38145419 # Number of ticks simulated
host_tick_rate 127969 # Simulator tick rate (ticks/s)
host_mem_usage 358544 # Number of bytes of host memory used
host_seconds 150.09 # Real time elapsed on the host
system.cpu0.num_reads 99703 # number of read accesses completed
system.cpu0.num_writes 53386 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu0.num_reads 99257 # number of read accesses completed
system.cpu0.num_writes 53554 # number of write accesses completed
system.cpu1.num_reads 99601 # number of read accesses completed
system.cpu1.num_writes 53869 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99995 # number of read accesses completed
system.cpu1.num_writes 53572 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 100000 # number of read accesses completed
system.cpu2.num_writes 53729 # number of write accesses completed
system.cpu2.num_writes 53807 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99908 # number of read accesses completed
system.cpu3.num_writes 53597 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99293 # number of read accesses completed
system.cpu3.num_writes 53868 # number of write accesses completed
system.cpu4.num_reads 99417 # number of read accesses completed
system.cpu4.num_writes 53278 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99739 # number of read accesses completed
system.cpu4.num_writes 53344 # number of write accesses completed
system.cpu5.num_reads 99735 # number of read accesses completed
system.cpu5.num_writes 53654 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99344 # number of read accesses completed
system.cpu5.num_writes 53849 # number of write accesses completed
system.cpu6.num_reads 99876 # number of read accesses completed
system.cpu6.num_writes 53791 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 99736 # number of read accesses completed
system.cpu6.num_writes 53566 # number of write accesses completed
system.cpu7.num_reads 98943 # number of read accesses completed
system.cpu7.num_writes 53425 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 99487 # number of read accesses completed
system.cpu7.num_writes 53455 # number of write accesses completed
---------- End Simulation Statistics ----------

View file

@ -25,14 +25,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[0]
test=system.ruby.cpu_ruby_ports0.port[0]
test=system.l1_cntrl0.sequencer.port[0]
[system.cpu1]
type=MemTest
@ -41,14 +42,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[1]
test=system.ruby.cpu_ruby_ports1.port[0]
test=system.l1_cntrl1.sequencer.port[0]
[system.cpu2]
type=MemTest
@ -57,14 +59,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[2]
test=system.ruby.cpu_ruby_ports2.port[0]
test=system.l1_cntrl2.sequencer.port[0]
[system.cpu3]
type=MemTest
@ -73,14 +76,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[3]
test=system.ruby.cpu_ruby_ports3.port[0]
test=system.l1_cntrl3.sequencer.port[0]
[system.cpu4]
type=MemTest
@ -89,14 +93,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[4]
test=system.ruby.cpu_ruby_ports4.port[0]
test=system.l1_cntrl4.sequencer.port[0]
[system.cpu5]
type=MemTest
@ -105,14 +110,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[5]
test=system.ruby.cpu_ruby_ports5.port[0]
test=system.l1_cntrl5.sequencer.port[0]
[system.cpu6]
type=MemTest
@ -121,14 +127,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[6]
test=system.ruby.cpu_ruby_ports6.port[0]
test=system.l1_cntrl6.sequencer.port[0]
[system.cpu7]
type=MemTest
@ -137,14 +144,15 @@ issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=0
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=0
progress_interval=10000
suppress_func_warnings=true
trace_addr=0
functional=system.funcmem.port[7]
test=system.ruby.cpu_ruby_ports7.port[0]
test=system.l1_cntrl7.sequencer.port[0]
[system.dir_cntrl0]
type=Directory_Controller
@ -156,6 +164,7 @@ directory_latency=12
memBuffer=system.dir_cntrl0.memBuffer
number_of_TBEs=256
recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=32
version=0
@ -200,7 +209,7 @@ port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system
[system.l1_cntrl0]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl0.cacheMemory
cache_response_latency=12
@ -208,7 +217,8 @@ cntrl_id=0
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports0
ruby_system=system.ruby
sequencer=system.l1_cntrl0.sequencer
transitions_per_cycle=32
version=0
@ -220,9 +230,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl0.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl1.cacheMemory
cache_response_latency=12
@ -230,7 +255,8 @@ cntrl_id=1
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports1
ruby_system=system.ruby
sequencer=system.l1_cntrl1.sequencer
transitions_per_cycle=32
version=1
@ -242,9 +268,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl1.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl2.cacheMemory
cache_response_latency=12
@ -252,7 +293,8 @@ cntrl_id=2
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports2
ruby_system=system.ruby
sequencer=system.l1_cntrl2.sequencer
transitions_per_cycle=32
version=2
@ -264,9 +306,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl2.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl3.cacheMemory
cache_response_latency=12
@ -274,7 +331,8 @@ cntrl_id=3
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports3
ruby_system=system.ruby
sequencer=system.l1_cntrl3.sequencer
transitions_per_cycle=32
version=3
@ -286,9 +344,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl3.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl4.cacheMemory
cache_response_latency=12
@ -296,7 +369,8 @@ cntrl_id=4
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports4
ruby_system=system.ruby
sequencer=system.l1_cntrl4.sequencer
transitions_per_cycle=32
version=4
@ -308,9 +382,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl4.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl5.cacheMemory
cache_response_latency=12
@ -318,7 +407,8 @@ cntrl_id=5
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports5
ruby_system=system.ruby
sequencer=system.l1_cntrl5.sequencer
transitions_per_cycle=32
version=5
@ -330,9 +420,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl5.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl6.cacheMemory
cache_response_latency=12
@ -340,7 +445,8 @@ cntrl_id=6
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports6
ruby_system=system.ruby
sequencer=system.l1_cntrl6.sequencer
transitions_per_cycle=32
version=6
@ -352,9 +458,24 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl6.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
children=cacheMemory
children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.l1_cntrl7.cacheMemory
cache_response_latency=12
@ -362,7 +483,8 @@ cntrl_id=7
issue_latency=2
number_of_TBEs=256
recycle_latency=10
sequencer=system.ruby.cpu_ruby_ports7
ruby_system=system.ruby
sequencer=system.l1_cntrl7.sequencer
transitions_per_cycle=32
version=7
@ -374,6 +496,21 @@ replacement_policy=PSEUDO_LRU
size=256
start_index_bit=6
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false
dcache=system.l1_cntrl7.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
ruby_system=system.ruby
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.physmem]
type=PhysicalMemory
file=
@ -382,133 +519,18 @@ latency_var=0
null=false
range=0:134217727
zero=false
port=system.ruby.cpu_ruby_ports0.physMemPort system.ruby.cpu_ruby_ports1.physMemPort system.ruby.cpu_ruby_ports2.physMemPort system.ruby.cpu_ruby_ports3.physMemPort system.ruby.cpu_ruby_ports4.physMemPort system.ruby.cpu_ruby_ports5.physMemPort system.ruby.cpu_ruby_ports6.physMemPort system.ruby.cpu_ruby_ports7.physMemPort
port=system.l1_cntrl0.sequencer.physMemPort system.l1_cntrl1.sequencer.physMemPort system.l1_cntrl2.sequencer.physMemPort system.l1_cntrl3.sequencer.physMemPort system.l1_cntrl4.sequencer.physMemPort system.l1_cntrl5.sequencer.physMemPort system.l1_cntrl6.sequencer.physMemPort system.l1_cntrl7.sequencer.physMemPort
[system.ruby]
type=RubySystem
children=cpu_ruby_ports0 cpu_ruby_ports1 cpu_ruby_ports2 cpu_ruby_ports3 cpu_ruby_ports4 cpu_ruby_ports5 cpu_ruby_ports6 cpu_ruby_ports7 network profiler tracer
children=network profiler tracer
block_size_bytes=64
clock=1
mem_size=134217728
network=system.ruby.network
no_mem_vec=false
profiler=system.ruby.profiler
random_seed=1234
randomization=false
stats_filename=ruby.stats
tracer=system.ruby.tracer
[system.ruby.cpu_ruby_ports0]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl0.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl0.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=0
physMemPort=system.physmem.port[0]
port=system.cpu0.test
[system.ruby.cpu_ruby_ports1]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl1.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl1.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=1
physMemPort=system.physmem.port[1]
port=system.cpu1.test
[system.ruby.cpu_ruby_ports2]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl2.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl2.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=2
physMemPort=system.physmem.port[2]
port=system.cpu2.test
[system.ruby.cpu_ruby_ports3]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl3.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl3.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=3
physMemPort=system.physmem.port[3]
port=system.cpu3.test
[system.ruby.cpu_ruby_ports4]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl4.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl4.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=4
physMemPort=system.physmem.port[4]
port=system.cpu4.test
[system.ruby.cpu_ruby_ports5]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl5.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl5.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=5
physMemPort=system.physmem.port[5]
port=system.cpu5.test
[system.ruby.cpu_ruby_ports6]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl6.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl6.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=6
physMemPort=system.physmem.port[6]
port=system.cpu6.test
[system.ruby.cpu_ruby_ports7]
type=RubySequencer
access_phys_mem=true
dcache=system.l1_cntrl7.cacheMemory
deadlock_threshold=1000000
icache=system.l1_cntrl7.cacheMemory
max_outstanding_requests=16
physmem=system.physmem
using_network_tester=false
using_ruby_tester=false
version=7
physMemPort=system.physmem.port[7]
port=system.cpu7.test
[system.ruby.network]
type=SimpleNetwork
@ -518,6 +540,7 @@ buffer_size=0
control_msg_size=8
endpoint_bandwidth=1000
number_of_virtual_networks=10
ruby_system=system.ruby
topology=system.ruby.network.topology
[system.ruby.network.topology]
@ -736,8 +759,10 @@ type=RubyProfiler
all_instructions=false
hot_lines=false
num_of_sequencers=8
ruby_system=system.ruby
[system.ruby.tracer]
type=RubyTracer
ruby_system=system.ruby
warmup_length=100000

View file

@ -34,29 +34,29 @@ periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
Real time: Apr/28/2011 14:30:39
Real time: Jun/30/2011 15:06:19
Profiler Stats
--------------
Elapsed_time_in_seconds: 118
Elapsed_time_in_minutes: 1.96667
Elapsed_time_in_hours: 0.0327778
Elapsed_time_in_days: 0.00136574
Elapsed_time_in_seconds: 56
Elapsed_time_in_minutes: 0.933333
Elapsed_time_in_hours: 0.0155556
Elapsed_time_in_days: 0.000648148
Virtual_time_in_seconds: 118.52
Virtual_time_in_minutes: 1.97533
Virtual_time_in_hours: 0.0329222
Virtual_time_in_days: 0.00137176
Virtual_time_in_seconds: 56.03
Virtual_time_in_minutes: 0.933833
Virtual_time_in_hours: 0.0155639
Virtual_time_in_days: 0.000648495
Ruby_current_time: 57055090
Ruby_current_time: 28725020
Ruby_start_time: 0
Ruby_cycles: 57055090
Ruby_cycles: 28725020
mbytes_resident: 37.8164
mbytes_total: 349.336
resident_ratio: 0.108275
mbytes_resident: 38.0742
mbytes_total: 349.754
resident_ratio: 0.10886
ruby_cycles_executed: [ 57055091 57055091 57055091 57055091 57055091 57055091 57055091 57055091 ]
ruby_cycles_executed: [ 28725021 28725021 28725021 28725021 28725021 28725021 28725021 28725021 ]
Busy Controller Counts:
L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
@ -66,29 +66,29 @@ Directory-0:0
Busy Bank Count:0
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1223186 average: 15.9992 | standard deviation: 0.0900554 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1223066 ]
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 615998 average: 15.9984 | standard deviation: 0.126895 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 615878 ]
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
miss_latency: [binsize: 128 max: 16710 count: 1223058 average: 5970.81 | standard deviation: 6247.68 | 0 5 5 5 5 5 5 5 3 0 6 4 4 17 30 62 116 192 365 508 831 1304 2021 2988 3516 5462 7628 8955 10900 13254 17715 19297 22175 27647 27539 31110 34478 40126 39446 36816 44021 47568 44293 43929 44544 47606 42657 42360 44775 37578 36515 36061 36913 31421 25978 28119 27128 22462 20497 18670 18218 14995 13739 13345 10406 9212 8611 8186 6744 5154 5354 4849 3704 3156 2851 2622 1932 1766 1731 1261 1081 1005 890 710 525 543 475 355 261 252 242 193 142 160 92 103 74 79 60 55 34 49 32 25 22 28 4 16 14 6 9 11 4 2 5 4 1 2 0 3 1 0 3 2 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD: [binsize: 128 max: 16510 count: 795046 average: 5972.01 | standard deviation: 5587.89 | 0 4 4 4 4 4 4 4 1 0 1 3 3 10 17 39 73 121 238 323 544 870 1273 1989 2304 3514 4951 5820 7034 8605 11545 12570 14421 18015 17864 20148 22587 26062 25651 23904 28541 30856 28693 28624 28883 30953 27530 27626 29120 24340 23687 23373 23951 20582 16850 18264 17699 14690 13377 12253 11977 9671 9022 8623 6733 5927 5608 5306 4362 3395 3476 3155 2445 2019 1835 1732 1227 1138 1145 828 722 643 588 477 357 351 296 248 167 169 153 129 90 112 64 82 52 49 38 32 24 31 23 17 15 21 4 9 8 3 5 8 2 1 3 2 1 1 0 2 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST: [binsize: 128 max: 16710 count: 428012 average: 5968.58 | standard deviation: 1425.71 | 0 1 1 1 1 1 1 1 2 0 5 1 1 7 13 23 43 71 127 185 287 434 748 999 1212 1948 2677 3135 3866 4649 6170 6727 7754 9632 9675 10962 11891 14064 13795 12912 15480 16712 15600 15305 15661 16653 15127 14734 15655 13238 12828 12688 12962 10839 9128 9855 9429 7772 7120 6417 6241 5324 4717 4722 3673 3285 3003 2880 2382 1759 1878 1694 1259 1137 1016 890 705 628 586 433 359 362 302 233 168 192 179 107 94 83 89 64 52 48 28 21 22 30 22 23 10 18 9 8 7 7 0 7 6 3 4 3 2 1 2 2 0 1 0 1 1 0 3 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_Directory: [binsize: 128 max: 16710 count: 1206540 average: 5977.03 | standard deviation: 6328.62 | 0 5 5 5 5 5 5 5 3 0 6 4 3 15 29 58 108 183 348 481 792 1259 1946 2890 3403 5293 7409 8715 10621 12918 17326 18881 21750 27153 27002 30601 33899 39474 38840 36202 43398 46842 43651 43395 43924 47009 42152 41921 44315 37118 36104 35689 36547 31115 25691 27834 26879 22267 20324 18486 18065 14884 13629 13252 10303 9132 8536 8126 6678 5109 5313 4809 3673 3136 2823 2604 1918 1753 1720 1252 1072 996 883 704 520 541 472 352 260 251 239 193 141 159 91 103 73 78 59 54 32 48 32 25 22 28 4 16 14 6 9 10 4 2 5 4 1 2 0 3 1 0 3 2 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_L1Cache_wCC: [binsize: 128 max: 14292 count: 16518 average: 5516.81 | standard deviation: 1404.63 | 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 4 8 9 17 27 39 45 75 98 113 169 219 240 279 336 389 416 425 494 537 509 579 652 606 614 623 726 642 534 620 597 505 439 460 460 411 372 366 306 287 285 249 195 173 184 153 111 110 93 103 80 75 60 66 45 41 40 31 20 28 18 14 13 11 9 9 9 7 6 5 2 3 3 1 1 3 0 1 1 1 0 1 1 1 1 2 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency: [binsize: 128 max: 17550 count: 615870 average: 5969.46 | standard deviation: 7116.59 | 0 4 6 6 5 4 5 1 5 4 3 6 4 5 21 31 46 90 169 235 418 648 1027 1394 1760 2694 3780 4717 5558 6535 8753 9589 11125 13750 13954 15292 17133 20395 19978 18654 22068 23938 22152 22290 22426 24096 21689 21471 22547 19077 18860 18264 18773 15923 13248 14135 13631 11388 10257 9512 9377 7381 6802 6677 5240 4722 4293 4074 3235 2564 2639 2296 1833 1614 1375 1233 1052 854 776 591 544 492 453 330 284 288 215 200 140 122 116 82 91 55 52 34 38 32 20 19 15 17 10 8 11 3 5 4 3 1 0 0 1 2 2 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD: [binsize: 128 max: 17550 count: 400035 average: 5968.22 | standard deviation: 1417.97 | 0 4 3 5 3 2 4 1 2 2 1 2 2 4 14 21 27 59 108 148 275 433 688 907 1155 1771 2429 3013 3676 4199 5764 6270 7293 8986 9054 9918 11064 13179 12948 12115 14336 15590 14383 14461 14549 15708 14037 13915 14593 12436 12325 11870 12195 10304 8534 9247 8896 7405 6689 6174 6004 4768 4401 4309 3422 3106 2791 2621 2096 1647 1749 1478 1176 1060 878 801 692 570 497 397 361 314 289 233 190 190 131 126 85 78 64 59 58 30 29 16 25 20 14 11 10 13 6 4 6 2 3 1 1 0 0 0 1 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST: [binsize: 128 max: 16420 count: 215835 average: 5971.76 | standard deviation: 1418.95 | 0 0 3 1 2 2 1 0 3 2 2 4 2 1 7 10 19 31 61 87 143 215 339 487 605 923 1351 1704 1882 2336 2989 3319 3832 4764 4900 5374 6069 7216 7030 6539 7732 8348 7769 7829 7877 8388 7652 7556 7954 6641 6535 6394 6578 5619 4714 4888 4735 3983 3568 3338 3373 2613 2401 2368 1818 1616 1502 1453 1139 917 890 818 657 554 497 432 360 284 279 194 183 178 164 97 94 98 84 74 55 44 52 23 33 25 23 18 13 12 6 8 5 4 4 4 5 1 2 3 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_Directory: [binsize: 128 max: 17550 count: 607509 average: 5975.88 | standard deviation: 7210.5 | 0 4 6 6 5 4 5 1 5 4 2 6 4 5 17 27 42 88 158 222 402 618 977 1328 1698 2630 3655 4589 5430 6369 8536 9419 10886 13519 13647 15042 16854 20026 19684 18343 21765 23626 21819 22017 22137 23782 21417 21230 22311 18836 18644 18063 18598 15763 13119 14010 13517 11272 10178 9410 9289 7324 6756 6627 5186 4688 4257 4046 3210 2538 2620 2281 1809 1600 1365 1221 1045 850 772 587 539 484 451 326 282 287 213 200 140 121 112 80 90 55 52 34 38 32 20 19 15 17 10 8 11 3 5 4 3 1 0 0 1 2 2 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_L1Cache_wCC: [binsize: 64 max: 11892 count: 8361 average: 5503.07 | standard deviation: 1405.32 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 2 2 2 1 3 0 2 5 6 7 6 10 6 16 14 19 31 39 27 26 36 23 41 67 58 59 69 63 65 72 94 106 111 94 76 113 126 110 121 152 155 134 116 137 142 173 196 157 137 171 140 153 150 150 162 167 166 135 138 142 147 168 146 131 141 113 128 99 137 136 105 110 106 88 113 83 92 85 75 72 57 65 60 51 63 66 50 39 40 51 51 44 44 31 26 20 26 28 22 29 25 18 16 22 14 12 16 13 12 15 11 12 7 7 8 15 9 5 9 4 6 7 5 4 3 3 1 2 2 3 1 3 2 4 4 1 1 2 2 2 0 1 0 0 2 0 0 0 0 1 0 3 1 1 1 0 1 ]
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
imcomplete_wCC_Times: 16518
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 8 average: 0 | standard deviation: 0 | 8 ]
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 8 average: 0 | standard deviation: 0 | 8 ]
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 8 average: 0 | standard deviation: 0 | 8 ]
miss_latency_dir_first_response_to_completion: [binsize: 4 max: 569 count: 8 average: 330.25 | standard deviation: 178.281 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
imcomplete_dir_Times: 1206532
miss_latency_LD_Directory: [binsize: 128 max: 16510 count: 784313 average: 5978.03 | standard deviation: 5659.2 | 0 4 4 4 4 4 4 4 1 0 1 3 2 8 17 36 68 117 225 303 520 843 1226 1927 2239 3412 4801 5667 6831 8385 11301 12290 14152 17683 17528 19843 22213 25643 25266 23514 28132 30410 28262 28264 28495 30573 27187 27339 28820 24028 23430 23121 23711 20379 16667 18077 17534 14559 13263 12138 11874 9601 8946 8556 6658 5874 5567 5261 4316 3366 3452 3129 2425 2007 1815 1717 1221 1129 1138 820 716 637 582 474 355 349 293 245 166 168 150 129 89 111 63 82 51 49 37 31 24 31 23 17 15 21 4 9 8 3 5 7 2 1 3 2 1 1 0 2 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD_L1Cache_wCC: [binsize: 128 max: 14292 count: 10733 average: 5531.95 | standard deviation: 1414.69 | 0 0 0 0 0 0 0 0 0 0 0 0 1 2 0 3 5 4 13 20 24 27 47 62 65 102 150 153 203 220 244 280 269 332 336 305 374 419 385 390 409 446 431 360 388 380 343 287 300 312 257 252 240 203 183 187 165 131 114 115 103 70 76 67 75 53 41 45 46 29 24 26 20 12 20 15 6 9 7 8 6 6 6 3 2 2 3 3 1 1 3 0 1 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST_Directory: [binsize: 128 max: 16710 count: 422227 average: 5975.16 | standard deviation: 1425.14 | 0 1 1 1 1 1 1 1 2 0 5 1 1 7 12 22 40 66 123 178 272 416 720 963 1164 1881 2608 3048 3790 4533 6025 6591 7598 9470 9474 10758 11686 13831 13574 12688 15266 16432 15389 15131 15429 16436 14965 14582 15495 13090 12674 12568 12836 10736 9024 9757 9345 7708 7061 6348 6191 5283 4683 4696 3645 3258 2969 2865 2362 1743 1861 1680 1248 1129 1008 887 697 624 582 432 356 359 301 230 165 192 179 107 94 83 89 64 52 48 28 21 22 29 22 23 8 17 9 8 7 7 0 7 6 3 4 3 2 1 2 2 0 1 0 1 1 0 3 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST_L1Cache_wCC: [binsize: 128 max: 13038 count: 5785 average: 5488.72 | standard deviation: 1385.45 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 5 4 7 15 18 28 36 48 67 69 87 76 116 145 136 156 162 201 204 205 233 221 224 214 280 211 174 232 217 162 152 160 148 154 120 126 103 104 98 84 64 59 69 50 41 34 26 28 27 34 15 20 16 17 14 11 8 8 3 8 4 4 1 3 3 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
imcomplete_wCC_Times: 8361
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 7 average: 0 | standard deviation: 0 | 7 ]
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 7 average: 0 | standard deviation: 0 | 7 ]
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 7 average: 0 | standard deviation: 0 | 7 ]
miss_latency_dir_first_response_to_completion: [binsize: 4 max: 539 count: 7 average: 334.714 | standard deviation: 168.608 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
imcomplete_dir_Times: 607502
miss_latency_LD_Directory: [binsize: 128 max: 17550 count: 394629 average: 5974.59 | standard deviation: 1417.29 | 0 4 3 5 3 2 4 1 2 2 0 2 2 4 12 19 26 58 101 141 268 411 656 862 1113 1732 2355 2930 3601 4101 5626 6152 7140 8833 8863 9755 10888 12929 12755 11909 14133 15388 14160 14288 14352 15497 13858 13765 14436 12280 12181 11739 12073 10206 8456 9180 8819 7329 6645 6110 5948 4735 4371 4278 3389 3086 2766 2599 2081 1630 1735 1469 1159 1055 871 794 686 566 493 394 358 310 288 231 189 189 130 126 85 78 62 58 57 30 29 16 25 20 14 11 10 13 6 4 6 2 3 1 1 0 0 0 1 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_LD_L1Cache_wCC: [binsize: 64 max: 11892 count: 5406 average: 5502.87 | standard deviation: 1389.98 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 0 1 0 1 3 4 6 1 3 4 11 11 12 20 23 22 18 24 18 21 41 33 36 47 39 36 42 56 71 67 63 55 69 84 71 82 98 93 85 78 90 86 118 132 103 90 116 90 106 97 93 109 110 113 88 85 95 102 115 96 79 100 69 81 57 100 89 67 62 82 57 74 55 67 55 43 46 32 35 32 35 42 42 34 22 22 37 27 26 30 18 15 12 18 20 11 14 19 9 11 15 10 10 12 10 5 9 8 10 4 5 4 10 7 2 3 2 5 4 3 4 2 3 1 2 2 2 1 2 1 0 4 0 1 1 1 1 0 1 0 0 1 0 0 0 0 0 0 1 1 0 1 0 1 ]
miss_latency_ST_Directory: [binsize: 128 max: 16420 count: 212880 average: 5978.26 | standard deviation: 1417.67 | 0 0 3 1 2 2 1 0 3 2 2 4 2 1 5 8 16 30 57 81 134 207 321 466 585 898 1300 1659 1829 2268 2910 3267 3746 4686 4784 5287 5966 7097 6929 6434 7632 8238 7659 7729 7785 8285 7559 7465 7875 6556 6463 6324 6525 5557 4663 4830 4698 3943 3533 3300 3341 2589 2385 2349 1797 1602 1491 1447 1129 908 885 812 650 545 494 427 359 284 279 193 181 174 163 95 93 98 83 74 55 43 50 22 33 25 23 18 13 12 6 8 5 4 4 4 5 1 2 3 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
miss_latency_ST_L1Cache_wCC: [binsize: 64 max: 11673 count: 2955 average: 5503.42 | standard deviation: 1433.2 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 2 0 1 2 2 1 5 7 2 5 3 7 11 16 5 8 12 5 20 26 25 23 22 24 29 30 38 35 44 31 21 44 42 39 39 54 62 49 38 47 56 55 64 54 47 55 50 47 53 57 53 57 53 47 53 47 45 53 50 52 41 44 47 42 37 47 38 48 24 31 39 28 25 30 32 26 25 30 28 16 21 24 16 17 18 14 24 18 14 13 11 8 8 8 11 15 6 9 5 7 4 2 4 3 7 6 3 2 3 2 4 5 2 3 6 2 1 3 2 0 1 0 0 0 0 1 0 1 1 4 0 1 0 1 1 1 0 0 0 0 1 0 0 0 0 1 0 2 0 1 ]
All Non-Zero Cycle SW Prefetch Requests
------------------------------------
@ -102,11 +102,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
Message Delayed Cycles
----------------------
Total_delay_cycles: [binsize: 1 max: 24 count: 2450334 average: 0.00749367 | standard deviation: 0.176657 | 2445337 159 360 864 3577 2 1 0 0 0 0 1 1 11 1 1 0 0 12 0 0 0 6 0 1 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 24 count: 2450334 average: 0.00749367 | standard deviation: 0.176657 | 2445337 159 360 864 3577 2 1 0 0 0 0 1 1 11 1 1 0 0 12 0 0 0 6 0 1 ]
Total_delay_cycles: [binsize: 1 max: 22 count: 1233888 average: 0.00745367 | standard deviation: 0.17583 | 1231378 88 178 447 1777 0 0 1 0 0 0 0 1 11 0 0 0 0 3 0 0 0 4 ]
Total_nonPF_delay_cycles: [binsize: 1 max: 22 count: 1233888 average: 0.00745367 | standard deviation: 0.17583 | 1231378 88 178 447 1777 0 0 1 0 0 0 0 1 11 0 0 0 0 3 0 0 0 4 ]
virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 4 count: 1223058 average: 0.000358119 | standard deviation: 0.0257982 | 1222789 117 137 13 2 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 24 count: 1227276 average: 0.0146047 | standard deviation: 0.24808 | 1222548 42 223 851 3575 2 1 0 0 0 0 1 1 11 1 1 0 0 12 0 0 0 6 0 1 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 3 count: 615870 average: 0.000342605 | standard deviation: 0.0243446 | 615732 69 65 4 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 22 count: 618018 average: 0.01454 | standard deviation: 0.24705 | 615646 19 113 443 1777 0 0 1 0 0 0 0 1 11 0 0 0 0 3 0 0 0 4 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@ -118,337 +118,337 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 24 count: 2450334 average: 0.00749367
Resource Usage
--------------
page_size: 4096
user_time: 118
user_time: 55
system_time: 0
page_reclaims: 10946
page_faults: 0
page_reclaims: 10889
page_faults: 2
swaps: 0
block_inputs: 0
block_inputs: 1408
block_outputs: 0
Network Stats
-------------
total_msg_count_Control: 3669213 29353704
total_msg_count_Data: 3632319 261526968
total_msg_count_Response_Data: 3669174 264180528
total_msg_count_Writeback_Control: 3681828 29454624
total_msgs: 14652534 total_bytes: 584515824
total_msg_count_Control: 1847643 14781144
total_msg_count_Data: 1829024 131689728
total_msg_count_Response_Data: 1847610 133027920
total_msg_count_Writeback_Control: 1854054 14832432
total_msgs: 7378331 total_bytes: 294331224
switch_0_inlinks: 2
switch_0_outlinks: 2
links_utilized_percent_switch_0: 1.34003
links_utilized_percent_switch_0_link_0: 1.33803 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 1.34202 bw: 16000 base_latency: 1
links_utilized_percent_switch_0: 1.34528
links_utilized_percent_switch_0_link_0: 1.34317 bw: 16000 base_latency: 1
links_utilized_percent_switch_0_link_1: 1.34738 bw: 16000 base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 152626 10989072 [ 0 0 0 0 152626 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Writeback_Control: 153195 1225560 [ 0 0 0 153195 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Control: 152627 1221016 [ 0 0 152627 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Data: 151125 10881000 [ 0 0 151125 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Data: 2070 149040 [ 0 0 0 0 2070 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Response_Data: 77136 5553792 [ 0 0 0 0 77136 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_0_Writeback_Control: 77433 619464 [ 0 0 0 77433 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Control: 77138 617104 [ 0 0 77138 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Data: 76420 5502240 [ 0 0 76420 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_0_link_1_Response_Data: 1017 73224 [ 0 0 0 0 1017 0 0 0 0 0 ] base_latency: 1
switch_1_inlinks: 2
switch_1_outlinks: 2
links_utilized_percent_switch_1: 1.34729
links_utilized_percent_switch_1_link_0: 1.34547 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 1.34911 bw: 16000 base_latency: 1
links_utilized_percent_switch_1: 1.34599
links_utilized_percent_switch_1_link_0: 1.34421 bw: 16000 base_latency: 1
links_utilized_percent_switch_1_link_1: 1.34776 bw: 16000 base_latency: 1
outgoing_messages_switch_1_link_0_Response_Data: 153480 11050560 [ 0 0 0 0 153480 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Writeback_Control: 153999 1231992 [ 0 0 0 153999 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Control: 153482 1227856 [ 0 0 153482 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Data: 151946 10940112 [ 0 0 151946 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 2053 147816 [ 0 0 0 0 2053 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Response_Data: 77200 5558400 [ 0 0 0 0 77200 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_0_Writeback_Control: 77452 619616 [ 0 0 0 77452 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Control: 77201 617608 [ 0 0 77201 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Data: 76436 5503392 [ 0 0 76436 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_1_link_1_Response_Data: 1018 73296 [ 0 0 0 0 1018 0 0 0 0 0 ] base_latency: 1
switch_2_inlinks: 2
switch_2_outlinks: 2
links_utilized_percent_switch_2: 1.33873
links_utilized_percent_switch_2_link_0: 1.33679 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 1.34067 bw: 16000 base_latency: 1
links_utilized_percent_switch_2: 1.34111
links_utilized_percent_switch_2_link_0: 1.33905 bw: 16000 base_latency: 1
links_utilized_percent_switch_2_link_1: 1.34318 bw: 16000 base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 152487 10979064 [ 0 0 0 0 152487 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Writeback_Control: 153035 1224280 [ 0 0 0 153035 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Control: 152489 1219912 [ 0 0 152489 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Data: 150957 10868904 [ 0 0 150957 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Data: 2082 149904 [ 0 0 0 0 2082 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Response_Data: 76899 5536728 [ 0 0 0 0 76899 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_0_Writeback_Control: 77195 617560 [ 0 0 0 77195 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Control: 76900 615200 [ 0 0 76900 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Data: 76098 5479056 [ 0 0 76098 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_2_link_1_Response_Data: 1097 78984 [ 0 0 0 0 1097 0 0 0 0 0 ] base_latency: 1
switch_3_inlinks: 2
switch_3_outlinks: 2
links_utilized_percent_switch_3: 1.34218
links_utilized_percent_switch_3_link_0: 1.34053 bw: 16000 base_latency: 1
links_utilized_percent_switch_3_link_1: 1.34383 bw: 16000 base_latency: 1
links_utilized_percent_switch_3: 1.34039
links_utilized_percent_switch_3_link_0: 1.33852 bw: 16000 base_latency: 1
links_utilized_percent_switch_3_link_1: 1.34225 bw: 16000 base_latency: 1
outgoing_messages_switch_3_link_0_Response_Data: 152921 11010312 [ 0 0 0 0 152921 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Writeback_Control: 153389 1227112 [ 0 0 0 153389 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Control: 152923 1223384 [ 0 0 152923 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Data: 151387 10899864 [ 0 0 151387 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Data: 2005 144360 [ 0 0 0 0 2005 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Response_Data: 76872 5534784 [ 0 0 0 0 76872 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_0_Writeback_Control: 77134 617072 [ 0 0 0 77134 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Control: 76875 615000 [ 0 0 76875 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Data: 76106 5479632 [ 0 0 76106 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_3_link_1_Response_Data: 1033 74376 [ 0 0 0 0 1033 0 0 0 0 0 ] base_latency: 1
switch_4_inlinks: 2
switch_4_outlinks: 2
links_utilized_percent_switch_4: 1.34841
links_utilized_percent_switch_4_link_0: 1.34646 bw: 16000 base_latency: 1
links_utilized_percent_switch_4_link_1: 1.35037 bw: 16000 base_latency: 1
links_utilized_percent_switch_4: 1.34098
links_utilized_percent_switch_4_link_0: 1.33927 bw: 16000 base_latency: 1
links_utilized_percent_switch_4_link_1: 1.34269 bw: 16000 base_latency: 1
outgoing_messages_switch_4_link_0_Response_Data: 153589 11058408 [ 0 0 0 0 153589 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Writeback_Control: 154143 1233144 [ 0 0 0 154143 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Control: 153590 1228720 [ 0 0 153590 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Data: 152020 10945440 [ 0 0 152020 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Response_Data: 2126 153072 [ 0 0 0 0 2126 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Response_Data: 76917 5538024 [ 0 0 0 0 76917 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_0_Writeback_Control: 77161 617288 [ 0 0 0 77161 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Control: 76918 615344 [ 0 0 76918 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Data: 76104 5479488 [ 0 0 76104 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_4_link_1_Response_Data: 1058 76176 [ 0 0 0 0 1058 0 0 0 0 0 ] base_latency: 1
switch_5_inlinks: 2
switch_5_outlinks: 2
links_utilized_percent_switch_5: 1.34312
links_utilized_percent_switch_5_link_0: 1.34131 bw: 16000 base_latency: 1
links_utilized_percent_switch_5_link_1: 1.34493 bw: 16000 base_latency: 1
links_utilized_percent_switch_5: 1.34326
links_utilized_percent_switch_5_link_0: 1.34149 bw: 16000 base_latency: 1
links_utilized_percent_switch_5_link_1: 1.34504 bw: 16000 base_latency: 1
outgoing_messages_switch_5_link_0_Response_Data: 153006 11016432 [ 0 0 0 0 153006 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Writeback_Control: 153520 1228160 [ 0 0 0 153520 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Control: 153008 1224064 [ 0 0 153008 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Data: 151445 10904040 [ 0 0 151445 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Response_Data: 2077 149544 [ 0 0 0 0 2077 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Response_Data: 77043 5547096 [ 0 0 0 0 77043 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_0_Writeback_Control: 77297 618376 [ 0 0 0 77297 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Control: 77044 616352 [ 0 0 77044 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Data: 76280 5492160 [ 0 0 76280 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_5_link_1_Response_Data: 1018 73296 [ 0 0 0 0 1018 0 0 0 0 0 ] base_latency: 1
switch_6_inlinks: 2
switch_6_outlinks: 2
links_utilized_percent_switch_6: 1.33595
links_utilized_percent_switch_6_link_0: 1.33418 bw: 16000 base_latency: 1
links_utilized_percent_switch_6_link_1: 1.33771 bw: 16000 base_latency: 1
links_utilized_percent_switch_6: 1.33528
links_utilized_percent_switch_6_link_0: 1.33337 bw: 16000 base_latency: 1
links_utilized_percent_switch_6_link_1: 1.33719 bw: 16000 base_latency: 1
outgoing_messages_switch_6_link_0_Response_Data: 152193 10957896 [ 0 0 0 0 152193 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Writeback_Control: 152694 1221552 [ 0 0 0 152694 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Control: 152195 1217560 [ 0 0 152195 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Data: 150638 10845936 [ 0 0 150638 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Response_Data: 2059 148248 [ 0 0 0 0 2059 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Response_Data: 76575 5513400 [ 0 0 0 0 76575 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_0_Writeback_Control: 76846 614768 [ 0 0 0 76846 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Control: 76576 612608 [ 0 0 76576 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Data: 75797 5457384 [ 0 0 75797 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_6_link_1_Response_Data: 1052 75744 [ 0 0 0 0 1052 0 0 0 0 0 ] base_latency: 1
switch_7_inlinks: 2
switch_7_outlinks: 2
links_utilized_percent_switch_7: 1.34106
links_utilized_percent_switch_7_link_0: 1.33915 bw: 16000 base_latency: 1
links_utilized_percent_switch_7_link_1: 1.34297 bw: 16000 base_latency: 1
links_utilized_percent_switch_7: 1.34665
links_utilized_percent_switch_7_link_0: 1.34474 bw: 16000 base_latency: 1
links_utilized_percent_switch_7_link_1: 1.34856 bw: 16000 base_latency: 1
outgoing_messages_switch_7_link_0_Response_Data: 152756 10998432 [ 0 0 0 0 152756 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Writeback_Control: 153301 1226408 [ 0 0 0 153301 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Control: 152757 1222056 [ 0 0 152757 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Data: 151255 10890360 [ 0 0 151255 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Response_Data: 2046 147312 [ 0 0 0 0 2046 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Response_Data: 77228 5560416 [ 0 0 0 0 77228 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_0_Writeback_Control: 77500 620000 [ 0 0 0 77500 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Control: 77229 617832 [ 0 0 77229 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Data: 76434 5503248 [ 0 0 76434 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_7_link_1_Response_Data: 1068 76896 [ 0 0 0 0 1068 0 0 0 0 0 ] base_latency: 1
switch_8_inlinks: 2
switch_8_outlinks: 2
links_utilized_percent_switch_8: 10.6065
links_utilized_percent_switch_8_link_0: 10.6213 bw: 16000 base_latency: 1
links_utilized_percent_switch_8_link_1: 10.5916 bw: 16000 base_latency: 1
links_utilized_percent_switch_8: 10.608
links_utilized_percent_switch_8_link_0: 10.6231 bw: 16000 base_latency: 1
links_utilized_percent_switch_8_link_1: 10.5929 bw: 16000 base_latency: 1
outgoing_messages_switch_8_link_0_Control: 1223071 9784568 [ 0 0 1223071 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Data: 1210773 87175656 [ 0 0 1210773 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Response_Data: 1206540 86870880 [ 0 0 0 0 1206540 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Writeback_Control: 1227276 9818208 [ 0 0 0 1227276 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Control: 615881 4927048 [ 0 0 615881 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_0_Data: 609674 43896528 [ 0 0 609674 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Response_Data: 607509 43740648 [ 0 0 0 0 607509 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_8_link_1_Writeback_Control: 618018 4944144 [ 0 0 0 618018 0 0 0 0 0 0 ] base_latency: 1
switch_9_inlinks: 9
switch_9_outlinks: 9
links_utilized_percent_switch_9: 2.37147
links_utilized_percent_switch_9_link_0: 1.33803 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_1: 1.34547 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_2: 1.33679 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_3: 1.34053 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_4: 1.34646 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_5: 1.34131 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_6: 1.33418 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_7: 1.33915 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_8: 10.6213 bw: 16000 base_latency: 1
links_utilized_percent_switch_9: 2.37188
links_utilized_percent_switch_9_link_0: 1.34318 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_1: 1.34421 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_2: 1.33905 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_3: 1.33852 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_4: 1.33927 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_5: 1.34149 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_6: 1.33337 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_7: 1.34474 bw: 16000 base_latency: 1
links_utilized_percent_switch_9_link_8: 10.6231 bw: 16000 base_latency: 1
outgoing_messages_switch_9_link_0_Response_Data: 152626 10989072 [ 0 0 0 0 152626 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Writeback_Control: 153195 1225560 [ 0 0 0 153195 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Response_Data: 153480 11050560 [ 0 0 0 0 153480 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Writeback_Control: 153999 1231992 [ 0 0 0 153999 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_2_Response_Data: 152487 10979064 [ 0 0 0 0 152487 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_2_Writeback_Control: 153035 1224280 [ 0 0 0 153035 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_3_Response_Data: 152921 11010312 [ 0 0 0 0 152921 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_3_Writeback_Control: 153389 1227112 [ 0 0 0 153389 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_4_Response_Data: 153589 11058408 [ 0 0 0 0 153589 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_4_Writeback_Control: 154143 1233144 [ 0 0 0 154143 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_5_Response_Data: 153006 11016432 [ 0 0 0 0 153006 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_5_Writeback_Control: 153520 1228160 [ 0 0 0 153520 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_6_Response_Data: 152193 10957896 [ 0 0 0 0 152193 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_6_Writeback_Control: 152694 1221552 [ 0 0 0 152694 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_7_Response_Data: 152756 10998432 [ 0 0 0 0 152756 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_7_Writeback_Control: 153301 1226408 [ 0 0 0 153301 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_8_Control: 1223071 9784568 [ 0 0 1223071 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_8_Data: 1210773 87175656 [ 0 0 1210773 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Response_Data: 77136 5553792 [ 0 0 0 0 77136 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_0_Writeback_Control: 77433 619464 [ 0 0 0 77433 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Response_Data: 77200 5558400 [ 0 0 0 0 77200 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_1_Writeback_Control: 77452 619616 [ 0 0 0 77452 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_2_Response_Data: 76899 5536728 [ 0 0 0 0 76899 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_2_Writeback_Control: 77195 617560 [ 0 0 0 77195 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_3_Response_Data: 76872 5534784 [ 0 0 0 0 76872 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_3_Writeback_Control: 77134 617072 [ 0 0 0 77134 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_4_Response_Data: 76917 5538024 [ 0 0 0 0 76917 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_4_Writeback_Control: 77161 617288 [ 0 0 0 77161 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_5_Response_Data: 77043 5547096 [ 0 0 0 0 77043 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_5_Writeback_Control: 77297 618376 [ 0 0 0 77297 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_6_Response_Data: 76575 5513400 [ 0 0 0 0 76575 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_6_Writeback_Control: 76846 614768 [ 0 0 0 76846 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_7_Response_Data: 77228 5560416 [ 0 0 0 0 77228 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_7_Writeback_Control: 77500 620000 [ 0 0 0 77500 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_8_Control: 615881 4927048 [ 0 0 615881 0 0 0 0 0 0 0 ] base_latency: 1
outgoing_messages_switch_9_link_8_Data: 609675 43896600 [ 0 0 609675 0 0 0 0 0 0 0 ] base_latency: 1
Cache Stats: system.l1_cntrl0.cacheMemory
system.l1_cntrl0.cacheMemory_total_misses: 152627
system.l1_cntrl0.cacheMemory_total_demand_misses: 152627
system.l1_cntrl0.cacheMemory_total_misses: 77138
system.l1_cntrl0.cacheMemory_total_demand_misses: 77138
system.l1_cntrl0.cacheMemory_total_prefetches: 0
system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl0.cacheMemory_request_type_LD: 65.0344%
system.l1_cntrl0.cacheMemory_request_type_ST: 34.9656%
system.l1_cntrl0.cacheMemory_request_type_LD: 65.2065%
system.l1_cntrl0.cacheMemory_request_type_ST: 34.7935%
system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor: 152627 100%
system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor: 77138 100%
--- L1Cache ---
- Event Counts -
Load [99667 99333 99231 99289 99260 100003 99030 99242 ] 795055
Load [50062 49936 49885 50169 50299 50006 49692 49994 ] 400043
Ifetch [0 0 0 0 0 0 0 0 ] 0
Store [53923 53675 52964 53468 53367 53480 53459 53681 ] 428017
Data [153589 153006 152193 152756 152626 153480 152487 152921 ] 1223058
Fwd_GETX [2126 2077 2059 2046 2070 2053 2082 2005 ] 16518
Store [26856 27108 26691 27060 26839 27195 27208 26882 ] 215839
Data [76917 77043 76575 77228 77136 77200 76899 76872 ] 615870
Fwd_GETX [1058 1018 1052 1068 1017 1018 1097 1033 ] 8361
Inv [0 0 0 0 0 0 0 0 ] 0
Replacement [153586 153004 152191 152753 152623 153479 152485 152919 ] 1223040
Writeback_Ack [151457 150926 150129 150707 150554 151425 150399 150911 ] 1206508
Writeback_Nack [560 517 506 548 571 521 554 473 ] 4250
Replacement [76914 77040 76572 77225 77134 77197 76896 76872 ] 615850
Writeback_Ack [75855 76021 75517 76155 76113 76177 75799 75834 ] 607471
Writeback_Nack [248 258 277 277 303 257 299 267 ] 2186
- Transitions -
I Load [99667 99333 99231 99289 99260 100003 99030 99242 ] 795055
I Load [50062 49936 49885 50169 50299 50006 49692 49994 ] 400043
I Ifetch [0 0 0 0 0 0 0 0 ] 0
I Store [53923 53675 52964 53468 53367 53480 53459 53681 ] 428017
I Store [26856 27108 26691 27060 26839 27195 27208 26882 ] 215839
I Inv [0 0 0 0 0 0 0 0 ] 0
I Replacement [1566 1559 1553 1498 1498 1532 1528 1532 ] 12266
I Replacement [810 760 775 791 714 761 798 766 ] 6175
II Writeback_Nack [560 517 506 548 571 521 554 473 ] 4250
II Writeback_Nack [248 258 277 277 303 257 299 267 ] 2186
M Load [0 0 0 0 0 0 0 0 ] 0
M Ifetch [0 0 0 0 0 0 0 0 ] 0
M Store [0 0 0 0 0 0 0 0 ] 0
M Fwd_GETX [1566 1560 1553 1498 1499 1532 1528 1532 ] 12268
M Fwd_GETX [810 760 775 791 714 761 798 766 ] 6175
M Inv [0 0 0 0 0 0 0 0 ] 0
M Replacement [152020 151445 150638 151255 151125 151947 150957 151387 ] 1210774
M Replacement [76104 76280 75797 76434 76420 76436 76098 76106 ] 609675
MI Fwd_GETX [560 517 506 548 571 521 554 473 ] 4250
MI Fwd_GETX [248 258 277 277 303 257 299 267 ] 2186
MI Inv [0 0 0 0 0 0 0 0 ] 0
MI Writeback_Ack [151457 150926 150129 150707 150554 151425 150399 150911 ] 1206508
MI Writeback_Ack [75855 76021 75517 76155 76113 76177 75799 75834 ] 607471
MI Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
MII Fwd_GETX [0 0 0 0 0 0 0 0 ] 0
IS Data [99667 99333 99229 99289 99259 100000 99029 99240 ] 795046
IS Data [50061 49936 49885 50168 50297 50005 49691 49992 ] 400035
IM Data [53922 53673 52964 53467 53367 53480 53458 53681 ] 428012
IM Data [26856 27107 26690 27060 26839 27195 27208 26880 ] 215835
Cache Stats: system.l1_cntrl1.cacheMemory
system.l1_cntrl1.cacheMemory_total_misses: 153483
system.l1_cntrl1.cacheMemory_total_demand_misses: 153483
system.l1_cntrl1.cacheMemory_total_misses: 77201
system.l1_cntrl1.cacheMemory_total_demand_misses: 77201
system.l1_cntrl1.cacheMemory_total_prefetches: 0
system.l1_cntrl1.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl1.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl1.cacheMemory_request_type_LD: 65.1558%
system.l1_cntrl1.cacheMemory_request_type_ST: 34.8442%
system.l1_cntrl1.cacheMemory_request_type_LD: 64.7738%
system.l1_cntrl1.cacheMemory_request_type_ST: 35.2262%
system.l1_cntrl1.cacheMemory_access_mode_type_Supervisor: 153483 100%
system.l1_cntrl1.cacheMemory_access_mode_type_Supervisor: 77201 100%
Cache Stats: system.l1_cntrl2.cacheMemory
system.l1_cntrl2.cacheMemory_total_misses: 152489
system.l1_cntrl2.cacheMemory_total_demand_misses: 152489
system.l1_cntrl2.cacheMemory_total_misses: 76900
system.l1_cntrl2.cacheMemory_total_demand_misses: 76900
system.l1_cntrl2.cacheMemory_total_prefetches: 0
system.l1_cntrl2.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl2.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl2.cacheMemory_request_type_LD: 64.9424%
system.l1_cntrl2.cacheMemory_request_type_ST: 35.0576%
system.l1_cntrl2.cacheMemory_request_type_LD: 64.619%
system.l1_cntrl2.cacheMemory_request_type_ST: 35.381%
system.l1_cntrl2.cacheMemory_access_mode_type_Supervisor: 152489 100%
system.l1_cntrl2.cacheMemory_access_mode_type_Supervisor: 76900 100%
Cache Stats: system.l1_cntrl3.cacheMemory
system.l1_cntrl3.cacheMemory_total_misses: 152923
system.l1_cntrl3.cacheMemory_total_demand_misses: 152923
system.l1_cntrl3.cacheMemory_total_misses: 76876
system.l1_cntrl3.cacheMemory_total_demand_misses: 76876
system.l1_cntrl3.cacheMemory_total_prefetches: 0
system.l1_cntrl3.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl3.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl3.cacheMemory_request_type_LD: 64.8967%
system.l1_cntrl3.cacheMemory_request_type_ST: 35.1033%
system.l1_cntrl3.cacheMemory_request_type_LD: 65.032%
system.l1_cntrl3.cacheMemory_request_type_ST: 34.968%
system.l1_cntrl3.cacheMemory_access_mode_type_Supervisor: 152923 100%
system.l1_cntrl3.cacheMemory_access_mode_type_Supervisor: 76876 100%
Cache Stats: system.l1_cntrl4.cacheMemory
system.l1_cntrl4.cacheMemory_total_misses: 153590
system.l1_cntrl4.cacheMemory_total_demand_misses: 153590
system.l1_cntrl4.cacheMemory_total_misses: 76918
system.l1_cntrl4.cacheMemory_total_demand_misses: 76918
system.l1_cntrl4.cacheMemory_total_prefetches: 0
system.l1_cntrl4.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl4.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl4.cacheMemory_request_type_LD: 64.8916%
system.l1_cntrl4.cacheMemory_request_type_ST: 35.1084%
system.l1_cntrl4.cacheMemory_request_type_LD: 65.0849%
system.l1_cntrl4.cacheMemory_request_type_ST: 34.9151%
system.l1_cntrl4.cacheMemory_access_mode_type_Supervisor: 153590 100%
system.l1_cntrl4.cacheMemory_access_mode_type_Supervisor: 76918 100%
Cache Stats: system.l1_cntrl5.cacheMemory
system.l1_cntrl5.cacheMemory_total_misses: 153008
system.l1_cntrl5.cacheMemory_total_demand_misses: 153008
system.l1_cntrl5.cacheMemory_total_misses: 77044
system.l1_cntrl5.cacheMemory_total_demand_misses: 77044
system.l1_cntrl5.cacheMemory_total_prefetches: 0
system.l1_cntrl5.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl5.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl5.cacheMemory_request_type_LD: 64.9201%
system.l1_cntrl5.cacheMemory_request_type_ST: 35.0799%
system.l1_cntrl5.cacheMemory_request_type_LD: 64.8149%
system.l1_cntrl5.cacheMemory_request_type_ST: 35.1851%
system.l1_cntrl5.cacheMemory_access_mode_type_Supervisor: 153008 100%
system.l1_cntrl5.cacheMemory_access_mode_type_Supervisor: 77044 100%
Cache Stats: system.l1_cntrl6.cacheMemory
system.l1_cntrl6.cacheMemory_total_misses: 152195
system.l1_cntrl6.cacheMemory_total_demand_misses: 152195
system.l1_cntrl6.cacheMemory_total_misses: 76576
system.l1_cntrl6.cacheMemory_total_demand_misses: 76576
system.l1_cntrl6.cacheMemory_total_prefetches: 0
system.l1_cntrl6.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl6.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl6.cacheMemory_request_type_LD: 65.1999%
system.l1_cntrl6.cacheMemory_request_type_ST: 34.8001%
system.l1_cntrl6.cacheMemory_request_type_LD: 65.1444%
system.l1_cntrl6.cacheMemory_request_type_ST: 34.8556%
system.l1_cntrl6.cacheMemory_access_mode_type_Supervisor: 152195 100%
system.l1_cntrl6.cacheMemory_access_mode_type_Supervisor: 76576 100%
Cache Stats: system.l1_cntrl7.cacheMemory
system.l1_cntrl7.cacheMemory_total_misses: 152757
system.l1_cntrl7.cacheMemory_total_demand_misses: 152757
system.l1_cntrl7.cacheMemory_total_misses: 77229
system.l1_cntrl7.cacheMemory_total_demand_misses: 77229
system.l1_cntrl7.cacheMemory_total_prefetches: 0
system.l1_cntrl7.cacheMemory_total_sw_prefetches: 0
system.l1_cntrl7.cacheMemory_total_hw_prefetches: 0
system.l1_cntrl7.cacheMemory_request_type_LD: 64.998%
system.l1_cntrl7.cacheMemory_request_type_ST: 35.002%
system.l1_cntrl7.cacheMemory_request_type_LD: 64.9613%
system.l1_cntrl7.cacheMemory_request_type_ST: 35.0387%
system.l1_cntrl7.cacheMemory_access_mode_type_Supervisor: 152757 100%
system.l1_cntrl7.cacheMemory_access_mode_type_Supervisor: 77229 100%
Memory controller: system.dir_cntrl0.memBuffer:
memory_total_requests: 2413075
memory_reads: 1206541
memory_writes: 1206511
memory_refreshes: 118865
memory_total_request_delays: 187888490
memory_delays_per_request: 77.8627
memory_delays_in_input_queue: 9814295
memory_delays_behind_head_of_bank_queue: 84866739
memory_delays_stalled_at_head_of_bank_queue: 93207456
memory_stalls_for_bank_busy: 14333454
memory_total_requests: 1215007
memory_reads: 607514
memory_writes: 607471
memory_refreshes: 59844
memory_total_request_delays: 94490839
memory_delays_per_request: 77.7698
memory_delays_in_input_queue: 4956280
memory_delays_behind_head_of_bank_queue: 42721539
memory_delays_stalled_at_head_of_bank_queue: 46813020
memory_stalls_for_bank_busy: 7203781
memory_stalls_for_random_busy: 0
memory_stalls_for_anti_starvation: 23982519
memory_stalls_for_arbitration: 18429986
memory_stalls_for_bus: 25198677
memory_stalls_for_anti_starvation: 12030630
memory_stalls_for_arbitration: 9262268
memory_stalls_for_bus: 12663868
memory_stalls_for_tfaw: 0
memory_stalls_for_read_write_turnaround: 9154843
memory_stalls_for_read_read_turnaround: 2107977
accesses_per_bank: 75689 75716 75340 75751 75577 76015 75888 75057 75824 75723 75944 75570 75368 75465 75339 75225 75306 74796 75693 75506 75386 75135 75159 75300 75666 74918 75094 74513 75321 74927 75681 75183
memory_stalls_for_read_write_turnaround: 4593756
memory_stalls_for_read_read_turnaround: 1058717
accesses_per_bank: 38064 37906 37810 38185 38131 38139 38459 38015 38286 38038 38075 38326 37705 37695 37985 37984 37848 37764 37931 38109 38114 37875 38032 37917 37934 37358 38024 37068 37768 38020 38377 38065
--- Directory ---
- Event Counts -
GETX [2508342 ] 2508342
GETX [1243024 ] 1243024
GETS [0 ] 0
PUTX [1206523 ] 1206523
PUTX_NotOwner [4250 ] 4250
PUTX [607488 ] 607488
PUTX_NotOwner [2186 ] 2186
DMA_READ [0 ] 0
DMA_WRITE [0 ] 0
Memory_Data [1206540 ] 1206540
Memory_Ack [1206508 ] 1206508
Memory_Data [607509 ] 607509
Memory_Ack [607471 ] 607471
- Transitions -
I GETX [1206552 ] 1206552
I GETX [607519 ] 607519
I PUTX_NotOwner [0 ] 0
I DMA_READ [0 ] 0
I DMA_WRITE [0 ] 0
M GETX [16518 ] 16518
M PUTX [1206523 ] 1206523
M PUTX_NotOwner [4250 ] 4250
M GETX [8361 ] 8361
M PUTX [607488 ] 607488
M PUTX_NotOwner [2186 ] 2186
M DMA_READ [0 ] 0
M DMA_WRITE [0 ] 0
@ -464,21 +464,21 @@ M_DWRI Memory_Ack [0 ] 0
M_DRDI GETX [0 ] 0
M_DRDI Memory_Ack [0 ] 0
IM GETX [506832 ] 506832
IM GETX [250002 ] 250002
IM GETS [0 ] 0
IM PUTX [0 ] 0
IM PUTX_NotOwner [0 ] 0
IM DMA_READ [0 ] 0
IM DMA_WRITE [0 ] 0
IM Memory_Data [1206540 ] 1206540
IM Memory_Data [607509 ] 607509
MI GETX [778440 ] 778440
MI GETX [377142 ] 377142
MI GETS [0 ] 0
MI PUTX [0 ] 0
MI PUTX_NotOwner [0 ] 0
MI DMA_READ [0 ] 0
MI DMA_WRITE [0 ] 0
MI Memory_Ack [1206508 ] 1206508
MI Memory_Ack [607471 ] 607471
ID GETX [0 ] 0
ID GETS [0 ] 0

View file

@ -1,74 +1,74 @@
system.cpu4: completed 10000 read accesses @5683660
system.cpu7: completed 10000 read accesses @5683710
system.cpu1: completed 10000 read accesses @5691320
system.cpu5: completed 10000 read accesses @5745800
system.cpu3: completed 10000 read accesses @5751690
system.cpu6: completed 10000 read accesses @5761120
system.cpu2: completed 10000 read accesses @5828550
system.cpu0: completed 10000 read accesses @5838130
system.cpu1: completed 20000 read accesses @11311180
system.cpu6: completed 20000 read accesses @11405630
system.cpu4: completed 20000 read accesses @11449760
system.cpu5: completed 20000 read accesses @11488820
system.cpu3: completed 20000 read accesses @11489650
system.cpu7: completed 20000 read accesses @11527530
system.cpu0: completed 20000 read accesses @11529193
system.cpu2: completed 20000 read accesses @11597220
system.cpu1: completed 30000 read accesses @16992900
system.cpu4: completed 30000 read accesses @17157120
system.cpu6: completed 30000 read accesses @17206370
system.cpu3: completed 30000 read accesses @17220530
system.cpu0: completed 30000 read accesses @17277600
system.cpu7: completed 30000 read accesses @17288420
system.cpu5: completed 30000 read accesses @17324790
system.cpu2: completed 30000 read accesses @17389220
system.cpu1: completed 40000 read accesses @22683330
system.cpu4: completed 40000 read accesses @22835960
system.cpu6: completed 40000 read accesses @22956140
system.cpu3: completed 40000 read accesses @22965670
system.cpu0: completed 40000 read accesses @22985540
system.cpu5: completed 40000 read accesses @23049380
system.cpu7: completed 40000 read accesses @23069390
system.cpu2: completed 40000 read accesses @23189760
system.cpu1: completed 50000 read accesses @28383830
system.cpu4: completed 50000 read accesses @28617440
system.cpu6: completed 50000 read accesses @28641120
system.cpu3: completed 50000 read accesses @28738160
system.cpu5: completed 50000 read accesses @28790240
system.cpu7: completed 50000 read accesses @28796110
system.cpu0: completed 50000 read accesses @28854800
system.cpu2: completed 50000 read accesses @28994250
system.cpu1: completed 60000 read accesses @34178800
system.cpu4: completed 60000 read accesses @34307510
system.cpu6: completed 60000 read accesses @34354660
system.cpu5: completed 60000 read accesses @34404120
system.cpu7: completed 60000 read accesses @34468920
system.cpu3: completed 60000 read accesses @34534480
system.cpu0: completed 60000 read accesses @34647430
system.cpu2: completed 60000 read accesses @34808950
system.cpu1: completed 70000 read accesses @39835450
system.cpu6: completed 70000 read accesses @40091860
system.cpu4: completed 70000 read accesses @40108570
system.cpu5: completed 70000 read accesses @40159100
system.cpu7: completed 70000 read accesses @40174450
system.cpu3: completed 70000 read accesses @40308900
system.cpu0: completed 70000 read accesses @40394470
system.cpu2: completed 70000 read accesses @40489680
system.cpu1: completed 80000 read accesses @45574100
system.cpu6: completed 80000 read accesses @45804710
system.cpu4: completed 80000 read accesses @45815380
system.cpu5: completed 80000 read accesses @45862480
system.cpu7: completed 80000 read accesses @45880300
system.cpu0: completed 80000 read accesses @46057510
system.cpu3: completed 80000 read accesses @46060070
system.cpu2: completed 80000 read accesses @46220540
system.cpu1: completed 90000 read accesses @51333500
system.cpu4: completed 90000 read accesses @51527340
system.cpu5: completed 90000 read accesses @51667650
system.cpu6: completed 90000 read accesses @51677700
system.cpu7: completed 90000 read accesses @51707310
system.cpu0: completed 90000 read accesses @51764430
system.cpu3: completed 90000 read accesses @51767300
system.cpu2: completed 90000 read accesses @51910430
system.cpu1: completed 100000 read accesses @57055090
system.cpu5: completed 10000 read, 5419 write accesses @2858002
system.cpu7: completed 10000 read, 5473 write accesses @2858520
system.cpu0: completed 10000 read, 5305 write accesses @2868940
system.cpu1: completed 10000 read, 5416 write accesses @2893421
system.cpu4: completed 10000 read, 5371 write accesses @2900102
system.cpu2: completed 10000 read, 5337 write accesses @2905419
system.cpu3: completed 10000 read, 5513 write accesses @2916882
system.cpu6: completed 10000 read, 5458 write accesses @2971509
system.cpu1: completed 20000 read, 10866 write accesses @5727829
system.cpu0: completed 20000 read, 10592 write accesses @5734440
system.cpu4: completed 20000 read, 10679 write accesses @5748810
system.cpu7: completed 20000 read, 10819 write accesses @5759030
system.cpu3: completed 20000 read, 10666 write accesses @5769940
system.cpu5: completed 20000 read, 10771 write accesses @5778709
system.cpu6: completed 20000 read, 10832 write accesses @5805350
system.cpu2: completed 20000 read, 10785 write accesses @5828740
system.cpu1: completed 30000 read, 16207 write accesses @8557570
system.cpu0: completed 30000 read, 15949 write accesses @8566069
system.cpu7: completed 30000 read, 16214 write accesses @8624139
system.cpu4: completed 30000 read, 16127 write accesses @8660230
system.cpu3: completed 30000 read, 16038 write accesses @8676099
system.cpu5: completed 30000 read, 16217 write accesses @8736099
system.cpu6: completed 30000 read, 16240 write accesses @8737471
system.cpu2: completed 30000 read, 16356 write accesses @8775610
system.cpu4: completed 40000 read, 21442 write accesses @11430710
system.cpu1: completed 40000 read, 21431 write accesses @11446880
system.cpu0: completed 40000 read, 21249 write accesses @11450119
system.cpu7: completed 40000 read, 21591 write accesses @11495090
system.cpu3: completed 40000 read, 21525 write accesses @11637130
system.cpu6: completed 40000 read, 21625 write accesses @11655440
system.cpu5: completed 40000 read, 21557 write accesses @11655900
system.cpu2: completed 40000 read, 22064 write accesses @11762920
system.cpu0: completed 50000 read, 26643 write accesses @14301920
system.cpu7: completed 50000 read, 26956 write accesses @14350920
system.cpu1: completed 50000 read, 26912 write accesses @14419140
system.cpu4: completed 50000 read, 27035 write accesses @14428630
system.cpu3: completed 50000 read, 26875 write accesses @14456189
system.cpu6: completed 50000 read, 26968 write accesses @14552960
system.cpu5: completed 50000 read, 27033 write accesses @14560100
system.cpu2: completed 50000 read, 27494 write accesses @14706770
system.cpu0: completed 60000 read, 32018 write accesses @17124880
system.cpu7: completed 60000 read, 32300 write accesses @17213372
system.cpu3: completed 60000 read, 32247 write accesses @17322589
system.cpu4: completed 60000 read, 32351 write accesses @17326542
system.cpu1: completed 60000 read, 32302 write accesses @17368660
system.cpu6: completed 60000 read, 32274 write accesses @17446980
system.cpu5: completed 60000 read, 32418 write accesses @17468540
system.cpu2: completed 60000 read, 32981 write accesses @17554781
system.cpu0: completed 70000 read, 37316 write accesses @19965899
system.cpu7: completed 70000 read, 37727 write accesses @20108089
system.cpu4: completed 70000 read, 37633 write accesses @20233790
system.cpu1: completed 70000 read, 37821 write accesses @20289790
system.cpu3: completed 70000 read, 37645 write accesses @20291829
system.cpu6: completed 70000 read, 37499 write accesses @20304889
system.cpu5: completed 70000 read, 37769 write accesses @20345680
system.cpu2: completed 70000 read, 38246 write accesses @20384949
system.cpu0: completed 80000 read, 42438 write accesses @22835499
system.cpu7: completed 80000 read, 43085 write accesses @23031949
system.cpu4: completed 80000 read, 42968 write accesses @23134444
system.cpu3: completed 80000 read, 42908 write accesses @23138450
system.cpu1: completed 80000 read, 43002 write accesses @23183439
system.cpu6: completed 80000 read, 42955 write accesses @23224650
system.cpu2: completed 80000 read, 43596 write accesses @23229730
system.cpu5: completed 80000 read, 43242 write accesses @23231600
system.cpu0: completed 90000 read, 47763 write accesses @25792220
system.cpu7: completed 90000 read, 48675 write accesses @25948310
system.cpu3: completed 90000 read, 48223 write accesses @26022110
system.cpu4: completed 90000 read, 48406 write accesses @26054041
system.cpu6: completed 90000 read, 48309 write accesses @26074843
system.cpu2: completed 90000 read, 49141 write accesses @26106590
system.cpu5: completed 90000 read, 48681 write accesses @26106730
system.cpu1: completed 90000 read, 48449 write accesses @26117229
system.cpu0: completed 100000 read, 53147 write accesses @28725020
hack: be nice to actually delete the event here

View file

@ -1,14 +1,10 @@
M5 Simulator System
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Apr 28 2011 14:26:41
M5 started Apr 28 2011 14:28:41
M5 executing on SC2B0617
command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby
gem5 compiled Jun 30 2011 15:04:55
gem5 started Jun 30 2011 15:05:23
gem5 executing on SC2B0622
command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 57055090 because maximum number of loads reached
Exiting @ tick 28725020 because maximum number of loads reached

View file

@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
host_mem_usage 357724 # Number of bytes of host memory used
host_seconds 118.40 # Real time elapsed on the host
host_tick_rate 481891 # Simulator tick rate (ticks/s)
sim_seconds 0.028725 # Number of seconds simulated
sim_ticks 28725020 # Number of ticks simulated
sim_freq 1000000000 # Frequency of simulated ticks
sim_seconds 0.057055 # Number of seconds simulated
sim_ticks 57055090 # Number of ticks simulated
host_tick_rate 514985 # Simulator tick rate (ticks/s)
host_mem_usage 358152 # Number of bytes of host memory used
host_seconds 55.78 # Real time elapsed on the host
system.cpu0.num_reads 100000 # number of read accesses completed
system.cpu0.num_writes 53147 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu0.num_reads 99259 # number of read accesses completed
system.cpu0.num_writes 53367 # number of write accesses completed
system.cpu1.num_reads 99027 # number of read accesses completed
system.cpu1.num_writes 53354 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 100000 # number of read accesses completed
system.cpu1.num_writes 53480 # number of write accesses completed
system.cpu2.num_reads 98992 # number of read accesses completed
system.cpu2.num_writes 53956 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 99029 # number of read accesses completed
system.cpu2.num_writes 53458 # number of write accesses completed
system.cpu3.num_reads 99374 # number of read accesses completed
system.cpu3.num_writes 53181 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99240 # number of read accesses completed
system.cpu3.num_writes 53681 # number of write accesses completed
system.cpu4.num_reads 99392 # number of read accesses completed
system.cpu4.num_writes 53489 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99667 # number of read accesses completed
system.cpu4.num_writes 53922 # number of write accesses completed
system.cpu5.num_reads 99177 # number of read accesses completed
system.cpu5.num_writes 53605 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99333 # number of read accesses completed
system.cpu5.num_writes 53673 # number of write accesses completed
system.cpu6.num_reads 99055 # number of read accesses completed
system.cpu6.num_writes 53188 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 99229 # number of read accesses completed
system.cpu6.num_writes 52964 # number of write accesses completed
system.cpu7.num_reads 99520 # number of read accesses completed
system.cpu7.num_writes 53821 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 99289 # number of read accesses completed
system.cpu7.num_writes 53467 # number of write accesses completed
---------- End Simulation Statistics ----------