tests: update reference config.ini files for previous cset

Rename 'responder_set' to 'use_default_range'.

tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini

@@ -693,7 +693,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -767,7 +767,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -822,7 +822,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
 

tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini

@@ -388,7 +388,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -462,7 +462,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -517,7 +517,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
 

tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/20.parser/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/20.parser/ref/x86/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/30.eon/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/30.eon/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/50.vortex/ref/alpha/tru64/inorder-timing/config.ini

@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/50.vortex/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/50.vortex/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/60.bzip2/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/60.bzip2/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/70.twolf/ref/alpha/tru64/inorder-timing/config.ini

@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/70.twolf/ref/arm/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini

@@ -133,7 +133,7 @@ block_size=64
 bus_id=0
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.bridge.side_a system.disk0.pio
 
@@ -144,7 +144,7 @@ block_size=64
 bus_id=1
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.t1000.iob.pio system.t1000.htod.pio system.bridge.side_b system.physmem.port[0] system.physmem2.port[0] system.rom.port[0] system.nvram.port[0] system.hypervisor_desc.port[0] system.partition_desc.port[0] system.cpu.icache_port system.cpu.dcache_port

tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini

@@ -176,7 +176,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -208,7 +208,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini

@@ -230,7 +230,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -262,7 +262,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini

@@ -397,7 +397,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -429,7 +429,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini

@@ -128,7 +128,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini

@@ -196,7 +196,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -228,7 +228,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/power/linux/o3-timing/config.ini

@@ -344,7 +344,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -376,7 +376,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini

@@ -75,7 +75,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -394,7 +394,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini

@@ -343,7 +343,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -375,7 +375,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini

@@ -74,7 +74,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -174,7 +174,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini

@@ -297,7 +297,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -371,7 +371,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -426,7 +426,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
 

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini

@@ -190,7 +190,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -264,7 +264,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -319,7 +319,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
 

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini

@@ -291,7 +291,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -365,7 +365,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -420,7 +420,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
 

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini

@@ -187,7 +187,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=system.tsunami.pciconfig.pio
 port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side system.tsunami.ethernet.config system.tsunami.ethernet.dma system.tsunami.ide.config system.tsunami.ide.dma
@@ -261,7 +261,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=system.membus.badaddr_responder.pio
 port=system.bridge.side_b system.physmem.port[0] system.iocache.mem_side system.l2c.mem_side
@@ -316,7 +316,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side
 

tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini

@@ -65,7 +65,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
 

tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini

@@ -142,7 +142,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
@@ -165,7 +165,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.physmem.port[0] system.cpu.l2cache.mem_side
 

tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini

@@ -494,7 +494,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -514,7 +514,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 

tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini

@@ -482,7 +482,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -502,7 +502,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 

tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini

@@ -1265,7 +1265,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -1285,7 +1285,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 

tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini

@@ -473,7 +473,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -493,7 +493,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 

tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini

@@ -182,7 +182,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port system.cpu2.icache_port system.cpu2.dcache_port system.cpu3.icache_port system.cpu3.dcache_port system.physmem.port[0]
 

tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini

@@ -461,7 +461,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -481,7 +481,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 

tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini

@@ -432,7 +432,7 @@ block_size=64
 bus_id=0
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=16
 port=system.l2c.mem_side system.physmem.port[0]
 
@@ -452,7 +452,7 @@ block_size=64
 bus_id=0
 clock=2
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=16
 port=system.l2c.cpu_side system.cpu0.l1c.mem_side system.cpu1.l1c.mem_side system.cpu2.l1c.mem_side system.cpu3.l1c.mem_side system.cpu4.l1c.mem_side system.cpu5.l1c.mem_side system.cpu6.l1c.mem_side system.cpu7.l1c.mem_side
 

tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini

@@ -128,7 +128,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=drivesys.tsunami.pciconfig.pio
 port=drivesys.bridge.side_a drivesys.tsunami.cchip.pio drivesys.tsunami.pchip.pio drivesys.tsunami.fake_sm_chip.pio drivesys.tsunami.fake_uart1.pio drivesys.tsunami.fake_uart2.pio drivesys.tsunami.fake_uart3.pio drivesys.tsunami.fake_uart4.pio drivesys.tsunami.fake_ppc.pio drivesys.tsunami.fake_OROM.pio drivesys.tsunami.fake_pnp_addr.pio drivesys.tsunami.fake_pnp_write.pio drivesys.tsunami.fake_pnp_read0.pio drivesys.tsunami.fake_pnp_read1.pio drivesys.tsunami.fake_pnp_read2.pio drivesys.tsunami.fake_pnp_read3.pio drivesys.tsunami.fake_pnp_read4.pio drivesys.tsunami.fake_pnp_read5.pio drivesys.tsunami.fake_pnp_read6.pio drivesys.tsunami.fake_pnp_read7.pio drivesys.tsunami.fake_ata0.pio drivesys.tsunami.fake_ata1.pio drivesys.tsunami.fb.pio drivesys.tsunami.io.pio drivesys.tsunami.uart.pio drivesys.tsunami.backdoor.pio drivesys.tsunami.ide.pio drivesys.tsunami.ethernet.pio drivesys.tsunami.ethernet.config drivesys.tsunami.ethernet.dma drivesys.tsunami.ide.config drivesys.tsunami.ide.dma
@@ -140,7 +140,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=drivesys.membus.badaddr_responder.pio
 port=drivesys.bridge.side_b drivesys.physmem.port[0] drivesys.cpu.icache_port drivesys.cpu.dcache_port
@@ -832,7 +832,7 @@ block_size=64
 bus_id=0
 clock=1000
 header_cycles=1
-responder_set=true
+use_default_range=true
 width=64
 default=testsys.tsunami.pciconfig.pio
 port=testsys.bridge.side_a testsys.tsunami.cchip.pio testsys.tsunami.pchip.pio testsys.tsunami.fake_sm_chip.pio testsys.tsunami.fake_uart1.pio testsys.tsunami.fake_uart2.pio testsys.tsunami.fake_uart3.pio testsys.tsunami.fake_uart4.pio testsys.tsunami.fake_ppc.pio testsys.tsunami.fake_OROM.pio testsys.tsunami.fake_pnp_addr.pio testsys.tsunami.fake_pnp_write.pio testsys.tsunami.fake_pnp_read0.pio testsys.tsunami.fake_pnp_read1.pio testsys.tsunami.fake_pnp_read2.pio testsys.tsunami.fake_pnp_read3.pio testsys.tsunami.fake_pnp_read4.pio testsys.tsunami.fake_pnp_read5.pio testsys.tsunami.fake_pnp_read6.pio testsys.tsunami.fake_pnp_read7.pio testsys.tsunami.fake_ata0.pio testsys.tsunami.fake_ata1.pio testsys.tsunami.fb.pio testsys.tsunami.io.pio testsys.tsunami.uart.pio testsys.tsunami.backdoor.pio testsys.tsunami.ide.pio testsys.tsunami.ethernet.pio testsys.tsunami.ethernet.config testsys.tsunami.ethernet.dma testsys.tsunami.ide.config testsys.tsunami.ide.dma
@@ -844,7 +844,7 @@ block_size=64
 bus_id=1
 clock=1000
 header_cycles=1
-responder_set=false
+use_default_range=false
 width=64
 default=testsys.membus.badaddr_responder.pio
 port=testsys.bridge.side_b testsys.physmem.port[0] testsys.cpu.icache_port testsys.cpu.dcache_port