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Author SHA1 Message Date
Gabe Black 69365876d8 ARM: Implement zero/sign extend instructions. 2010-06-02 12:58:07 -05:00
Gabe Black 554fb3774e ARM: Add a base class for extend and add instructions. 2010-06-02 12:58:07 -05:00
Gabe Black cb2e3b0ace ARM: Generalize the saturation instruction bases for use in other instructions. 2010-06-02 12:58:07 -05:00
Gabe Black a1208aa66d ARM: Decode the 8/16 bit signed/unsigned add/subtract half instructions. 2010-06-02 12:58:07 -05:00
Gabe Black cabf766a06 ARM: Implement the 8/16 bit signed/unsigned add/subtract half instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 82614b6f3a ARM: Fix signed most significant multiply instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 3cff58602a ARM: Fix multiply overflow flag setting. 2010-06-02 12:58:06 -05:00
Gabe Black 90c2284714 ARM: Decode the saturation instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 61b8e33225 ARM: Implement the saturation instructions. 2010-06-02 12:58:06 -05:00
Gabe Black c96f03a250 ARM: Implement base classes for the saturation instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 0aff168f1a ARM: Decode the signed add/subtract and subtract/add instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 8ba812f1fb ARM: Implement signed add/subtract and subtract/add. 2010-06-02 12:58:06 -05:00
Gabe Black a895514d35 ARM: Decode the unsigned 8 and 16 bit add and subtract instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 3f12eb02ab ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts. 2010-06-02 12:58:06 -05:00
Gabe Black 29acf9516c ARM: Decode the unsigned saturating instructions. 2010-06-02 12:58:06 -05:00
Gabe Black be888e67e7 ARM: Implement the unsigned saturating instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 5495ebd68d ARM: Decode the ssub instructions. 2010-06-02 12:58:06 -05:00
Gabe Black fd6e9f304e ARM: Implement the ssub instructions. 2010-06-02 12:58:06 -05:00
Gabe Black bcf0454864 ARM: Decode the SADD8 and SADD16 instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 87975aa691 ARM: Implement the SADD8 and SADD16 instructions. 2010-06-02 12:58:06 -05:00
Gabe Black d70c31437a ARM: Support instructions that set the GE bits when they write the condition codes. 2010-06-02 12:58:06 -05:00
Gabe Black e32aaefe8c ARM: Decode 32 bit thumb data processing register instructions. 2010-06-02 12:58:06 -05:00
Gabe Black f19b605aed ARM: Decode the 16 bit thumb versions of the REV* instructions. 2010-06-02 12:58:06 -05:00
Gabe Black 15356af288 ARM: Decode the ARM version of the REV* instructions. 2010-06-02 12:58:05 -05:00
Gabe Black 59c726b6f4 ARM: Pull decoding of ARM pack, unpack, saturate and reverse instructions into a format. 2010-06-02 12:58:05 -05:00
Gabe Black aa8493d7d1 ARM: Implement the REV* instructions. 2010-06-02 12:58:05 -05:00
Gabe Black c981a4de2b ARM: Add base classes suitable for the REV* instructions. 2010-06-02 12:58:05 -05:00
Gabe Black 57443a2144 ARM: Make LDM that loads the PC perform an interworking branch. 2010-06-02 12:58:05 -05:00
Gabe Black 1344fc2668 ARM: Decode the swp and swpb instructions. 2010-06-02 12:58:05 -05:00
Gabe Black e157b1f52a ARM: Implement the swp and swpb instructions. 2010-06-02 12:58:05 -05:00
Gabe Black 1884ed65bd ARM: Decode MRS and MSR for thumb. 2010-06-02 12:58:05 -05:00
Gabe Black ff3b21bc2b ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones. 2010-06-02 12:58:05 -05:00
Gabe Black f0811eb208 ARM: Define versions of MSR and MRS outside the decoder. 2010-06-02 12:58:05 -05:00
Gabe Black f61bb9adb9 ARM: Hook up the push/pop versions of stm/ldm in thumb. 2010-06-02 12:58:05 -05:00
Gabe Black a76ab8e040 ARM: Hook SVC into the thumb decoder. 2010-06-02 12:58:05 -05:00
Gabe Black cbdebf852e ARM: Implement SVC (was SWI) outside of the decoder. 2010-06-02 12:58:05 -05:00
Gabe Black 34032f97d6 ARM: Trigger system calls from the SupervisorCall invoke method. 
This simplifies the decoder slightly, and makes the system call mechanism
very slightly more realistic.
 2010-06-02 12:58:05 -05:00
Gabe Black 52460938cb ARM: Fix multiply operations. 
These fixes were provided by Ali and fix the saturation condition code and
various multiply instructions.
 2010-06-02 12:58:05 -05:00
Gabe Black 4fb6fcd82d ARM: Decode the scalar saturating add/subtract instructions. 2010-06-02 12:58:05 -05:00
Gabe Black 30dd622622 ARM: Decode the parallel add and subtract instructions. 2010-06-02 12:58:05 -05:00
Gabe Black 62e8487d57 ARM: Implement signed saturating add and/or subtract instructions. 2010-06-02 12:58:05 -05:00
Gabe Black a1253ec644 ARM: Implemented prefetch instructions/decoding (pli, pld, pldw). 2010-06-02 12:58:05 -05:00
Gabe Black 61b00d3224 ARM: Decode unconditional ARM instructions. 2010-06-02 12:58:04 -05:00
Gabe Black 89060f1fd8 ARM: Rework how unrecognized/unimplemented instructions are handled. 
Instead of panic immediately when these instructions are executed, an
UndefinedInstruction fault is returned. In FS mode (not currently
implemented), this is the fault that should, to my knowledge, be triggered in
these situations and should be handled using the normal architected
mechanisms. In SE mode, the fault causes a panic when it's invoked that gives
the same information as the instruction did. When/if support for speculative
execution of ARM is supported, this will allow a mispeculated and unrecognized
and/or unimplemented instruction from causing a panic. Only once the
instruction is going to be committed will the fault be invoked, triggering the
panic.
 2010-06-02 12:58:04 -05:00
Gabe Black aa45fafb2e ARM: Add support for "SUBS PC, LR and related instructions". 2010-06-02 12:58:04 -05:00
Gabe Black 2419903dc0 ARM: Make ldrs into the PC and ldm exception return do interworking branches. 2010-06-02 12:58:04 -05:00
Gabe Black 28227440a7 ARM: Align the PC when using it as the base for a load. 2010-06-02 12:58:04 -05:00
Gabe Black d63f748b53 ARM: Implement ADR as separate from ADD. 2010-06-02 12:58:04 -05:00
Gabe Black e92dc21fde ARM: Add support for interworking branch ALU instructions. 2010-06-02 12:58:04 -05:00
Gabe Black 11c3361be4 ARM: Fix when the flag bits are updated for thumb. 2010-06-02 12:58:04 -05:00
Gabe Black 05d880f7a1 ARM: Restrict the shift amount from a register to 8 bits. 
The shift amount when taken from a register is supposed to be truncated to an
8 bit value.
 2010-06-02 12:58:04 -05:00
Gabe Black 9ebaf8ecd5 ARM: Define the VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
Gabe Black 3f83094af2 ARM: Decode the VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
Gabe Black 2f3102f1ef ARM: Add templates for VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
Gabe Black cb631d87c3 ARM: Add floating point load/store microops. 2010-06-02 12:58:04 -05:00
Gabe Black 3a11412c99 ARM: Add an fp version of one of the microop indexed registers. 2010-06-02 12:58:04 -05:00
Gabe Black a8eb9d521c ARM: Eliminate the unused rhi and rlo operands. 2010-06-02 12:58:03 -05:00
Gabe Black b02c7f1bcd ARM: Move the macro mem constructor out of the isa desc. 
This code doesn't use the parser at all, and moving it out reduces the
conceptual complexity of that code.
 2010-06-02 12:58:03 -05:00
Gabe Black 7b62e9ad71 ARM: Make macroops panic if executed directly. 
The macroop should never be executed, only it's microops will.
 2010-06-02 12:58:03 -05:00
Ali Saidi 8fadf2691d ARM: GCC < 4.3 has some issues with attribute no return on some functions. Fix so it works for older gccs. 2010-06-02 12:58:03 -05:00
Gabe Black f18040a205 ARM: Split out the "basic" templates and format. 
--HG--
rename : src/arch/arm/isa/formats/basic.isa => src/arch/arm/isa/templates/basic.isa
 2010-06-02 12:58:03 -05:00
Gabe Black c175f1b993 ARM: Remove unnecessary cruft from includes.isa. 2010-06-02 12:58:03 -05:00
Gabe Black e29ec7d2ed ARM: Move the inst2string function out of the isa_desc. 
Delete the now empty formats/util.isa.
 2010-06-02 12:58:03 -05:00
Gabe Black ae135228fc ARM: Get rid of the unused ArmGenericCodeSubs. 2010-06-02 12:58:03 -05:00
Gabe Black 458bd025d4 ARM: Remove special naming for the new version of multiply. 2010-06-02 12:58:03 -05:00
Gabe Black 2196f75a25 ARM: Hook the new multiply instructions into all the decoders. 2010-06-02 12:58:03 -05:00
Gabe Black 33da368e99 ARM: Implement all integer multiply instructions. 2010-06-02 12:58:03 -05:00
Gabe Black 50229be27f ARM: Add templates for multiply instructions. 2010-06-02 12:58:03 -05:00
Gabe Black 3430b34cff ARM: Add base classes for multiply instructions. 2010-06-02 12:58:03 -05:00
Gabe Black c7d2f43641 ARM: Decode plain binary immediate thumb data processing instructions. 2010-06-02 12:58:03 -05:00
Gabe Black dcf218155d ARM: Define a new "movt" data processing instruction. 2010-06-02 12:58:03 -05:00
Gabe Black b615ed1470 ARM: Hook the new branch instructions into the 32 bit thumb decoder. 2010-06-02 12:58:03 -05:00
Gabe Black 274badd201 ARM: Hook the new branch instructions into the 16 bit thumb decoder. 2010-06-02 12:58:03 -05:00
Gabe Black b6b2f8891a ARM: Eliminate the old style branch instructions. 2010-06-02 12:58:03 -05:00
Gabe Black d082705b01 ARM: Hook the new branch instructions into the ARM decoder. 2010-06-02 12:58:02 -05:00
Gabe Black 9869343636 ARM: Implement branch instructions external to the decoder. 2010-06-02 12:58:02 -05:00
Gabe Black a6c1c8debb ARM: Add new templates for branch instructions. 2010-06-02 12:58:02 -05:00
Gabe Black 769f3406fe ARM: Replace the interworking branch base class with a special operand. 2010-06-02 12:58:02 -05:00
Gabe Black b6e7029dd5 ARM: Fix PC operand handling. 2010-06-02 12:58:02 -05:00
Gabe Black 7eb3ea2798 ARM: Remove the special naming from the new version of data processing instructions. 2010-06-02 12:58:02 -05:00
Gabe Black bf903ec9a1 ARM: Get rid of the unused Jump format. 2010-06-02 12:58:02 -05:00
Gabe Black 36ca0658a4 ARM: Get rid of obsoleted predicated inst formats, etc. 2010-06-02 12:58:02 -05:00
Gabe Black b66e3aec43 ARM: Hook the external data processing instructions into the Thumb decoder. 2010-06-02 12:58:02 -05:00
Gabe Black 8136cb3605 ARM: Hook the new external data processing instructions to the ARM decoder. 2010-06-02 12:58:02 -05:00
Gabe Black bf45d44cbe ARM: Implement data processing instructions external to the decoder. 2010-06-02 12:58:02 -05:00
Gabe Black c02f9cdddf ARM: Add new base classes for data processing instructions. 2010-06-02 12:58:02 -05:00
Gabe Black 1e7b317a98 ARM: Hook up 32 bit thumb load/store multiple. 2010-06-02 12:58:02 -05:00
Gabe Black 64d6b6ebfd ARM: Hook up 16 bit thumb load/store multiple. 2010-06-02 12:58:02 -05:00
Gabe Black 51bde086d5 ARM: Reimplement load/store multiple external to the decoder. 
--HG--
rename : src/arch/arm/isa/formats/macromem.isa => src/arch/arm/isa/insts/macromem.isa
rename : src/arch/arm/isa/formats/macromem.isa => src/arch/arm/isa/templates/macromem.isa
 2010-06-02 12:58:02 -05:00
Gabe Black 93a3714816 ARM: Move the templates for predicated instructions into a separate file. 
This allows the templates to all be available at the same time before any of
the formats, etc. This breaks an artificial circular dependence.

--HG--
rename : src/arch/arm/isa/formats/pred.isa => src/arch/arm/isa/templates/pred.isa
 2010-06-02 12:58:01 -05:00
Gabe Black 04300e33d4 ARM: Remove the special naming for the new memory instructions. 
These are the only memory instructions now.
 2010-06-02 12:58:01 -05:00
Gabe Black deb6e8f805 ARM: Eliminate the old memory formats which are no longer used. 2010-06-02 12:58:01 -05:00
Gabe Black 1905024766 ARM: Eliminate decoding for the very deprecated FPA instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 55465844dc ARM: Make the addressing mode 3 loads/stores use the externally defined instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 36b6ca2ce3 ARM: Pull double memory instructions out of the decoder. 2010-06-02 12:58:01 -05:00
Gabe Black a86491fbf2 ARM: Decode 16 bit thumb PC relative memory instructions. 2010-06-02 12:58:01 -05:00
Gabe Black dc8af1b211 ARM: Decode 16 bit thumb immediate addressed memory instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 4bbd73649d ARM: Decode 16 bit thumb register addressed memory instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 462cf6f49b ARM: Make single stores decode to the new external store instructions. 2010-06-02 12:58:01 -05:00
Gabe Black fde3c8f41d ARM: Make 32 bit thumb use the new, external load instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 3b93015304 ARM: Define the store instructions from outside the decoder. 
--HG--
rename : src/arch/arm/isa/insts/ldr.isa => src/arch/arm/isa/insts/str.isa
 2010-06-02 12:58:01 -05:00
Gabe Black 81fdced83f ARM: Define the load instructions from outside the decoder. 2010-06-02 12:58:01 -05:00
Gabe Black 8933857af7 ARM: Create a "decoder" directory for the files implementing the decoder. 
--HG--
rename : src/arch/arm/isa/armdecode.isa => src/arch/arm/isa/decoder/arm.isa
rename : src/arch/arm/isa/decoder.isa => src/arch/arm/isa/decoder/decoder.isa
rename : src/arch/arm/isa/thumbdecode.isa => src/arch/arm/isa/decoder/thumb.isa
rename : src/arch/arm/isa/vfpdecode.isa => src/arch/arm/isa/decoder/vfp.isa
 2010-06-02 12:58:01 -05:00
Gabe Black 4ebd44dc4f ARM: Flesh out the 32 bit thumb store single instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 386424ccb5 ARM: Implement the 32 bit thumb load word instructions. 2010-06-02 12:58:01 -05:00
Gabe Black 292b8a3c91 ARM: Add an operand for accessing the current PC. 2010-06-02 12:58:00 -05:00
Gabe Black 003346077f ARM: Flesh out 32 bit thumb load word decoding. 2010-06-02 12:58:00 -05:00
Gabe Black 0d4c4cacab ARM: Implement some 32 bit thumb data processing immediate instructions. 2010-06-02 12:58:00 -05:00
Gabe Black af91d27271 ARM: Add a base class for 32 bit thumb data processing immediate instructions. 2010-06-02 12:58:00 -05:00
Gabe Black 0116655674 ARM: Expand the decoding for 32 bit thumb data processing immediate instructions. 2010-06-02 12:58:00 -05:00
Gabe Black cef2e8ecee ARM: Stub out the 32 bit Thumb portion of the decoder. 2010-06-02 12:58:00 -05:00
Gabe Black 659f8d021f ARM: Add bitfields for 32 bit thumb. 2010-06-02 12:58:00 -05:00
Gabe Black bc6ae010c9 ARM: Decode VFP instructions. 2010-06-02 12:58:00 -05:00
Gabe Black 7b8525287d ARM: Stub out the 16 bit thumb decoder. 2010-06-02 12:58:00 -05:00
Gabe Black aaa619ea23 ARM: Add thumb bitfields to the ExtMachInst and the isa definition. 2010-06-02 12:58:00 -05:00
Gabe Black a1838f2c79 ARM: Make the decoder handle thumb instructions separately. 
--HG--
rename : src/arch/arm/isa/decoder.isa => src/arch/arm/isa/armdecode.isa
rename : src/arch/arm/isa/decoder.isa => src/arch/arm/isa/thumbdecode.isa
 2010-06-02 12:58:00 -05:00
Gabe Black 0dffd8ce79 ARM: Add a thumb bit bitfield. 2010-06-02 12:58:00 -05:00
Gabe Black f49cdb4f5d ARM: Make sure ExtMachInst is used consistently instead of regular MachInst. 2010-06-02 12:58:00 -05:00
Gabe Black 9ef82c0bc4 ARM: Track the current ISA mode using the PC. 2010-06-02 12:57:59 -05:00
Gabe Black 4b87bc887a ARM: Remove IsControl from operands that don't imply control transfers. 
Also remove IsInteger from CondCodes.
 2010-06-02 12:57:59 -05:00
Steve Reinhardt 4d77ea7a57 cpu: fix exec tracing memory corruption bug 
Accessing traceData (to call setAddress() and/or setData())
after initiating a timing translation was causing crashes,
since a failed translation could delete the traceData
object before returning.

It turns out that there was never a need to access traceData
after initiating the translation, as the traced data was
always available earlier; this ordering was merely
historical.  Furthermore, traceData->setAddress() and
traceData->setData() were being called both from the CPU
model and the ISA definition, often redundantly.

This patch standardizes all setAddress and setData calls
for memory instructions to be in the CPU models and not
in the ISA definition.  It also moves those calls above
the translation calls to eliminate the crashes.
 2010-03-23 08:50:57 -07:00
Ali Saidi 422f0d9f10 ARM: Begin implementing CP15 2009-11-17 18:02:09 -06:00
Ali Saidi 0916c376a9 ARM: Differentiate between LDM exception return and LDM user regs. 2009-11-17 18:02:08 -06:00
Ali Saidi 171e7f7b24 imported patch isa_fixes2.diff 2009-11-16 11:37:03 -06:00
Gabe Black 9127ee5ac8 ARM: Make the exception return form of ldm restore CPSR. 2009-11-15 00:23:14 -08:00
Gabe Black 903fb8c73d ARM: Create a new type of load uop that restores spsr into cpsr. 2009-11-15 00:15:42 -08:00
Gabe Black b41725f723 ARM: Check in the actual change from the last commit. 
The last commit was somehow empty. This was what was supposed to go in it.
 2009-11-14 21:03:10 -08:00
Gabe Black c4042985d7 ARM: Fix up the implmentation of the msr instruction. 2009-11-14 19:22:30 -08:00
Gabe Black 425ebf6bd7 ARM: Add a bitfield to indicate if an immediate should be used. 2009-11-14 19:22:30 -08:00
Gabe Black 812e390693 ARM: Fix up the implmentation of the mrs instruction. 2009-11-14 19:22:29 -08:00
Gabe Black 1df0025e28 ARM: More accurately describe the effects of using the control operands. 2009-11-14 19:22:29 -08:00
Gabe Black 50b9149c75 ARM: Hook up the moded versions of the SPSR. 
These registers can be accessed directly, or through MISCREG_SPSR which will
act as whichever SPSR is appropriate for the current mode.
 2009-11-14 19:22:29 -08:00
Ali Saidi 48bc573f5f ARM: Move around decoder to properly decode CP15 2009-11-14 11:25:00 -06:00
Gabe Black 5524af83ef ARM: Fix some bugs in the ISA desc and fill out some instructions. 2009-11-10 23:44:05 -08:00
Gabe Black 2e28da5583 ARM: Implement fault classes. 
Implement some fault classes using the curriously recurring template pattern,
similar to SPARCs.
 2009-11-10 20:34:38 -08:00
Gabe Black 8a4af3668d ARM: Support forcing load/store multiple to use user registers. 2009-11-08 15:49:03 -08:00
Gabe Black bb903b6514 ARM: Simplify the load/store multiple generation code. 
Specifically, get rid of the big switch statement so more cases can be
handled. Enumerating all the possible settings doesn't scale well. Also do
some minor style clean up.
 2009-11-08 15:16:59 -08:00
Gabe Black 48525f581c ARM: Split the condition codes out of the CPSR. 
This allows those bits to be renamed while allowing the other fields to
control the behavior of the processor.
 2009-11-08 02:08:40 -08:00
Gabe Black 78bd8fe44f ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR. 2009-11-08 01:59:20 -08:00
Gabe Black f63c260d89 ARM: Get rid of the Raddr operand. 2009-11-08 01:57:34 -08:00
Gabe Black 4a454c4f47 ARM: Set up an intregs.hh for ARM. 
Add constants for all the modes and registers, maps for aliasing, functions
that use the maps and range check, and use a named constant instead of a magic
number for the microcode register.
 2009-11-08 00:07:35 -08:00
Gabe Black 4971331b4f ARM: Mul and mla ignore the c and v flags, but we were setting them to 1. 2009-07-29 22:24:00 -07:00
Gabe Black d3f2992e39 ARM: Decode fstmx and fldmx instructions. We can ignore them for now. 2009-07-27 00:54:50 -07:00
Gabe Black c18d6cb1a7 ARM: Implement a basic version of the fmxr instruction. 2009-07-27 00:53:29 -07:00
Gabe Black 2828fa459d ARM: Implement a basic version of the fmrx instruction. 2009-07-27 00:53:24 -07:00
Gabe Black 4079792f2b ARM: Add in spots for the VFP control registers. 2009-07-27 00:53:10 -07:00
Gabe Black b560acfe17 ARM: Fix the CLZ instruction. 2009-07-27 00:52:59 -07:00
Ali Saidi 99831ed938 ARM: Handle register indexed system calls. 2009-07-27 00:51:01 -07:00
Gabe Black 3e2cad8370 ARM: Use custom read/write code to alias R15 with the PC. 2009-07-08 23:02:20 -07:00
Gabe Black 95392d3fb8 ARM: Move the remaining microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
Gabe Black 1d4f338b39 ARM: Move the memory microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
Gabe Black 70a75ceb84 ARM: Move the integer microops out of the decoder and into the ISA desc. 2009-07-08 23:02:19 -07:00
Gabe Black 4eb18cc07a ARM: Improve memory instruction disassembly. 2009-07-08 23:02:19 -07:00
Gabe Black ddcf084f16 ARM: Get rid of the MemAcc and EAComp static insts. 2009-07-08 23:02:19 -07:00
Gabe Black cae870eded ARM: Get rid of end_addr in the ArmMacroStore constructor. 2009-07-08 23:02:19 -07:00
Gabe Black 311f77f33d ARM: Add an AddrMode2 format for memory instructions that use address mode 2. 2009-07-08 23:02:19 -07:00
Gabe Black 826a3582ea ARM: Don't always update CPSR. 2009-07-08 23:02:19 -07:00
Gabe Black 17f0943398 ARM: Add an AddrMode3 format for memory instructions that use address mode 3. 2009-07-08 23:02:19 -07:00
Gabe Black dac0cb5c7e ARM: Add load/store double instructions. 2009-07-08 23:02:10 -07:00
Gabe Black 1ca0688c4c ARM: Add operands for the load/store double instructions. 2009-07-08 23:02:01 -07:00
Jack Whitham a223a065e6 ARM: Fix how address mode bits are handled. 2009-07-02 23:23:06 -07:00
Jack Whitham a738006397 ARM: Fix the code snippet for mla. 2009-07-02 23:22:58 -07:00
Gabe Black 26c70ce2cb ARM: Make DataOps select from a set of ways to set the c and v flags. 2009-07-01 22:17:06 -07:00
Gabe Black 148c265cf3 ARM: Get rid of some bitfields that aren't used. A few may need to be readded. 2009-07-01 22:16:51 -07:00
Gabe Black 7172e26cc4 ARM: Add a findLsbSet function and use it to implement clz. 2009-07-01 22:16:36 -07:00
Gabe Black f5141c23fd ARM: Add defaults for DataOp flag code. 2009-07-01 22:16:19 -07:00
Gabe Black 22a1ac22f4 ARM: Get rid of the val2 variable. 2009-07-01 22:16:05 -07:00
Gabe Black ce9cb1ecb5 ARM: Centralize the declaration of resTemp. 2009-07-01 22:15:39 -07:00
Gabe Black 776a06fd39 ARM: Add a DataImmOp format similar to DataOp. 2009-07-01 22:12:10 -07:00
Gabe Black 4f98171479 ARM: Decode some media instructions. These are untested. 2009-07-01 22:11:54 -07:00
Gabe Black b8f064c88c ARM: Use the new DataOp format to simplify the decoder. 2009-07-01 22:11:39 -07:00
Gabe Black f409d7819d ARM: Add in some new artificial fields that make decoding a little easier. 2009-07-01 22:11:27 -07:00
Gabe Black 065cb59427 ARM: Add a DataOp format so data op definitions can be aggregated. 2009-07-01 22:10:58 -07:00
Jack Whitman 7b5386d390 ARM: Fix signed multiply long and add some unimplemented loads. 2009-06-24 21:22:52 -07:00
Jack Whitman 853a0858f3 ARM: Link register is trashed by non-executed branch and link operations. 2009-06-24 21:22:46 -07:00
Jack Whitman 6dd4272804 ARM: Added unimplemented load/store multiple instructions. 2009-06-23 23:23:25 -07:00
Gabe Black 5c2a362cb7 ARM: Move util functions out of the isa desc. 2009-06-21 22:50:33 -07:00
Gabe Black d4a03f1900 ARM: Simplify the ISA desc by pulling some classes out of it. 2009-06-21 17:21:25 -07:00
Gabe Black 2a39570b78 ARM: Remove the currently unecessary FPAOp class. 2009-06-21 17:14:51 -07:00
Gabe Black d1d733f636 ARM: Make inst bitfields accessible outside of the isa desc. 2009-06-21 16:41:21 -07:00
Gabe Black 47e71d674a ARM: Don't downconvert ExtMachInsts to MachInsts. 2009-06-21 16:41:07 -07:00
Gabe Black 7e4f132369 ARM: Get rid of a few more unused operands. 2009-06-21 09:48:51 -07:00
Gabe Black 4415e2dcd6 ARM: Get rid of unnecessary Re operand. 2009-06-21 09:48:44 -07:00
Gabe Black 7d4ef8a398 ARM: Clear out some inherited hangers on in util.isa and utility.hh. 2009-06-21 09:43:55 -07:00
Gabe Black 5bc1373050 ARM: Get rid of unnecessary fp_enable_checks. 2009-06-21 09:41:04 -07:00
Gabe Black 3964709711 ARM: Adjust simplify rotate_imm slightly. 2009-06-21 09:38:54 -07:00
Gabe Black c20ce20e4c ARM: Make the isa parser aware that CPSR is being used. 2009-06-21 09:37:41 -07:00
Gabe Black 71e0d1ded2 ARM: Pull some static code out of the isa desc and create miscregs.hh. 2009-06-21 09:21:07 -07:00
Gabe Black 19a1966079 ARM: Get rid of unused postacc_code. 2009-06-21 09:16:55 -07:00
Nathan Binkert 82c9e6a5fc gcc: work around a bogus gcc error 2009-05-12 22:33:05 -07:00
Stephen Hines 7a7c4c5fca arm: add ARM support to M5 2009-04-05 18:53:15 -07:00