ARM: Fix when the flag bits are updated for thumb.
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Gabe Black
parent
14d25fbad0
commit
11c3361be4
1 changed files with 30 additions and 29 deletions
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@ -168,30 +168,30 @@ def format Thumb16ShiftAddSubMoveCmp() {{
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const IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 8, 6);
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switch (bits(machInst, 13, 11)) {
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case 0x0: // lsl
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return new MovReg(machInst, rd, INTREG_ZERO, rn, imm5, LSL);
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return new MovRegCc(machInst, rd, INTREG_ZERO, rn, imm5, LSL);
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case 0x1: // lsr
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return new MovReg(machInst, rd, INTREG_ZERO, rn, imm5, LSR);
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return new MovRegCc(machInst, rd, INTREG_ZERO, rn, imm5, LSR);
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case 0x2: // asr
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return new MovReg(machInst, rd, INTREG_ZERO, rn, imm5, ASR);
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return new MovRegCc(machInst, rd, INTREG_ZERO, rn, imm5, ASR);
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case 0x3:
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switch (bits(machInst, 10, 9)) {
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case 0x0:
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return new AddReg(machInst, rd, rn, rm, 0, LSL);
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return new AddRegCc(machInst, rd, rn, rm, 0, LSL);
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case 0x1:
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return new SubReg(machInst, rd, rn, rm, 0, LSL);
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return new SubRegCc(machInst, rd, rn, rm, 0, LSL);
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case 0x2:
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return new AddImm(machInst, rd, rn, imm3, true);
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return new AddImmCc(machInst, rd, rn, imm3, true);
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case 0x3:
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return new SubImm(machInst, rd, rn, imm3, true);
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return new SubImmCc(machInst, rd, rn, imm3, true);
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}
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case 0x4:
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return new MovImm(machInst, rd8, INTREG_ZERO, imm8, true);
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return new MovImmCc(machInst, rd8, INTREG_ZERO, imm8, false);
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case 0x5:
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return new CmpImmCc(machInst, INTREG_ZERO, rd8, imm8, true);
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case 0x6:
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return new AddImm(machInst, rd8, rd8, imm8, true);
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return new AddImmCc(machInst, rd8, rd8, imm8, true);
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case 0x7:
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return new SubImm(machInst, rd8, rd8, imm8, true);
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return new SubImmCc(machInst, rd8, rd8, imm8, true);
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}
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}
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'''
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@ -204,37 +204,37 @@ def format Thumb16DataProcessing() {{
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const IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 5, 3);
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switch (bits(machInst, 9, 6)) {
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case 0x0:
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return new AndReg(machInst, rdn, rdn, rm, 0, LSL);
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return new AndRegCc(machInst, rdn, rdn, rm, 0, LSL);
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case 0x1:
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return new EorReg(machInst, rdn, rdn, rm, 0, LSL);
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return new EorRegCc(machInst, rdn, rdn, rm, 0, LSL);
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case 0x2: //lsl
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return new MovRegReg(machInst, rdn, INTREG_ZERO, rdn, rm, LSL);
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return new MovRegRegCc(machInst, rdn, INTREG_ZERO, rdn, rm, LSL);
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case 0x3: //lsr
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return new MovRegReg(machInst, rdn, INTREG_ZERO, rdn, rm, LSR);
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return new MovRegRegCc(machInst, rdn, INTREG_ZERO, rdn, rm, LSR);
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case 0x4: //asr
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return new MovRegReg(machInst, rdn, INTREG_ZERO, rdn, rm, ASR);
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return new MovRegRegCc(machInst, rdn, INTREG_ZERO, rdn, rm, ASR);
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case 0x5:
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return new AdcReg(machInst, rdn, rdn, rm, 0, LSL);
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return new AdcRegCc(machInst, rdn, rdn, rm, 0, LSL);
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case 0x6:
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return new SbcReg(machInst, rdn, rdn, rm, 0, LSL);
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return new SbcRegCc(machInst, rdn, rdn, rm, 0, LSL);
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case 0x7: // ror
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return new MovRegReg(machInst, rdn, INTREG_ZERO, rdn, rm, ROR);
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return new MovRegRegCc(machInst, rdn, INTREG_ZERO, rdn, rm, ROR);
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case 0x8:
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return new TstReg(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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return new TstRegCc(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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case 0x9:
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return new RsbImm(machInst, rdn, rm, 0, true);
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return new RsbImmCc(machInst, rdn, rm, 0, true);
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case 0xa:
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return new CmpReg(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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return new CmpRegCc(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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case 0xb:
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return new CmnReg(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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return new CmnRegCc(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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case 0xc:
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return new OrrReg(machInst, rdn, rdn, rm, 0, LSL);
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return new OrrRegCc(machInst, rdn, rdn, rm, 0, LSL);
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case 0xd:
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return new Mul(machInst, rdn, rm, rdn);
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return new MulCc(machInst, rdn, rm, rdn);
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case 0xe:
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return new BicReg(machInst, rdn, rdn, rm, 0, LSL);
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return new BicRegCc(machInst, rdn, rdn, rm, 0, LSL);
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case 0xf:
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return new MvnReg(machInst, rdn, INTREG_ZERO, rm, 0, LSL);
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return new MvnRegCc(machInst, rdn, INTREG_ZERO, rm, 0, LSL);
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}
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}
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'''
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@ -251,7 +251,7 @@ def format Thumb16SpecDataAndBx() {{
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case 0x0:
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return new AddReg(machInst, rdn, rdn, rm, 0, LSL);
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case 0x1:
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return new CmpReg(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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return new CmpRegCc(machInst, INTREG_ZERO, rdn, rm, 0, LSL);
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case 0x2:
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return new MovReg(machInst, rdn, INTREG_ZERO, rm, 0, LSL);
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case 0x3:
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@ -392,10 +392,10 @@ def format Thumb32DataProcModImm() {{
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return '''
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if (s) {
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return new %(mnem)sImmCc(machInst, %(dest)s,
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%(op1)s, imm, true);
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%(op1)s, imm, rotC);
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} else {
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return new %(mnem)sImm(machInst, %(dest)s,
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%(op1)s, imm, true);
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%(op1)s, imm, rotC);
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}
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''' % {"mnem" : mnem, "dest" : dest, "op1" : op1}
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@ -407,6 +407,7 @@ def format Thumb32DataProcModImm() {{
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const IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
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const uint32_t ctrlImm = bits(machInst.instBits, 26) << 3 |
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bits(machInst, 14, 12);
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const bool rotC = ctrlImm > 3;
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const uint32_t dataImm = bits(machInst, 7, 0);
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const uint32_t imm = modified_imm(ctrlImm, dataImm);
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switch (op) {
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