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ARM: Create a new type of load uop that restores spsr into cpsr.

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This commit is contained in:
Gabe Black 2009-11-15 00:15:42 -08:00
parent b41725f723
commit 903fb8c73d
1 changed files with 17 additions and 0 deletions
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17
src/arch/arm/isa/formats/macromem.isa
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@ -72,6 +72,18 @@ let {{
'predicate_test': predicateTest},
['IsMicroop'])
microLdrRetUopCode = '''
Ra = Mem;
Cpsr = cpsrWriteByInstr(Cpsr, Spsr, 0xF, true);
'''
microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop',
'MicroMemOp',
{'memacc_code': microLdrRetUopCode,
'ea_code':
'EA = Rb + (UP ? imm : -imm);',
'predicate_test': predicateTest},
['IsMicroop'])
microStrUopIop = InstObjParams('str_uop', 'MicroStrUop',
'MicroMemOp',
{'memacc_code': 'Mem = Ra;',
@ -80,14 +92,19 @@ let {{
['IsMicroop'])
header_output = MicroMemDeclare.subst(microLdrUopIop) + \
MicroMemDeclare.subst(microLdrRetUopIop) + \
MicroMemDeclare.subst(microStrUopIop)
decoder_output = MicroConstructor.subst(microLdrUopIop) + \
MicroConstructor.subst(microLdrRetUopIop) + \
MicroConstructor.subst(microStrUopIop)
exec_output = LoadExecute.subst(microLdrUopIop) + \
LoadExecute.subst(microLdrRetUopIop) + \
StoreExecute.subst(microStrUopIop) + \
LoadInitiateAcc.subst(microLdrUopIop) + \
LoadInitiateAcc.subst(microLdrRetUopIop) + \
StoreInitiateAcc.subst(microStrUopIop) + \
LoadCompleteAcc.subst(microLdrUopIop) + \
LoadCompleteAcc.subst(microLdrRetUopIop) + \
StoreCompleteAcc.subst(microStrUopIop)
}};