Commit graph

1044 commits

Author SHA1 Message Date
Ali Saidi
fae60c164e Arguments: Get rid of duplicate code for the Arguments class in each architecture.
Move the argument files to src/sim and add a utility.cc file with a function
getArguments() that returns the given argument in the architecture specific fashion.
getArguments() was getArg() is the architecture specific Argument class and has had
all magic numbers replaced with meaningful constants. Also add a function to the
Argument class for testing if an argument is NULL.

--HG--
rename : src/arch/alpha/arguments.cc => src/sim/arguments.cc
rename : src/arch/alpha/arguments.hh => src/sim/arguments.hh
extra : convert_revision : 8b93667bafaa03b52aadb64d669adfe835266b8e
2007-08-01 16:59:14 -04:00
Gabe Black
239d124e83 MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.

--HG--
extra : convert_revision : 66ef7762024b72bb91147a5589a0779e279521e0
2007-08-01 13:55:47 -07:00
Gabe Black
e5e5b0119d X86: Fix for compilation bug with new cache code.
--HG--
extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
2007-08-01 12:49:58 -07:00
Gabe Black
4b29d22386 X86: Get rid of initialization of R11
R11 is just junk after the start of exectuion because we're "returning" from
an execve call and linux destroys the contents of rcx and r11 on system calls.

--HG--
extra : convert_revision : 6bf69a50ce56e0355dfdd41524163874340beec0
2007-08-01 12:00:32 -07:00
Gabe Black
4bdabe1254 Add a flag to indicate an instruction triggers a syscall in SE mode.
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
2007-07-31 17:34:08 -07:00
Gabe Black
55ade789d3 X86: Add operand type information to the fnstcw and fldw instruction placeholders.
These are the only floating point instructions that get used in my simple hello world test. These instructions are for setting up the floating point control register. Their not being implemented doesn't affect anything because floating point isn't used.

--HG--
extra : convert_revision : 4dfb9ef2a5665f034946c504978029e8799e64cd
2007-07-31 14:55:06 -07:00
Steve Reinhardt
c4c8a12186 Merge from head.
--HG--
extra : convert_revision : af16bc685ea28e44b8120f16b72f60a21d68c1e2
2007-07-31 00:37:07 -04:00
Gabe Black
ae3e1d22fc X86: Add decoding for x87 floating point.
--HG--
extra : convert_revision : 08f0f4a3d77a2c5eb9b5ca0cae7d0be9a72febec
2007-07-30 17:54:01 -07:00
Gabe Black
463e8a7516 X86: Attach the "DIV" instruction implementation to the decoder.
--HG--
extra : convert_revision : 8aef1c8d1ced2db998ed0d31241cadc17e19eadd
2007-07-30 15:44:48 -07:00
Gabe Black
595ff465e5 X86: Remove a naming conflict between the register index parameters and the "picked" register values.
--HG--
extra : convert_revision : 7b2c1be509478153ebf396841e4cbeccee3e03d1
2007-07-30 15:44:21 -07:00
Gabe Black
77482dc439 X86: __pad0 should be a 4 byte pad, not a 4 long array of 4 byte pads.
--HG--
extra : convert_revision : e0d5ab617bc95d5d714fa9fcdf0a448874aef886
2007-07-30 15:43:20 -07:00
Gabe Black
f02bb63894 X86: Turn on the exit_group, exit, munmap, and write syscalls.
--HG--
extra : convert_revision : e358c18cd999a8e274108e06502c3324c2d12d3b
2007-07-30 15:42:42 -07:00
Gabe Black
43f0be5253 X86: Use an mmap base address that matches what an actual machine uses.
--HG--
extra : convert_revision : 98521797bbc6360301b3c6a6b1b8e28236ef570e
2007-07-30 15:42:04 -07:00
Gabe Black
890e583163 X86: Set up RIP relative LEA instructions operands correctly.
--HG--
extra : convert_revision : 820cafadd550487c0d62c5082261b0886fce4f0d
2007-07-30 15:41:08 -07:00
Gabe Black
44c3419e1a X86: Implement unsigned divide. The non-byte version ignores rdx which it shouldn't.
--HG--
extra : convert_revision : 07e5509fb8ed9d73c144d6f52951ebc02e7c0032
2007-07-30 15:40:39 -07:00
Gabe Black
74fcf117dd X86: Allow RIP relative decode on -all- memory forms of operands.
--HG--
extra : convert_revision : 8af62cda2ce1c4acfa26a028a4f7506647bc27f7
2007-07-30 15:39:25 -07:00
Gabe Black
65db30992c X86: Take into account the regular registers and the microcode registers when decided whether or not to fold.
--HG--
extra : convert_revision : 26feec984dec61799c4afb03a4503a53c35872c5
2007-07-30 15:38:40 -07:00
Gabe Black
9536120845 X86: Fix up the stat structure. This probably still isn't right.
--HG--
extra : convert_revision : 2e2a22cdf3abe648c9e1309b9070cfd10fc4a8b8
2007-07-30 13:31:59 -07:00
Gabe Black
a1b193f026 X86: Hook in the new instructions.
--HG--
extra : convert_revision : c4233001b35b52161083482841593ec28da6ff7d
2007-07-30 13:31:27 -07:00
Gabe Black
ab8ba813c9 X86: Turn on some system calls, and make the kernel version match my development machine.
--HG--
extra : convert_revision : 2f1969a45aa82708dc4cddef09c01306f76f0a81
2007-07-30 13:30:41 -07:00
Gabe Black
9e2b1f8630 X86: Make sure FP_Base_DepTag is big enough to avoid trouble.
--HG--
extra : convert_revision : 7e0a83d5deb7fc9aaa69b7d024ea6ae6890df133
2007-07-30 13:29:56 -07:00
Gabe Black
18be07289f X86: Implement a stub CPUID function which is hardcode to return certain values.
--HG--
extra : convert_revision : 4085e04fd13e834646106faa55726d07d9631f42
2007-07-30 13:29:33 -07:00
Gabe Black
dbc979b9e2 X86: Force jumps to use 64 bit operand size.
--HG--
extra : convert_revision : 1c3685e7f4d07d5b4ded6c78b794964f51a358a9
2007-07-30 13:28:31 -07:00
Gabe Black
bae96272a1 X86: Make instructions use pick, and implement/adjust some multiplication microops and instructions.
--HG--
extra : convert_revision : 5c56f6819ee07d936b388b3d1810a3b73db84f9c
2007-07-30 13:28:05 -07:00
Gabe Black
fad96cd0fc X86: Make merge and pick work with high bytes. Fix a sizing issue in pick.
--HG--
extra : convert_revision : 4ddc2ca8c23bb7e90a646329ebf27a013ac5e3d6
2007-07-30 13:26:48 -07:00
Gabe Black
0d31a41304 X86: Make register names in disassembly reflect high bytes.
--HG--
extra : convert_revision : e2891581e5504de0a2c8e5932fd22425cafd4fc7
2007-07-30 13:26:14 -07:00
Gabe Black
31a862b8f1 X86: missed a file which adds a "fold" bit.
--HG--
extra : convert_revision : 2c8eea425221d069a9bb888c8f18839843061899
2007-07-30 13:25:38 -07:00
Gabe Black
da84aa95a9 Make the register indices use the appropriate "fold" bit.
--HG--
extra : convert_revision : 89e15e2ef1f709f2c09238b78f94505ce8ef146d
2007-07-30 13:25:00 -07:00
Gabe Black
d8beeff324 X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded".
--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
2007-07-30 13:23:33 -07:00
Gabe Black
9b5421dcba X86: Missed a file for adding a bit to indicate that an REX prefix was present.
--HG--
extra : convert_revision : f1bbd5165a7415d0daf27660575d30c41510f531
2007-07-30 13:20:08 -07:00
Gabe Black
4b3a20cdec X86: Implement LEAVE
--HG--
extra : convert_revision : c642d5018ece82c644e1cfa389b2d3dbd6ab5ffd
2007-07-30 13:19:11 -07:00
Gabe Black
e70ffb0117 X86: Add a bitfield to indicate whether or not an REX prefix was present.
--HG--
extra : convert_revision : 9c4802f6c6e4eaab36aac900e2c7576682cb0f33
2007-07-30 13:17:34 -07:00
Gabe Black
7309d5ee45 X86: Make logic instructions flag setting work.
The instructions now ask for the appropriate flags to be set, and the microops do the "right thing" with the CF and OF flags, namely zero them.

--HG--
extra : convert_revision : 85138a832f44c879bf8a11bd3a35b58be6272ef3
2007-07-29 13:51:40 -07:00
Gabe Black
1af50a9e8b X86: Make arithmetic instructions set the appropriate flags.
--HG--
extra : convert_revision : 3bdef3876c7b86bc93365edee876b74a201d625f
2007-07-29 13:50:10 -07:00
Steve Reinhardt
08474ccf68 Merge Gabe's changes from head.
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
2007-07-29 13:25:14 -07:00
Gabe Black
5e34c62b3b X86: Initial stack frame fixes and constant shuffling.
The initial stack frame for x86 is now substantially more correct. The fixes made here can be back ported to SPARC and possible the other ISAs as well. The auxiliary vector types were moved to the LiveProcess base class because they are independent of ISA. Some of the types may only apply to Linux, though, so they may have to be moved.

--HG--
extra : convert_revision : 89ace35fcc8eb9586d2fee8eeccbc3686499ef24
2007-07-29 01:33:06 -07:00
Gabe Black
e5f5890365 X86: Make limm use merge and allow overriding the data size.
--HG--
extra : convert_revision : c6057226b8ff8f272612a9d3bf7d1d9ba90c819b
2007-07-29 01:30:28 -07:00
Gabe Black
33847f8c83 X86: return -return_value.value() on failure.
--HG--
extra : convert_revision : d8e1486ff075b2917be62a0008f83fd6c9e4c09a
2007-07-29 01:27:34 -07:00
Gabe Black
d995575342 X86: Fix popa and push with the stack pointer.
POPA used st instead of ld, and it didn't skip rsp. push rsp needs to store the -original- value of the stack pointer.

--HG--
extra : convert_revision : 376370c99b6ab60fb2bc4cd4f0a6dce71153ad06
2007-07-29 01:26:47 -07:00
Gabe Black
3dcd848ec3 X86: Fix a bug with merge
Merge was returning the value to merge in, not the actual result of the merge.

--HG--
extra : convert_revision : 230b4b5064037d099ae7859edabdf5be84603849
2007-07-29 01:24:57 -07:00
Gabe Black
dc86f3229c X86: Fix a comment and adjust the stack base address.
The stack base on my development machine starts one page below where it needs to. I don't know why it does, but I've duplicated it in m5.

--HG--
extra : convert_revision : c4783ba885b90f17e843f61e07af0bc3330a74bc
2007-07-28 21:18:53 -07:00
Gabe Black
fe46e28b14 Merge with head.
--HG--
extra : convert_revision : 3c1ff2585c9b20649792344b4180f6d82cef9c1b
2007-07-28 21:04:45 -07:00
Gabe Black
e996ff7497 X86: Fix up auxiliary vectors.
The type constants should go into an architecture independent spot since they are universal to all Linux elf binaries. The right value for some of the vectors needs to be determined. Also, x86 does not store argc or argv_array_base in registers like some other architectures.

--HG--
extra : convert_revision : 8d3f6a3e028d881d3c41e8ddf4f29d25738b529c
2007-07-28 20:33:42 -07:00
Nathan Binkert
142362b703 merge whitespace changes
--HG--
extra : convert_revision : 20e8aa51935dc23ac3c7e6da2cb7a4e62c9a3a7c
2007-07-28 17:06:32 -07:00
Nathan Binkert
c27e23f2e8 style: Check/Fix whitespace on SCons files
--HG--
extra : convert_revision : 46e6b2dd8e1984cbab0ea24c94760794734c0f95
2007-07-28 16:49:20 -07:00
Nathan Binkert
f0fef8f850 Merge python and x86 changes with cache branch
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-26 23:15:49 -07:00
Gabe Black
d1e533a1e2 X86: Fix argument register indexing.
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.

--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
2007-07-26 22:13:14 -07:00
Gabe Black
876849724d X86: Hook in shift and rotate by one instructions, and NOT.
--HG--
extra : convert_revision : b3ab74e09f5cd02671cc6425c8cb8638bd58cbee
2007-07-26 22:10:59 -07:00
Gabe Black
edaaf1ebf1 X86: Fix pc relative versions of add and subtract.
--HG--
extra : convert_revision : c7e578aae8d36aa5d279fc27d6d7d28ed0a54181
2007-07-26 22:10:21 -07:00
Gabe Black
647a3270d1 X86: Implement rotate-by-one instructions, and make register rotates use registers.
--HG--
extra : convert_revision : 701691951688ecefdc6450d31076b45e9af15324
2007-07-26 22:09:41 -07:00
Gabe Black
9e975a7e08 X86: Implement shift-by-one instructions, and make register shifts use registers.
--HG--
extra : convert_revision : ce4af3e56b45821e0a8b27f288b532d2f9dd3336
2007-07-26 22:09:24 -07:00
Gabe Black
c0670187c5 X86: Add functions to read and write to an exec context.
These functions take care of calling the thread contexts read and write functions with the right sized data type, and handle unaligned accesses.

--HG--
extra : convert_revision : b4b59ab2b22559333035185946bae3eab316c879
2007-07-26 22:08:35 -07:00
Gabe Black
57428b8b0b X86: Fix carry calculation for subtraction based microops.
The carry flag should be calculated using the -complement- of the second operand, not it's negation. The carry in which is part of computing the 2's complement may induce a carry, but if you've already caused the carry before you get the carry computing logic involved, it will miss it.

--HG--
extra : convert_revision : 318cf86929664fc52ed9e023606a9e892eba635c
2007-07-26 22:06:30 -07:00
Gabe Black
749ed15b60 Add functions for mmap and brk.
--HG--
extra : convert_revision : 3d0340a2aae87b3462d6562b34ac7e02c685c1ef
2007-07-26 22:04:33 -07:00
Gabe Black
7d826f632c Implement NOT
--HG--
extra : convert_revision : 09cbed6332224d06644d401f21178eb7914993df
2007-07-26 22:03:19 -07:00
Gabe Black
26b1c455e0 Merge with head.
--HG--
extra : convert_revision : 4a34b3f91c4fc90055596245ae3efec45ea33888
2007-07-24 15:48:40 -07:00
Gabe Black
02c39000bf Hook in a bunch of new instructions, fix a few minor bugs, and expand out one of the prefix multiplexed opcode groups.
--HG--
extra : convert_revision : b5afd54a180a8fbdf9a892b1a2316fcf0d11afc6
2007-07-24 15:43:38 -07:00
Gabe Black
93365f7d1a Add a tgt_iovec structure to support writev, change the name of X86Linux to X86Linux64, add some syscalls.
--HG--
extra : convert_revision : 9c13e9c68f331fe6c4a9abd96f7aee0f064101fc
2007-07-24 15:42:11 -07:00
Gabe Black
4bb1c5ba0c Add a special case for "test" which needs an immediate even though everything else with it's opcode doesn't.
Also made some spacing consistent.

--HG--
extra : convert_revision : 72a317f29c11705782e19840bef24354214d3143
2007-07-24 15:37:16 -07:00
Gabe Black
97c4258383 The groups of instructions hanging off opcode 71h, 72h, and 73h all need a byte immediate
--HG--
extra : convert_revision : 9559047adfec1490c2d40065442a579549624fcc
2007-07-24 15:19:02 -07:00
Gabe Black
69f4a6dc86 Make the shift and rotate microops mask the shift/rotate amount correctly.
--HG--
extra : convert_revision : 31c5d3fa8ef0d37494d0e35cef31be6056d5d93f
2007-07-24 15:10:53 -07:00
Gabe Black
15f57bd7cb Fix immediate shifts. Implement register shifts.
--HG--
extra : convert_revision : 0b83422ad3c190021e46cada07e64d8d57d29859
2007-07-24 15:10:20 -07:00
Gabe Black
66911a1fab Fix immediate rotates and add register ones.
--HG--
extra : convert_revision : a6b9cee59019ea0f906c8a8e76eeb2cd73093671
2007-07-24 15:08:56 -07:00
Gabe Black
d961846e8c Clean out part of an old comment.
--HG--
extra : convert_revision : 6a6b2a06576ebe7383f7ce0e4e9f96bc96b84b56
2007-07-24 15:08:09 -07:00
Gabe Black
340ce8e680 Implement cmov.
--HG--
extra : convert_revision : 2e92623b53c1fe8b4da3fef3486c0dcd8d5ef9f5
2007-07-24 15:07:35 -07:00
Gabe Black
28614addff Implement cdqe and cqo, which are also called cbw and cwde, and cwd and cdq respectively, depending on the operand size.
--HG--
extra : convert_revision : 67ac035c68608d7260c21ce32009b344f3834e46
2007-07-24 15:07:03 -07:00
Gabe Black
f8f7f994b8 Implement setcc.
--HG--
extra : convert_revision : 7a47b9971fe9e4ac638b275fb56fdcba08c2d671
2007-07-24 15:05:17 -07:00
Gabe Black
1cec0a3249 Get rid of an old comment.
--HG--
extra : convert_revision : 1b86a7f60489bc65a03919b27afd4dfbe4e09bba
2007-07-24 15:04:53 -07:00
Gabe Black
7e52393432 Get rid of an old comment
--HG--
extra : convert_revision : 4d626721ad54af9cbf5b0c07a3a6e8a05e4e9ab5
2007-07-24 15:03:43 -07:00
Nathan Binkert
abc76f20cb Major changes to how SimObjects are created and initialized. Almost all
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23 21:51:38 -07:00
Gabe Black
ecf2621f4f Implement pusha, popa, three operand imul, hook them into the decoder, and clean up the decoder a little.
--HG--
extra : convert_revision : c1b8f0f433f629e4104e2b04addcdaabf57595e3
2007-07-23 11:20:57 -07:00
Gabe Black
85f9415a67 Make the operand size reflect the size specifier on the operand tags, and implement NEG
--HG--
extra : convert_revision : da73ed6820d57f083c18f44b2fa868fc0976dd16
2007-07-23 01:07:49 +00:00
Steve Reinhardt
d5c74657c9 Merge more changes in from head.
--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72
2007-07-22 08:10:59 -07:00
Steve Reinhardt
03730edc45 Merge Gabe's changes with mine.
--HG--
extra : convert_revision : f50ed42e7acb3f11e610fd6976eaa8df0c6ba2ab
2007-07-22 10:40:45 -04:00
Gabe Black
2cd454d102 Add the "open" syscall.
--HG--
extra : convert_revision : d405ed5d3738639809dd2887955db9253138ccbb
2007-07-22 02:43:03 +00:00
Gabe Black
47b0242618 Fixed immediate byte accounting bug.
--HG--
extra : convert_revision : ee5275da14a2923b9a525ae5b5c582c15df4608a
2007-07-22 02:34:52 +00:00
Gabe Black
bff4f765f5 Fixed displacement size bug.
--HG--
extra : convert_revision : c39249ef598c1bd555098d688381dc62541a07c0
2007-07-22 02:23:03 +00:00
Gabe Black
f7ff068b30 Implemented and hooked in xchg, rotate with carry, and ret instructions
--HG--
extra : convert_revision : a8e67b0ab4072308f01e0df7f7ee05b31f605a35
2007-07-21 19:29:39 -07:00
Gabe Black
ee6fbdc28b Implement rotate with carry microops.
--HG--
extra : convert_revision : 1d7ff6611e5b4766a5257c1e73681fabbe5f6d76
2007-07-21 19:27:38 -07:00
Gabe Black
fc1b7d62b7 Fixed the distinction between far and near versions of jmp, call and ret. Implemented some shifts, rotates, and pushes.
--HG--
extra : convert_revision : fcb06189ff213e82da16ac43231feb308cb3a285
2007-07-20 23:16:03 -07:00
Gabe Black
009df5ff1e Fixed line number accounting
--HG--
extra : convert_revision : 4c046493b98ce4a766c2121710d70650cb6a801e
2007-07-20 23:12:26 -07:00
Gabe Black
75f6c6a016 Implement UD2 and replace the place holder in the decoder.
--HG--
extra : convert_revision : 16d0d2b2ddad8759698fa4aa668c22063307c72b
2007-07-20 18:27:02 -07:00
Gabe Black
8dd93f32e4 Make the "name" function const.
--HG--
extra : convert_revision : eb71bc3edd92a544a5333786635fce550aaef233
2007-07-20 18:24:46 -07:00
Gabe Black
9093cb79a1 Implement adc and sbb instructions and microops.
--HG--
extra : convert_revision : a2d3068c5b487f4fa7bf5c9cebba7753bc390bfa
2007-07-20 17:17:11 -07:00
Gabe Black
c3669b8925 Implement the rest of the conditional jump instructions and hook them into the decoder.
--HG--
extra : convert_revision : 8d1d6abce29371def560e1c3f31dabb4de01366f
2007-07-20 17:02:39 -07:00
Gabe Black
231cc3effb Make the decoder take advantage of the new "B" operand format which takes a register index from the opcode itself.
--HG--
extra : convert_revision : 35f9be6559ee9833049eda1817982efdde7082be
2007-07-20 16:48:59 -07:00
Gabe Black
1ed6a8ed79 Define and fill out a lot of different instructions and instruction versions. Added two of the shift microops.
--HG--
extra : convert_revision : 0b76953dbb1dc3366242d4d209cccebde86bbe4e
2007-07-20 16:39:07 -07:00
Gabe Black
705a22b999 Hook in newly implemented instructions.
--HG--
extra : convert_revision : 53319d2363211af407dabaa2b63ad8a4df09c369
2007-07-20 15:05:37 -07:00
Gabe Black
dfcb2ffa46 Comment, implement, fix, and trim the move microassembly.
--HG--
extra : convert_revision : aa5ee7270e740bfbe42e70c4dfccc4c91ecacb33
2007-07-20 15:04:41 -07:00
Gabe Black
fcc23891bb Implement jnbe.
--HG--
extra : convert_revision : cdbf1ff5ed3a63787cbd2187a8a3455a41cc5085
2007-07-20 15:03:36 -07:00
Gabe Black
79b3208aa5 Appended _NEAR to the near version of call and return.
--HG--
extra : convert_revision : 70adb38d59ff7b5d103e58a9f0773dfb911fec6d
2007-07-20 15:03:03 -07:00
Gabe Black
f09847c7a6 Make load and store ops use the appropriate sized data access.
--HG--
extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
2007-07-20 15:02:09 -07:00
Gabe Black
d926de462a Implement the increment and decrement instructions, and the two operand form of signed multiplication.
--HG--
extra : convert_revision : d87df4b1b5470bed1d963dfe8e2ffa1403718342
2007-07-20 14:59:14 -07:00
Gabe Black
ec5f66190e Fix code that computes displacement size.
--HG--
extra : convert_revision : a9be3eb2b90b88086936aeb4dcf87ec7b58a48cb
2007-07-20 14:57:34 -07:00
Gabe Black
5d882984d1 Add a bitfield to decode based on what prefixes are used.
--HG--
extra : convert_revision : 7ff4998b3249ccfe86ae9cbcc63fb910683707f5
2007-07-20 14:57:04 -07:00
Gabe Black
dcfaa348b1 Add a parameter type to read a register index from the opcode itself.
--HG--
extra : convert_revision : d2b5468ebf5df5a6ccadb57a30c52c8d16417b9a
2007-07-20 14:55:16 -07:00
Gabe Black
0baae59c09 Fix carry flag for subtracts, and clean up code slightly.
--HG--
extra : convert_revision : 668f5d5aeba888488b41284de6c72a0d055c4ef4
2007-07-20 14:53:38 -07:00
Gabe Black
0781609693 Fixed width parameter and provided a parameter to flip the carry bit on subtract.
--HG--
extra : convert_revision : d01bb791b000a2fdfc8600f8fb2f8aadd52b0b63
2007-07-20 14:52:44 -07:00
Gabe Black
cfadef74d1 x86 fixes
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.

--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
2007-07-19 15:15:47 -07:00
Gabe Black
09f056a1ef Check for the two opcode prefix correctly and add in some instructions.
--HG--
extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97
2007-07-18 17:51:05 -07:00
Gabe Black
f6d326d6fc Hook near returns into the decoder.
--HG--
extra : convert_revision : b38d4417552991e44f5d1de1f35d5d1ad8f32340
2007-07-18 17:48:16 -07:00
Gabe Black
dbf361128a Implement near returns.
--HG--
extra : convert_revision : 3d6e8a976d31cb016a4b78200716b0ece155137a
2007-07-18 17:47:40 -07:00
Gabe Black
99310a1d93 Make instructions that conditionally set registers set them to their old value if they don't actually execute.
--HG--
extra : convert_revision : 36e63dd0c6ac1a3e1133c7985cf5507b83e9ee45
2007-07-18 17:46:38 -07:00
Gabe Black
776283cff8 Fix the overload which prints ExtMachInst in X86.
--HG--
extra : convert_revision : 2ef8ee71999f36b09270ba9526c2846beda65051
2007-07-18 17:45:43 -07:00
Gabe Black
05a33a443f Make store microops actually store instead of load.
--HG--
extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
2007-07-18 17:45:06 -07:00
Gabe Black
e209fce9de Fix a comment to refer to the right type of instruction.
--HG--
extra : convert_revision : dd441d8fbaed1ed8b2b66e3ad0275009bd4dcef4
2007-07-18 17:44:12 -07:00
Gabe Black
17f3da6c29 Fix the panic in the "error" format for x86,
--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
2007-07-18 17:43:30 -07:00
Gabe Black
6c54b654a8 Implement some forms of add.
--HG--
extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7
2007-07-18 16:33:56 -07:00
Gabe Black
bafb7ee5c1 Fix the operand types in a section of the decoder.
--HG--
extra : convert_revision : c37600fd65b44817eed2ba653f9d4f08a9869874
2007-07-18 16:26:52 -07:00
Gabe Black
b949458d4c Make the data size used by regops overridable in the microassembly.
--HG--
extra : convert_revision : 84d850aa5340c9d02d03502704b063215f6e2140
2007-07-18 16:26:17 -07:00
Gabe Black
387f00e3dd Fill out the miscreg file and add types to miscregs.hh
--HG--
extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
2007-07-18 16:12:39 -07:00
Gabe Black
5cca5ca3d9 Hook x86 nop into the decoder.
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
2007-07-18 16:11:52 -07:00
Gabe Black
3bd42af99e Implement the x86 nop to be a "fault" microop which returns "NoFault".
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
2007-07-18 16:10:44 -07:00
Gabe Black
dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst.
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
2007-07-18 16:09:35 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const.
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
2007-07-18 16:09:00 -07:00
Gabe Black
85f32920fb Calculate the correct address size.
--HG--
extra : convert_revision : 6bd9d5a01ba6600781e3678e0403dca524fb2cba
2007-07-17 20:54:55 -07:00
Gabe Black
e524240d68 Make disassembled x86 register indices reflect their size.
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
2007-07-17 18:12:33 -07:00
Gabe Black
2e80f71dcd Implemented jnz.
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
2007-07-17 16:55:33 -07:00
Gabe Black
62ffc71fab Use limm to set up immediate value for subtract instruction.
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
2007-07-17 16:50:13 -07:00
Gabe Black
d77d4c04b7 Implement the jz instruction.
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
2007-07-17 15:36:45 -07:00
Gabe Black
c4004482a5 Make "test" set some condition codes.
It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
2007-07-17 15:35:34 -07:00
Gabe Black
a6757095c3 Add in support for condition code flags.
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
2007-07-17 15:33:18 -07:00
Gabe Black
cf846d5205 Add in operand which holds the condition code bits of the flag register.
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
2007-07-17 15:28:48 -07:00
Gabe Black
bbf7163dd9 Add symbols for each of the flags a microop could set and each condition it could check.
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
2007-07-17 15:27:28 -07:00
Gabe Black
cbc24d6600 Actually include miscregs.hh
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
2007-07-17 13:30:23 -07:00
Gabe Black
b0643a08a3 Create a file to describe misc registers.
Define bitfields, indices, etc.

--HG--
extra : convert_revision : 8fffdc4cf796d304b12b317d8bddf5685bd50cf4
2007-07-17 13:29:40 -07:00
Gabe Black
aad11bf879 Add a spot for the condition code portion of the flag register.
This is stored in the integer register file so that it can be renamed, but it should be a misc reg.

--HG--
extra : convert_revision : eee48f24dd80b145f14427482047c4d8af2521ab
2007-07-17 13:26:06 -07:00
Gabe Black
873b762d4b Move bitunion code into it's own file.
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
2007-07-14 17:28:26 -07:00
Gabe Black
4f7809d5e6 Pull some hard coded base classes out of the isa description.
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-14 17:14:19 -07:00
Steve Reinhardt
288f9cf7d2 Merge from head.
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
2007-07-14 12:23:47 -07:00
Steve Reinhardt
e5ecfa2745 Disable PrintThreadInfo since it causes a panic when using VPtr.
See Flyspray #281.

--HG--
extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
2007-07-14 12:22:04 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event"
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
2007-06-30 17:45:58 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are
now encoded in cmd field.

--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-06-30 10:16:18 -07:00
Korey Sewell
738ecc495b fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions...
src/arch/mips/isa/decoder.isa:
    commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
    edit fp format
src/arch/mips/isa/formats/mem.isa:
    fix for basic store instructions

--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
2007-06-29 15:13:50 -04:00
Korey Sewell
e28cbc98a0 o3cpu build for mips
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
2007-06-28 05:30:46 -04:00
Korey Sewell
ac19e0c505 FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality...
src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565 add Control Bitfield class
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
2007-06-22 20:09:46 -04:00
Korey Sewell
753adb38d5 mips import pt. 1
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f Merge zizzer.eecs.umich.edu:/bk/newmem
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
2007-06-22 17:44:33 -04:00
Gabe Black
70d6044527 Make symbols for regular registers.
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59 Get rid of an unnecessary include file.
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

src/cpu/o3/fetch_impl.hh:
    hand merge

--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
2007-06-21 20:35:25 +00:00
Gabe Black
25e385e0cf Use the new symbols to clean up the assembler.
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053 Needed for last change set to work :P
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083 Define symbols for the x86 specialization of the microassembler.
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3 Fix a comment.
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols.
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958 Add in code that lays the ground work for setting flags.
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
2007-06-21 13:48:44 +00:00
Gabe Black
77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores.
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e Fix a newly introduced bug where the predecoder wasn't picking up all the displacement.
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014 X86 probably doesn't need a window save area.
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c Fix a typo in one of the operand type tags.
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1 Comment out some unnecessary debug output.
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282 Forgot to check these in...
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1 Comment out some unnecessary debug statements.
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
2007-06-20 19:04:38 +00:00
Gabe Black
a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh.
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro

src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Hand merge

--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction.
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
2007-06-19 22:40:10 +00:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
2007-06-19 18:17:34 +00:00
Gabe Black
d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL.
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85 Make an error message a little more descriptive.
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70 Renovate the "fault" microop implementation.
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list.
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
2007-06-19 14:26:42 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops.
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst.
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names.
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
2007-06-19 14:14:17 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output.
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly.
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
2007-06-18 14:15:00 +00:00
Gabe Black
3ceb0a46ae Add in some microregs.
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future.
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm.
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect.
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place.
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method.
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
2007-06-14 16:52:19 -04:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode.
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst.
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement.
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops.
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly.
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
2007-06-14 13:45:37 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst.
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names.
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP"
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though.
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly.
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up.
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
2007-06-12 17:35:11 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix.
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well.
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes.
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions.
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86.
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype.
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things.
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent.
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
2007-06-12 16:21:47 +00:00
Gabe Black
1493ceda8f Fix another outdated comment.
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments.
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment.
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment.
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft.
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little.
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
2007-06-08 17:06:34 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler.
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR.
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst.
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
2007-06-08 16:06:22 +00:00
Gabe Black
dba02f703b Make limm (load immediate) microop
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
2007-06-04 19:53:06 +00:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
2007-06-04 15:59:20 +00:00
Gabe Black
6e8a06b237 Clean things up
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
2007-06-01 16:24:51 +00:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly.
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
2007-05-31 20:45:04 +00:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor.
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in.
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
2007-05-31 13:50:35 +00:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated.
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
2007-05-24 21:54:51 -07:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
2007-05-18 13:36:47 -07:00
Gabe Black
6d199f0b25 Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
2007-05-09 22:04:58 -07:00
Gabe Black
4ad1b58fdd Merge zizzer.eecs.umich.edu:/bk/newmem
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
2007-05-09 20:50:46 -07:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
2007-05-09 15:37:46 -04:00
Gabe Black
dc1c9e0300 Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed.
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
2007-05-08 13:02:19 +00:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
2007-05-01 18:12:58 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized,
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
2007-04-27 13:59:17 -07:00
Gabe Black
cca881a531 Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
2007-04-23 11:34:39 -04:00
Gabe Black
cea5435760 Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used.
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f fixes for solaris compile
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-21 17:50:47 -04:00
Gabe Black
5a3dcc172a Make register indexes larger so they can actually hold all the legal values. Oops!
--HG--
extra : convert_revision : 7689b2e1f7468e4acb8be0f242f74002c79e7960
2007-04-14 17:08:24 +00:00
Gabe Black
3140dd88bc Make the fsr a serializing register. Other control registers probably need this as well.
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
2007-04-14 17:07:24 +00:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
2007-04-11 15:30:09 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu.
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message.
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles.
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
2007-04-11 12:25:00 +00:00
Gabe Black
798caa36ad Include the new GenFault microop.
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions.
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit.
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't.
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
2007-04-10 17:13:26 +00:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here.
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
2007-04-09 01:08:05 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly.
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
2007-04-06 16:55:56 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff.
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere.
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates.
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code.
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-06 15:15:36 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst.
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution.
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
2007-04-04 23:19:32 +00:00
Gabe Black
4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier:
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7 Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function.
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
2007-04-04 14:27:00 +00:00
Gabe Black
6010c6ded4 Added all the different variations of the register names.
--HG--
extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
2007-04-04 14:25:36 +00:00
Gabe Black
93d4c624c5 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 7be8ebe55a7b11552d78701520f93aa86db1e501
2007-04-03 15:01:36 +00:00
Gabe Black
61c56ffeaf A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented.
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
2007-04-03 15:01:09 +00:00
Gabe Black
0ce6936e7d Zero out ModRM if the byte isn't there, and fix some displacement size stuff.
--HG--
extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
2007-04-03 14:56:24 +00:00
Ali Saidi
c46e946c94 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 2f7f50f4ad31f741c0c67db96e49d30ca078fc94
2007-03-29 22:01:34 -04:00
Ali Saidi
8ca218cab5 get rid of CWP bounds warning...
--HG--
extra : convert_revision : 74df09341c091c2d6ca9b46c6a3521f22b48acf4
2007-03-29 15:57:11 -04:00
Gabe Black
7fcc9d2106 Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support.
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
2007-03-29 17:57:19 +00:00
Gabe Black
e67a207ad3 Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself.
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
2007-03-29 17:57:18 +00:00
Gabe Black
77ce05f478 Fidget with the syntax of the MultiOp format in anticipation of making it actually work.
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
2007-03-29 00:50:54 -07:00
Gabe Black
fd77212b72 Add code to generate register and immediate based integer op microop classes.
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
2007-03-29 00:49:53 -07:00
Gabe Black
0d5f6167ff Allow "let" blocks to add code to the output files.
--HG--
extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
2007-03-29 00:47:46 -07:00
Kevin Lim
4bad33ce9d Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
2007-03-24 14:00:16 -04:00
Gabe Black
e7bbd85ae6 Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
2007-03-23 21:47:03 -04:00
Kevin Lim
047f77102b Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

src/cpu/base_dyn_inst.hh:
    Hand merge.  Line is no longer needed because it's handled in the ISA.

--HG--
extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
2007-03-23 13:20:19 -04:00
Kevin Lim
2330adfa28 Make hardware loads/stores serializing; they need to avoid certain out-of-order interactions in the 21264.
--HG--
extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
2007-03-23 13:14:05 -04:00
Gabe Black
e3d3ab4513 Add structure based bitfield syntax to the isa_parser. This is primarily useful for x86.
--HG--
extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
2007-03-22 04:10:57 +00:00
Gabe Black
39182808bc Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
2007-03-22 04:10:56 +00:00
Gabe Black
276f6d794d Add a junk operand. With no operands, the parser breaks.
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
2007-03-21 21:09:24 +00:00
Gabe Black
bbffaa8ee0 Start implementing groups of instructions which do the same thing on different sets of inputs.
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
2007-03-21 21:07:43 +00:00
Gabe Black
1707aa750f put the int register count in intregs.hh
--HG--
extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
2007-03-21 21:04:54 +00:00
Gabe Black
0a80d06dea Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
2007-03-21 19:19:53 +00:00
Gabe Black
3efec59fc5 Missed a const
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
2007-03-21 19:15:40 +00:00
Gabe Black
63e2d3dcbf Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
2007-03-21 01:18:55 -04:00
Gabe Black
475d36ee93 Ignore "time" and "times" syscalls.
--HG--
extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
2007-03-20 23:53:52 -04:00
Gabe Black
e7b015cee1 Added syntax for structure oriented extMachInsts.
--HG--
extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
2007-03-20 06:08:52 +00:00
Gabe Black
7c0825ccf9 Compile fixes for SPARC_FS.
src/arch/alpha/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Put in a missing include
src/cpu/exetrace.cc:
    Convert the legion lockstep stuff from makeExtMI to the predecoder object.

--HG--
extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
2007-03-18 23:09:51 -04:00
Gabe Black
a1f92af0fb The syntax used for twin stores was confusing the parser so it's now broken down farther.
--HG--
extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
2007-03-17 21:23:03 -04:00
Gabe Black
3ccaee976a Make the SPARC branch instructions use ExtMachInsts in their constructors. This isn't necessary since they don't use the extended fields, but it's more consistent and more correct.
--HG--
extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
2007-03-16 10:55:50 +00:00
Gabe Black
9ad3f1e479 Refactor things a little.
--HG--
extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
2007-03-15 19:16:39 +00:00
Gabe Black
f4eee4fb81 File with the predecoder in it.
src/arch/x86/predecoder.cc:
    File for the x86 predecoder process function.

--HG--
extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
2007-03-15 19:16:38 +00:00
Gabe Black
ae9bed4f8f Split the x86 "process" predecoder method into it's own file.
--HG--
extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
2007-03-15 19:16:37 +00:00
Gabe Black
6cdd434f7f Changed warns to DPRINTFs and multiply by 8 where needed.
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
2007-03-15 16:13:40 +00:00
Gabe Black
075df1469f Added immediate value support, and fixed alot of bugs. This won't support 3 byte opcodes.
--HG--
extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
2007-03-15 15:29:39 +00:00
Gabe Black
4379e54b52 Compile fix
--HG--
extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
2007-03-15 03:17:00 +00:00
Gabe Black
32368a2bd6 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/arch/mips/utility.hh:
src/arch/x86/SConscript:
    Hand merge

--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
2007-03-15 02:47:42 +00:00
Gabe Black
ff90b8c1aa Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
2007-03-13 15:03:34 -04:00
Gabe Black
ce18d900a1 Replaced makeExtMI with predecode.
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.

--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
2007-03-13 16:13:21 +00:00
Ali Saidi
a068d6db0f fix interrupting during a quisce on sparc
src/arch/sparc/ua2005.cc:
    fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
    check if were suspended and interrupt at the guess time
src/base/traceflags.py:
    add trace flag for Iob
src/cpu/simple/base.cc:
    Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
    add some Dprintfs

--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
2007-03-13 00:05:52 -04:00
Gabe Black
1f3c3aa234 Fix mulscc.
--HG--
extra : convert_revision : 405f10f14f2f6666a7bef01bfb0cf90ff14cef24
2007-03-12 17:07:10 -04:00