Korey Sewell
b5736ba4ef
alpha:o3:simple: update simout/err files
...
A few prior changesets have changed the gem5 output in a way that wont cause
errors but may be confusing for someone trying to debug the regressions. Ones that I caught
were:
- no more "warn: <hash address"
- typo in the ALPHA Prefetch unimplemented warning
Additionaly, the last updated stats changes rearrange the ordering of the stats output even though
they are still correct stats (gem5 is smart enough to detect this). All the regressions pass
w/the same stats even though it looks like they are being changed.
2011-06-20 18:57:14 -04:00
Korey Sewell
97449ef3da
inorder: update eon regr w/eon info
...
previous commit copied over O3 stats, this one puts the inorder ones in the right place
2011-06-19 21:54:53 -04:00
Korey Sewell
d16b0dc319
inorder: add 10.linux-boot regression
2011-06-19 21:43:43 -04:00
Korey Sewell
60da569846
inorder: add eon regression
2011-06-19 21:43:43 -04:00
Korey Sewell
55dce6419d
inorder: update SE regressions
2011-06-19 21:43:42 -04:00
Korey Sewell
1aa4869ff0
sparc: update long regressions
2011-06-12 21:35:03 -04:00
Ali Saidi
5d5b0f49cc
Stats: Update stats for minor O3 changes below.
2011-05-23 10:59:13 -05:00
Ali Saidi
44e599a1a4
ARM: Fix up stats for previous changes to condition codes
2011-05-13 17:29:27 -05:00
Ali Saidi
fea2c26402
ARM: Update ARM_FS stats for mp changes
2011-05-04 20:38:28 -05:00
Ali Saidi
307f089e7f
O3/ARM: Update stats for recent changes.
2011-05-04 20:38:27 -05:00
Nathan Binkert
3d93439ee0
stats: update 20.parser o3 now that it works. realview-o3 works too.
2011-04-25 14:18:08 -07:00
Nathan Binkert
a7e27f9a82
tests: updates for stat name change
2011-04-22 10:18:51 -07:00
Nathan Binkert
8c1563096c
tests: update stats for name changes
2011-04-19 18:45:23 -07:00
Ali Saidi
d50d0152d0
ARM: Fix stats for ARM_SE checkpoint restore fix.
...
Register reads/writes done in startup() count against the stats while they
don't count if done in initState().
2011-04-12 16:09:20 -04:00
Ali Saidi
afa897403d
ARM: Update stats for default inclusion of CF adapter.
2011-04-04 11:42:32 -05:00
Ali Saidi
b20e92e1ca
ARM: Update stats for previous changes.
2011-04-04 11:42:31 -05:00
Ali Saidi
1114be4b78
O3: Update stats for memory order violation checking patch.
2011-04-04 11:42:25 -05:00
Ali Saidi
63eb337b3b
ARM: Update stats for the previous changes and add ARM_FS/O3 regression.
2011-03-17 19:20:22 -05:00
Ali Saidi
845f791f37
Stats: Update the statistics for rfe patch.
2011-03-17 19:20:20 -05:00
Ali Saidi
7112b44362
O3: Update regressions for mem block caching change.
2011-03-17 19:20:19 -05:00
Ali Saidi
3a44307e94
X86: Update the stats for parser on x86 O3.
2011-03-17 00:43:54 -04:00
Gabe Black
27f5a8c812
X86: Update the stats for gzip on x86 O3.
2011-03-16 19:08:41 -07:00
Gabe Black
47615d06bd
Regressions: Move the X86_FS regressions to "quick" instead of "long".
...
--HG--
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal
2011-03-12 14:41:30 -08:00
Gabe Black
b84ae9bd40
X86: Update X86_FS stats.
2011-02-27 16:24:54 -08:00
Korey Sewell
8135b81ae4
inorder: bzip2 regression update
2011-02-27 14:17:26 -05:00
Korey Sewell
72fb282ab1
inorder: add 00.gzip and 60.bzip2 regression tests
2011-02-23 16:35:25 -05:00
Ali Saidi
73603c2b17
ARM: Update regression tests for preceeding changes.
2011-02-23 15:10:50 -06:00
Korey Sewell
66bb732c04
m5: merge inorder/release-notes/make_release changes
2011-02-18 14:35:15 -05:00
Korey Sewell
ab9c20cc78
inorder: regr-update: reduce dynamic mem. use to speedup sims
...
previous changesets took a closer look at memory mgmt in the inorder model and sought to avoid
dynamic memory mgmt (for access to pipeline resources) as much as possible. For the regressions
that were run, the sims are about 2x speedup from changeset 7726 which is the last change
since the recent commits in Feb. (note: these regressions now are 4-issue CPUs instead of just 1-issue)
2011-02-18 14:31:37 -05:00
Gabe Black
5ec5794456
X86: Update stats for the improved branch detection/prediction.
2011-02-13 17:46:04 -08:00
Gabe Black
44306e8114
X86: Update stats now that the dest reg isn't read unnecessarily to set flags.
2011-02-13 17:45:30 -08:00
Gabe Black
b046f3feb6
X86: Update stats for the reduced register reads.
2011-02-13 17:44:32 -08:00
Korey Sewell
2971b8401a
inorder:regress: host-inst-rate improved ~58%
...
there are still only a few inorder benchmark but for the lengthier benchmarks (twolf and vortext)
the latest changes to how instruction scheduling (how instructions figure out what they want to
do on each pipeline stage in the inorder model) were able to improve performance by a nice
amount... The latest results for the inorder model process about 100k insts/second
(note: 58% is over the last time run on 64-bit pool machines at UM)
2011-02-12 10:14:52 -05:00
Gabe Black
0851580aad
Stats: Re update stats.
2011-02-07 19:23:13 -08:00
Gabe Black
2107258d24
X86: Add stats for the new x86 fs regressions.
2011-02-07 01:23:16 -08:00
Gabe Black
55df9e348c
X86: Add o3 regressions in SE mode.
...
Exclude bzip2 for now. It works, it just takes too long to run.
2011-02-05 00:16:09 -08:00
Korey Sewell
a48fe2729a
imported patch regression_updates
2011-02-04 00:09:22 -05:00
Gabe Black
54f88d84c2
Stats: Update the x86 stats to reflect changing stupd to a store and update.
2011-02-02 19:56:49 -08:00
Ali Saidi
f7885b8f26
ARM/O3: Add regressions for ARM w/ O3 CPU.
2011-01-18 16:30:06 -06:00
Ali Saidi
9b67f3723e
Stats: Update stats for previous set of patches.
2011-01-18 16:30:06 -06:00
Gabe Black
6fb521faba
SPARC: Update stats for the call r15 as source change.
2011-01-15 15:30:34 -08:00
Ali Saidi
1cfe2c8820
Stats: Fix stats for cumulative flags change.
2010-12-07 16:19:57 -08:00
Gabe Black
0e41d4e5ea
Stats: Update the O3 fetch stats for SPARC.
2010-11-15 19:37:15 -08:00
Ali Saidi
371110fb0a
Regressions: Update regressions for SIMD opclass changes
2010-11-15 14:04:05 -06:00
Ali Saidi
06c5283930
ARM: Update SE stats for TLB stats additions
2010-11-08 13:59:35 -06:00
Ali Saidi
fe300c6de2
ARM: Add full-system regressions
2010-11-08 13:58:25 -06:00
Ali Saidi
b4b6a2338a
ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.
2010-11-08 13:58:24 -06:00
Gabe Black
b53231e7fe
Ref output: Update refs for PCState change.
2010-10-31 00:07:48 -07:00
Steve Reinhardt
13a15c55a4
stats: update stats for previous cset
...
Coherence protocol change basically got rid
of UpgradeReqs in L2 caches, other minor
related cache stat changes.
2010-09-21 23:07:35 -07:00
Steve Reinhardt
9e45ada171
stats: update stats for preceding coherence changes
...
Because the handling of the E state for multilevel caches
has changed, stats are affected for any non-ruby config
with caches, even uniprocessor simple CPU.
2010-09-09 14:40:19 -04:00
Ali Saidi
e6d3fe8a0c
ARM: Update regression tests for ldr/str microcode changes.
2010-08-25 19:10:42 -05:00
Ali Saidi
03584ad439
ALPHA: The previous O3 patch causes a slight stats change with fullsys.
2010-08-23 11:18:42 -05:00
Steve Reinhardt
0f8b5afd7a
tests: update reference config.ini files for previous cset
...
Rename 'responder_set' to 'use_default_range'.
2010-08-17 05:06:22 -07:00
Ali Saidi
1b73376b0b
ARM: Add regression tests
2010-07-27 01:03:44 -04:00
Korey Sewell
f2eba81f50
inorder: update regressions from RAS fix
2010-06-25 17:42:55 -04:00
Korey Sewell
0135cdab8d
inorder: update regressions
2010-06-24 15:34:21 -04:00
Korey Sewell
e17c41c176
inorder: update regressions
2010-06-23 18:21:44 -04:00
Steve Reinhardt
625854785b
stats: update stats for SC protocol change
...
Some subset of UpgradeReq messages shifted to the
new SCUpgradeReq type. Other than that there
are no significant differences.
2010-06-16 15:25:57 -07:00
m5test
744b59d6de
tests: Update O3 ref outputs to reflect Lisa's dist format change.
2010-06-06 18:39:10 -04:00
Ali Saidi
a990335b32
BPRED: Update one missing regression
2010-05-19 00:36:05 -04:00
Ali Saidi
e63c73b45d
BPRED: Update regressions for tournament predictor fix.
2010-05-13 23:45:59 -04:00
Gabe Black
8b0c83008e
X86: Update stats for the updated auxilliary vectors.
2010-05-03 00:45:01 -07:00
Korey Sewell
c90ee27283
inorder: update regressions for fwd-ing patch
2010-04-11 00:21:49 -04:00
Korey Sewell
941399728f
inorder: update twolf/vortex regressions
2010-03-27 02:21:22 -04:00
Korey Sewell
6364fbac39
inorder: update twolf regression
2010-03-23 00:14:52 -04:00
Korey Sewell
ef0fb9bee4
inorder: update vortex regression
2010-03-22 23:39:23 -04:00
Lisa Hsu
ee20a7c0bd
stats: update stats for the changes I pushed re: shared cache occupancy
2010-02-25 10:08:41 -08:00
Korey Sewell
a3c635f777
inorder: vortex alpha regression
2010-01-31 18:31:20 -05:00
Korey Sewell
81c9fdad24
inorder: twolf alpha regression
2010-01-31 18:31:14 -05:00
Nathan Binkert
14b5169750
tests: update statistics for change caused by vsyscall support in x86
...
Caused by a slight change in memory layout.
2009-11-08 20:15:23 -08:00
Nathan Binkert
5fe0762ee4
tests: update test for slight change due to the change in brk.
2009-10-24 10:53:58 -07:00
Nathan Binkert
9a8cb7db7e
python: Move more code into m5.util allow SCons to use that code.
...
Get rid of misc.py and just stick misc things in __init__.py
Move utility functions out of SCons files and into m5.util
Move utility type stuff from m5/__init__.py to m5/util/__init__.py
Remove buildEnv from m5 and allow access only from m5.defines
Rename AddToPath to addToPath while we're moving it to m5.util
Rename read_command to readCommand while we're moving it
Rename compare_versions to compareVersions while we're moving it.
--HG--
rename : src/python/m5/convert.py => src/python/m5/util/convert.py
rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
2009-09-22 15:24:16 -07:00
Gabe Black
70251bbb1a
X86: Update stats for new SSE instructions.
2009-08-17 22:27:30 -07:00
Gabe Black
bcfc4178f5
X86: Update the stats for the slightly lengthened cmov.
2009-08-08 17:23:25 -07:00
Nathan Binkert
e3e509b31a
tests: stats outputs now include CDFs, update tests that use those so they're easier to diff
2009-07-06 15:49:48 -07:00
Gabe Black
5ae983f8da
inorder: Fix up some reference stats.
2009-07-04 21:46:23 -07:00
Korey Sewell
b5959124e1
inorder-regress: add vortex ALPHA_SE
2009-05-12 15:01:17 -04:00
Korey Sewell
39010b990d
inorder-regress: add twolf ALPHA-SE
2009-05-12 15:01:16 -04:00
Nathan Binkert
567cab6859
stats: update reference outputs now that compatibility is gone
...
Because of the initialization bug, it wasn't consistent anyway.
2009-04-22 10:25:17 -07:00
Steve Reinhardt
7b40c36fbd
Update stats for new single bad-address responder.
...
Mostly just config.ini updates, though the different response
latency for bad addresses caused very minor timing changes
in the O3 Linux boot tests.
2009-04-22 01:55:52 -04:00
Gabe Black
b4ad233c0c
X86: Update the stats for the fix for CPUID.
2009-04-19 03:14:33 -07:00
Steve Reinhardt
48d4ca522a
Update stats after elimination of Unallocated state.
...
Somehow ending threads with halt() instead of deallocate()
reduces the squash count on o3 by 1 (and a few other
similarly trivial changes).
2009-04-15 13:13:58 -07:00
Nathan Binkert
374ba9bae3
tests: update tests for TLB unification
2009-04-08 22:21:30 -07:00
Steve Reinhardt
15f0e44060
Very minor regression stats updates due top previous changeset.
...
Setting dirty bit on swaps added a handful of writebacks in a
few of the longer-running SPARC_SE benchmarks.
2009-03-16 11:01:23 -04:00
Nathan Binkert
5cf0605766
tests: update tests because of changes in stat names and in the stats package
2009-03-07 14:30:55 -08:00
Gabe Black
5d5e001ac3
X86: Update stats now that prefetch is implemented.
2009-02-25 10:19:28 -08:00
Gabe Black
1bfab291f1
CPU: Update stats now that there's no fetch in the middle of macroops.
2009-02-25 10:18:45 -08:00
Gabe Black
f02df8cb74
X86: Update stats for in place TLB miss handling.
2009-02-25 10:16:29 -08:00
Steve Reinhardt
89ea323250
Update stats for new prefetching fixes.
...
Prefetching is not enabled in any of our regressions, so no significant
stat values have changed, but zero-valued prefetch stats no longer
show up when prefetching is disabled so there are noticable changes
in the reference stat files anyway.
2009-02-16 12:09:45 -05:00
Gabe Black
d824af340e
X86: Update stats now that the micropc isn't always reset on faults.
2009-02-01 17:02:16 -08:00
Ali Saidi
fb572a1d74
Stats: Update parser statistics for Linux special files update (parser runs should now be deterministic).
2009-01-17 18:57:39 -05:00
Gabe Black
ab5eeb4b62
Update the stats for the fixes to the PCI device class.
2008-12-15 00:47:15 -08:00
Nathan Binkert
19273164da
output: Change default output directory and files and update tests.
...
--HG--
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr => tests/long/00.gzip/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout => tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr => tests/long/00.gzip/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout => tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr => tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout => tests/long/00.gzip/ref/sparc/linux/o3-timing/simout
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr => tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout => tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr => tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout => tests/long/00.gzip/ref/sparc/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stderr => tests/long/00.gzip/ref/x86/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout => tests/long/00.gzip/ref/x86/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stderr => tests/long/00.gzip/ref/x86/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stdout => tests/long/00.gzip/ref/x86/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/m5stats.txt => tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stderr => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stdout => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/m5stats.txt => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stderr => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stdout => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/m5stats.txt => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stderr => tests/long/10.mcf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout => tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stderr => tests/long/10.mcf/ref/sparc/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout => tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stderr => tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout => tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stderr => tests/long/10.mcf/ref/x86/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stdout => tests/long/10.mcf/ref/x86/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/m5stats.txt => tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stderr => tests/long/20.parser/ref/x86/linux/simple-atomic/simerr
rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stdout => tests/long/20.parser/ref/x86/linux/simple-atomic/simout
rename : tests/long/20.parser/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/20.parser/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/20.parser/ref/x86/linux/simple-timing/stderr => tests/long/20.parser/ref/x86/linux/simple-timing/simerr
rename : tests/long/20.parser/ref/x86/linux/simple-timing/stdout => tests/long/20.parser/ref/x86/linux/simple-timing/simout
rename : tests/long/20.parser/ref/x86/linux/simple-timing/m5stats.txt => tests/long/20.parser/ref/x86/linux/simple-timing/stats.txt
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rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stderr => tests/quick/50.memtest/ref/alpha/linux/memtest/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stdout => tests/quick/50.memtest/ref/alpha/linux/memtest/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/m5stats.txt => tests/quick/50.memtest/ref/alpha/linux/memtest/stats.txt
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
2008-12-08 07:16:40 -08:00
Lisa Hsu
f1430941cf
This brings M5 closer to modernity - the kernel being advertised is newer so it won't die on binaries compiled with newer glibc's, and enables use of TLS-toolchain built binaries for ALPHA_SE by putting auxiliary vectors on the stack. There are some comments in the code to help. Finally, stats changes for ALPHA are from slight perturbations to the initial stack frame, all minimal diffs.
2008-12-05 12:09:29 -05:00
Steve Reinhardt
47789cc974
Update stats for brk fix (cset f28f020f3006).
2008-11-17 14:11:09 -05:00
Gabe Black
bcfd284d24
X86: Update the mcf stats.
...
I must have missed updating these for the change to send both parts of a split
packet at the same time.
2008-11-13 23:30:15 -08:00
Gabe Black
c981b7ed50
X86: Add x86 reference output for the timing CPU.
2008-11-09 21:57:15 -08:00
Lisa Hsu
ddd179a418
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 11:11:42 -05:00
Ali Saidi
aac93b7d0c
Regression: Add single and dual boot O3 regressions. They both take about 8 minutes to complete.
2008-10-20 19:00:07 -04:00
Gabe Black
8384ff7d6c
X86: Update the stats for cpuid's new implementation
2008-10-12 15:31:37 -07:00
