sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
5110 commits 2 branches 0 tags 204 MiB
Commit graph

2001 commits

Author SHA1 Message Date
Gabe Black
fcc23891bb Implement jnbe. 
--HG--
extra : convert_revision : cdbf1ff5ed3a63787cbd2187a8a3455a41cc5085
 2007-07-20 15:03:36 -07:00
Gabe Black
79b3208aa5 Appended _NEAR to the near version of call and return. 
--HG--
extra : convert_revision : 70adb38d59ff7b5d103e58a9f0773dfb911fec6d
 2007-07-20 15:03:03 -07:00
Gabe Black
f09847c7a6 Make load and store ops use the appropriate sized data access. 
--HG--
extra : convert_revision : 6b808586fab10ca433ef04b062bf701b906634b9
 2007-07-20 15:02:09 -07:00
Gabe Black
d926de462a Implement the increment and decrement instructions, and the two operand form of signed multiplication. 
--HG--
extra : convert_revision : d87df4b1b5470bed1d963dfe8e2ffa1403718342
 2007-07-20 14:59:14 -07:00
Gabe Black
ec5f66190e Fix code that computes displacement size. 
--HG--
extra : convert_revision : a9be3eb2b90b88086936aeb4dcf87ec7b58a48cb
 2007-07-20 14:57:34 -07:00
Gabe Black
5d882984d1 Add a bitfield to decode based on what prefixes are used. 
--HG--
extra : convert_revision : 7ff4998b3249ccfe86ae9cbcc63fb910683707f5
 2007-07-20 14:57:04 -07:00
Gabe Black
dcfaa348b1 Add a parameter type to read a register index from the opcode itself. 
--HG--
extra : convert_revision : d2b5468ebf5df5a6ccadb57a30c52c8d16417b9a
 2007-07-20 14:55:16 -07:00
Gabe Black
ee22bcd609 Fix function which calculates the carry flag. 
--HG--
extra : convert_revision : aeb4f2d4c3936089421dbe80647f28ae36178283
 2007-07-20 14:54:17 -07:00
Gabe Black
0baae59c09 Fix carry flag for subtracts, and clean up code slightly. 
--HG--
extra : convert_revision : 668f5d5aeba888488b41284de6c72a0d055c4ef4
 2007-07-20 14:53:38 -07:00
Gabe Black
0781609693 Fixed width parameter and provided a parameter to flip the carry bit on subtract. 
--HG--
extra : convert_revision : d01bb791b000a2fdfc8600f8fb2f8aadd52b0b63
 2007-07-20 14:52:44 -07:00
Gabe Black
cfadef74d1 x86 fixes 
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.

--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
 2007-07-19 15:15:47 -07:00
Gabe Black
09f056a1ef Check for the two opcode prefix correctly and add in some instructions. 
--HG--
extra : convert_revision : 751e54843f5c81b81529050a1ae9d46d07c36e97
 2007-07-18 17:51:05 -07:00
Gabe Black
f6d326d6fc Hook near returns into the decoder. 
--HG--
extra : convert_revision : b38d4417552991e44f5d1de1f35d5d1ad8f32340
 2007-07-18 17:48:16 -07:00
Gabe Black
dbf361128a Implement near returns. 
--HG--
extra : convert_revision : 3d6e8a976d31cb016a4b78200716b0ece155137a
 2007-07-18 17:47:40 -07:00
Gabe Black
99310a1d93 Make instructions that conditionally set registers set them to their old value if they don't actually execute. 
--HG--
extra : convert_revision : 36e63dd0c6ac1a3e1133c7985cf5507b83e9ee45
 2007-07-18 17:46:38 -07:00
Gabe Black
776283cff8 Fix the overload which prints ExtMachInst in X86. 
--HG--
extra : convert_revision : 2ef8ee71999f36b09270ba9526c2846beda65051
 2007-07-18 17:45:43 -07:00
Gabe Black
05a33a443f Make store microops actually store instead of load. 
--HG--
extra : convert_revision : fe90f8adc96dd0e680cfa45e4c510a906046ae3d
 2007-07-18 17:45:06 -07:00
Gabe Black
e209fce9de Fix a comment to refer to the right type of instruction. 
--HG--
extra : convert_revision : dd441d8fbaed1ed8b2b66e3ad0275009bd4dcef4
 2007-07-18 17:44:12 -07:00
Gabe Black
17f3da6c29 Fix the panic in the "error" format for x86, 
--HG--
extra : convert_revision : bd0715b5b63665f9160082d67c5b5d90d2405c5c
 2007-07-18 17:43:30 -07:00
Gabe Black
6c54b654a8 Implement some forms of add. 
--HG--
extra : convert_revision : adbff2e9b9952ec09853cc43d40243e7262410a7
 2007-07-18 16:33:56 -07:00
Gabe Black
bafb7ee5c1 Fix the operand types in a section of the decoder. 
--HG--
extra : convert_revision : c37600fd65b44817eed2ba653f9d4f08a9869874
 2007-07-18 16:26:52 -07:00
Gabe Black
b949458d4c Make the data size used by regops overridable in the microassembly. 
--HG--
extra : convert_revision : 84d850aa5340c9d02d03502704b063215f6e2140
 2007-07-18 16:26:17 -07:00
Gabe Black
387f00e3dd Fill out the miscreg file and add types to miscregs.hh 
--HG--
extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
 2007-07-18 16:12:39 -07:00
Gabe Black
5cca5ca3d9 Hook x86 nop into the decoder. 
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
 2007-07-18 16:11:52 -07:00
Gabe Black
d21c16fd37 Fix a compilation error for SubBitUnions, 
--HG--
extra : convert_revision : aad9388afe81ba6541d0b18fa9777e6ffcfd871c
 2007-07-18 16:11:16 -07:00
Gabe Black
3bd42af99e Implement the x86 nop to be a "fault" microop which returns "NoFault". 
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
 2007-07-18 16:10:44 -07:00
Gabe Black
dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst. 
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
 2007-07-18 16:09:35 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const. 
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
 2007-07-18 16:09:00 -07:00
Gabe Black
85f32920fb Calculate the correct address size. 
--HG--
extra : convert_revision : 6bd9d5a01ba6600781e3678e0403dca524fb2cba
 2007-07-17 20:54:55 -07:00
Gabe Black
e524240d68 Make disassembled x86 register indices reflect their size. 
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
 2007-07-17 18:12:33 -07:00
Gabe Black
2e80f71dcd Implemented jnz. 
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
 2007-07-17 16:55:33 -07:00
Gabe Black
62ffc71fab Use limm to set up immediate value for subtract instruction. 
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
 2007-07-17 16:50:13 -07:00
Gabe Black
d77d4c04b7 Implement the jz instruction. 
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
 2007-07-17 15:36:45 -07:00
Gabe Black
c4004482a5 Make "test" set some condition codes. 
It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
 2007-07-17 15:35:34 -07:00
Gabe Black
a6757095c3 Add in support for condition code flags. 
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
 2007-07-17 15:33:18 -07:00
Gabe Black
cf846d5205 Add in operand which holds the condition code bits of the flag register. 
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
 2007-07-17 15:28:48 -07:00
Gabe Black
bbf7163dd9 Add symbols for each of the flags a microop could set and each condition it could check. 
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
 2007-07-17 15:27:28 -07:00
Gabe Black
cbc24d6600 Actually include miscregs.hh 
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
 2007-07-17 13:30:23 -07:00
Gabe Black
b0643a08a3 Create a file to describe misc registers. 
Define bitfields, indices, etc.

--HG--
extra : convert_revision : 8fffdc4cf796d304b12b317d8bddf5685bd50cf4
 2007-07-17 13:29:40 -07:00
Gabe Black
8f3153ffb3 Create a file of functions for computing condition codes. 
These haven't been very thuroughly tested, so use at your own risk.

--HG--
extra : convert_revision : 938885d36fea4a99f8228cdf195a0e0a38dd9031
 2007-07-17 13:28:03 -07:00
Gabe Black
aad11bf879 Add a spot for the condition code portion of the flag register. 
This is stored in the integer register file so that it can be renamed, but it should be a misc reg.

--HG--
extra : convert_revision : eee48f24dd80b145f14427482047c4d8af2521ab
 2007-07-17 13:26:06 -07:00
Gabe Black
13ccac1a3c Add a conversion constructor so a bitunion can be initialized to a value. 
Previously, the bitunion would need to be declared and then assigned to separately.

--HG--
extra : convert_revision : d229bd83bc7baeca2259d4e7b080f359915015f3
 2007-07-17 13:23:42 -07:00
Steve Reinhardt
a67a0025b3 Make sure responses never get blocked. 
--HG--
extra : convert_revision : 29f359d743994a94dc403aa0621ba72cd137d1a1
 2007-07-17 08:15:23 -07:00
Steve Reinhardt
a25f3ac67f Forward cache-to-cache responses through other caches. 
--HG--
extra : convert_revision : 5b6a02255bccd98b00949703cf4ba4b221553cea
 2007-07-17 06:33:28 -07:00
Steve Reinhardt
ff13827ccb Assert that an mshr has a target in getTarget(). 
--HG--
extra : convert_revision : 08091670fc319876012ed139fcd2584c364a980c
 2007-07-17 06:23:11 -07:00
Steve Reinhardt
f67c8b33cc Fix bug with timing snoop upcalls to MemTest object. 
--HG--
extra : convert_revision : 1940a5d231b4f856cf69578f68ea98435824dbd8
 2007-07-15 21:03:12 -07:00
Steve Reinhardt
884807a68a Fix up a bunch of multilevel coherence issues. 
Atomic mode seems to work.  Timing is closer but not there yet.

--HG--
extra : convert_revision : 0dea5c3d4b973d009e9d4a4c21b9cad15961d56f
 2007-07-15 20:11:06 -07:00
Steve Reinhardt
f790f34fe3 Make Bus::findPort() a little more useful. 
Move check for loops outside, since half the call sites
end up working around it anyway.  Return integer port ID
instead of port object pointer.

--HG--
extra : convert_revision : 4c31fe9930f4d1aa4919e764efb7c50d43792ea3
 2007-07-15 20:09:03 -07:00
Steve Reinhardt
9172876dd7 Fix problem with unset max_loads in memtest. 
Also make default 0, and make that mean run forever.

--HG--
extra : convert_revision : 3e60a52b1c5e334a9ef3d744cf7ee1d851ba4aa9
 2007-07-15 14:32:55 -07:00
Gabe Black
873b762d4b Move bitunion code into it's own file. 
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
 2007-07-14 17:28:26 -07:00
Gabe Black
4f7809d5e6 Pull some hard coded base classes out of the isa description. 
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
 2007-07-14 17:14:19 -07:00
Steve Reinhardt
15a51d0cae Add CacheRepl trace flag and move a couple DPRINTFs to it. 
--HG--
extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183
 2007-07-14 13:28:52 -07:00
Steve Reinhardt
abd194df5c Move a couple of DPRINTFs from Cache to CachePort. 
--HG--
extra : convert_revision : 55a0d26660aeb8f63b41897d53e6b2d1f0a163be
 2007-07-14 13:16:58 -07:00
Steve Reinhardt
3b4ff75939 Fix bug in copying packet with static data pointer. 
--HG--
extra : convert_revision : 2fcf99f050d73e007433c1db2475f2893c5961a0
 2007-07-14 13:14:53 -07:00
Steve Reinhardt
288f9cf7d2 Merge from head. 
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
 2007-07-14 12:23:47 -07:00
Steve Reinhardt
e5ecfa2745 Disable PrintThreadInfo since it causes a panic when using VPtr. 
See Flyspray #281.

--HG--
extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
 2007-07-14 12:22:04 -07:00
Steve Reinhardt
c2ee69d687 Make NO_FAST_ALLOC compile. 
--HG--
extra : convert_revision : 80579a61eb8d220e75cdee11bc09ca985c8fd85c
 2007-07-14 12:12:46 -07:00
Steve Reinhardt
a51e16dc89 Merge of DPRINTF fixes from head. 
--HG--
extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
 2007-07-14 12:09:37 -07:00
Steve Reinhardt
7cd6c7ee05 Fix & tweak DPRINTFs for tracediff w/new cache code. 
Note that we should *not* print pointer values in DPRINTFs as
these needlessly clutter tracediff output.

--HG--
extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
 2007-07-14 11:48:30 -07:00
Steve Reinhardt
4738649e32 Delete packets when we're done with them. 
--HG--
extra : convert_revision : b8894d26e1ca7a6c9b736500accdaa53bfb09558
 2007-07-03 00:40:31 -04:00
Steve Reinhardt
4b68652c87 Couple more minor bug fixes for FS timing mode. 
src/cpu/simple/timing.cc:
    Fix another SC problem.
src/mem/cache/cache_impl.hh:
    Forgot to call makeTimingResponse() on uncached timing responses.

--HG--
extra : convert_revision : 5a5a58ca2053e4e8de2133205bfd37de15eb4209
 2007-07-02 13:57:45 -07:00
Steve Reinhardt
e9c04dad60 Fix a couple LL/SC bugs that only affected timing mode. 
src/cpu/simple/timing.cc:
    Fix swap/stq_c command bug.
src/mem/packet.cc:
    Fix incorrect LoadLockedReq command response field.

--HG--
extra : convert_revision : 7a4523be900bc2c9b1bdf2d372ce55f89ae58ae5
 2007-07-02 09:26:36 -07:00
Steve Reinhardt
ffd697e149 bus.cc: 
Fix atomic timing issue.

src/mem/bus.cc:
    Fix atomic timing issue.

--HG--
extra : convert_revision : a22ff80cd75f83c785b0604c2a4fde2e2e9f71ef
 2007-07-02 01:02:35 -07:00
Steve Reinhardt
3ad761bc8e Make CPU models use new LoadLockedReq/StoreCondReq commands. 
--HG--
extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
 2007-06-30 20:35:42 -07:00
Steve Reinhardt
5e59739416 Don't propagate snoops across bridges. Wouldn't work anyway. 
--HG--
extra : convert_revision : af29fc7d0c134f5e89dd2e814c819151350fcb38
 2007-06-30 18:03:17 -07:00
Steve Reinhardt
07f091d6ed Get rid of remaining traces of obsolete CoherenceProtocol object. 
--HG--
extra : convert_revision : c5555b00bef1b304a84886188ad2c0dcb4d7c5b9
 2007-06-30 17:59:45 -07:00
Steve Reinhardt
2447abe5ce Can only call makeAtomicResponse() once... 
--HG--
extra : convert_revision : c49aade46aa64f979da35eb653b544ee5bd82f01
 2007-06-30 17:56:30 -07:00
Steve Reinhardt
d10a843723 Get rid of obsolete fixPacket() functions. 
Handled by Packet::checkFunctional() now.

--HG--
extra : convert_revision : 63642254e2789c80a369ac269f317ec054ffe3c0
 2007-06-30 17:51:29 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event" 
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
 2007-06-30 17:45:58 -07:00
Steve Reinhardt
f0c4dd7920 Factor out a little more common code. 
--HG--
extra : convert_revision : 626255a91679d534030c91bcdb4fc1bed36ceb9b
 2007-06-30 13:56:25 -07:00
Steve Reinhardt
6babda7123 Fix up a few statistics problems. 
Stats pretty much line up with old code, except:
- bug in old code included L1 latency in L2 miss time, making it too high
- UniCoherence did cache-to-cache transfers even from non-owner caches,
so occasionally the icache would get a block from the dcache not the L2
- L2 can now receive ReadExReq from L1 since L1s have coherence

--HG--
extra : convert_revision : 5052c1a1767b5a662f30a88f16012165a73b791c
 2007-06-30 13:34:16 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are 
now encoded in cmd field.

--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
 2007-06-30 10:16:18 -07:00
Steve Reinhardt
749126e011 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 1e94283da8007fce8e1a0f2849ce5d5a8dbbaffd
 2007-06-29 13:03:36 -07:00
Korey Sewell
738ecc495b fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... 
src/arch/mips/isa/decoder.isa:
    commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
    edit fp format
src/arch/mips/isa/formats/mem.isa:
    fix for basic store instructions

--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
 2007-06-29 15:13:50 -04:00
Steve Reinhardt
7f3dfa7c09 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : b1c954c187e3b3172a194396ba63808253121195
 2007-06-28 08:28:58 -07:00
Korey Sewell
e28cbc98a0 o3cpu build for mips 
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
 2007-06-28 05:30:46 -04:00
Steve Reinhardt
9117c94f9c Get rid of coherence protocol object. 
--HG--
extra : convert_revision : 4ff144342dca23af9a12a2169ca318a002654b42
 2007-06-27 20:54:13 -07:00
Steve Reinhardt
c4903e0882 Revamp replacement-of-upgrade handling. 
--HG--
extra : convert_revision : 9bc09d8ae6d50e6dfbb4ab21514612f9aa102a2e
 2007-06-26 23:30:30 -07:00
Steve Reinhardt
1b20df5607 Handle deferred snoops better. 
--HG--
extra : convert_revision : 703da6128832eb0d5cfed7724e5105f4b3fe4f90
 2007-06-26 22:23:10 -07:00
Steve Reinhardt
69ff6d9163 cache_impl.hh: 
Change target overflow from assertion to warning.

src/mem/cache/cache_impl.hh:
    Change target overflow from assertion to warning.

--HG--
extra : convert_revision : ceca990ed916bbf96dedd4836c40df522803f173
 2007-06-26 18:01:22 -04:00
Steve Reinhardt
7dacbcf492 Handle replacement of block with pending upgrade. 
src/mem/cache/tags/lru.cc:
    Add some replacement DPRINTFs

--HG--
extra : convert_revision : 7993ec24d6af7e7774d04ce36f20e3f43f887fd9
 2007-06-26 14:53:15 -07:00
Steve Reinhardt
f697e959a1 Couple minor bug fixes... 
src/mem/cache/cache_impl.hh:
    Handle grants with no packet.
src/mem/cache/miss/mshr.cc:
    Fix MSHR snoop hit handling.

--HG--
extra : convert_revision : f365283afddaa07cb9e050b2981ad6a898c14451
 2007-06-25 22:23:29 -07:00
Steve Reinhardt
529f12a531 Get rid of requestCauses. Use timestamped queue to make 
sure we don't re-request bus prematurely.  Use callback to
avoid calling sendRetry() recursively within recvTiming.

--HG--
extra : convert_revision : a907a2781b4b00aa8eb1ea7147afc81d6b424140
 2007-06-25 06:47:05 -07:00
Steve Reinhardt
47bce8ef78 Better handling of deferred targets. 
--HG--
extra : convert_revision : 0fbc28c32c1eeb3dd672df14c1d53bd516f81d0f
 2007-06-24 17:32:31 -07:00
Steve Reinhardt
245b0bd9b9 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

src/base/traceflags.py:
    Hand merge.

--HG--
extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
 2007-06-23 13:26:30 -07:00
Steve Reinhardt
57ff2604e5 Minor fix plus new assertion to catch similar bugs. 
src/cpu/memtest/memtest.cc:
    Need to set packet source field so that response from cache
    doesn't run into assertion failure when copying source to dest.
src/mem/packet.hh:
    Copy source field when copying packets.
    Assert that source is valid before copying it to dest
    when turning packets around.

--HG--
extra : convert_revision : 09e3cfda424aa89fe170e21e955b295746832bf8
 2007-06-23 13:24:33 -07:00
Korey Sewell
ac19e0c505 FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality... 
src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
 2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565 add Control Bitfield class 
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
 2007-06-22 20:09:46 -04:00
Steve Reinhardt
ed1db23b41 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
 2007-06-22 16:13:53 -07:00
Korey Sewell
753adb38d5 mips import pt. 1 
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
 2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
 2007-06-22 17:44:33 -04:00
Steve Reinhardt
4d1bcbcd36 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 1da75335907fee2d1745ec13e515819dfe2aad89
 2007-06-22 09:24:33 -07:00
Steve Reinhardt
bdd5fd20fb Fixes to hitLatency, blocking, buffer allocation. 
Single-cpu timing mode seems to work now.

--HG--
extra : convert_revision : 720f6172df18a1c941e5bd0e8fdfbd686c13c7ad
 2007-06-22 09:24:07 -07:00
Gabe Black
70d6044527 Make symbols for regular registers. 
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
 2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59 Get rid of an unnecessary include file. 
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
 2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

src/cpu/o3/fetch_impl.hh:
    hand merge

--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
 2007-06-21 20:35:25 +00:00
Gabe Black
470a6a9a74 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba4d93f354749d02278b16e78b4ecd4b2311416b
 2007-06-21 20:35:23 +00:00
Steve Reinhardt
eff122797b Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 9002940097a166c8442ae1adf41b974227968920
 2007-06-21 12:03:22 -07:00
Steve Reinhardt
83af0fdcf5 Getting closer... 
configs/example/memtest.py:
    Add progress interval option.
src/base/traceflags.py:
    Add MemTest flag.
src/cpu/memtest/memtest.cc:
    Clean up tracing.
src/cpu/memtest/memtest.hh:
    Get rid of unused code.

--HG--
extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
 2007-06-21 11:59:17 -07:00
Ali Saidi
5195500cdf Use FastAlloc for Packet, Request, CoherenceState, and SenderState so we don't spend so much time calling malloc() 
--HG--
extra : convert_revision : a946564eee46ed7d2aed41c32d488ca7f036c32f
 2007-06-21 13:50:35 -04:00
Gabe Black
25e385e0cf Use the new symbols to clean up the assembler. 
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
 2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053 Needed for last change set to work :P 
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
 2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083 Define symbols for the x86 specialization of the microassembler. 
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
 2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3 Fix a comment. 
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
 2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols. 
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
 2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958 Add in code that lays the ground work for setting flags. 
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
 2007-06-21 13:48:44 +00:00
Gabe Black
df7730b677 Fix compiler errors. 
--HG--
extra : convert_revision : 2b10076a24cb36cb748e299011ae691f09c158cd
 2007-06-20 19:46:45 -07:00
Gabe Black
77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores. 
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
 2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e Fix a newly introduced bug where the predecoder wasn't picking up all the displacement. 
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
 2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014 X86 probably doesn't need a window save area. 
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
 2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c Fix a typo in one of the operand type tags. 
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
 2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1 Comment out some unnecessary debug output. 
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
 2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282 Forgot to check these in... 
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
 2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1 Comment out some unnecessary debug statements. 
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
 2007-06-20 19:04:38 +00:00
Gabe Black
0a971cc0c9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : f2fac2b1a09e709021cd8382a9fbe805df2177ef
 2007-06-20 19:04:37 +00:00
Vincentius Robby
4a7bc06553 Minor error. 
--HG--
extra : convert_revision : 514032e21c8861f20fcbcae7204e132088cc7dbc
 2007-06-20 15:04:36 -04:00
Vincentius Robby
d540dde5b4 Removed "adding instead of dividing" trick. 
Caused slowdown in performance instead of speeding up.

src/cpu/base.cc:
    Removed "adding instead of dividing" trick.
src/mem/bus.cc:
    Fixed spelling in comments.
    Removed "adding instead of dividing" trick.

--HG--
extra : convert_revision : 65a736f4f09a64e737dc7aeee53b117976330488
 2007-06-20 14:54:17 -04:00
Nathan Binkert
f65e2710ec Don't do checker stuff if the checker is not defined 
--HG--
extra : convert_revision : 1c920b050c21e592a386410e4e9f45354f8e4441
 2007-06-20 08:15:06 -07:00
Nathan Binkert
b47737dde7 Make sure all parameters have default values if they're 
supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.

--HG--
extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
 2007-06-20 08:14:11 -07:00
Nathan Binkert
438ec924d6 Don't go over 80 chars per line 
--HG--
extra : convert_revision : ec73c3c8788757990a6fab8c600f3b353d0d4206
 2007-06-20 08:12:10 -07:00
Gabe Black
a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
 2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro

src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Hand merge

--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
 2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction. 
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
 2007-06-19 22:40:10 +00:00
Gabe Black
cc796de962 Missed an "offset" to get rid of. 
--HG--
extra : convert_revision : 7542f130b269a6a09e6ed51ae4689d1faa45a155
 2007-06-19 19:01:02 +00:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. 
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
 2007-06-19 18:17:34 +00:00
Gabe Black
d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL. 
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
 2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85 Make an error message a little more descriptive. 
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
 2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70 Renovate the "fault" microop implementation. 
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
 2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list. 
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
 2007-06-19 14:26:42 +00:00
Gabe Black
053c715f21 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 2dfc24b0720b3b378858a289e4bb6f4ee7132b3d
 2007-06-19 14:18:46 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
 2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst. 
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
 2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names. 
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
 2007-06-19 14:14:17 +00:00
Ali Saidi
2d08ab0cc2 fix bug in timing cpu. getTime() is the time the requset was created, not the time it was repsonded to. In timing mode the 
time it was responded to is curTick. Doesn't change the results, but it does make implementation of nextCycle() more difficult

--HG--
extra : convert_revision : 67ed6261a5451d17d96d5df45992590acc353afc
 2007-06-18 18:11:07 -04:00
Gabe Black
7994fa9431 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : fd64f2de0051afdc51e833a7cbf7fa120b230cc3
 2007-06-18 14:16:08 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output. 
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
 2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
 2007-06-18 14:15:00 +00:00
Steve Reinhardt
d69a763833 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

configs/example/memtest.py:
    Hand merge redundant changes.

--HG--
extra : convert_revision : a2e36be254bf052024f37bcb23b5209f367d37e1
 2007-06-17 17:30:24 -07:00
Steve Reinhardt
35cf19d441 More major reorg of cache. Seems to work for atomic mode now, 
timing mode still broken.

configs/example/memtest.py:
    Revamp options.
src/cpu/memtest/memtest.cc:
    No need for memory initialization.
    No need to make atomic response... memory system should do that now.
src/cpu/memtest/memtest.hh:
    MemTest really doesn't want to snoop.
src/mem/bridge.cc:
    checkFunctional() cleanup.
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.cc:
src/mem/cache/cache.hh:
src/mem/cache/cache_blk.hh:
src/mem/cache/cache_builder.cc:
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/coherence_protocol.cc:
src/mem/cache/coherence/coherence_protocol.hh:
src/mem/cache/coherence/simple_coherence.hh:
src/mem/cache/miss/SConscript:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
src/mem/packet.cc:
src/mem/packet.hh:
src/mem/physical.cc:
src/mem/physical.hh:
src/mem/tport.cc:
    More major reorg.  Seems to work for atomic mode now,
    timing mode still broken.

--HG--
extra : convert_revision : 7e70dfc4a752393b911880ff028271433855ae87
 2007-06-17 17:27:53 -07:00
Steve Reinhardt
f4babe1082 memtest.cc: 
No need to initialize memory contents; should come up as 0.

src/cpu/memtest/memtest.cc:
    No need to initialize memory contents; should come up as 0.

--HG--
extra : convert_revision : 1713676956f3d33b4686fee2650bd17027bcc495
 2007-06-16 14:05:05 -07:00
Gabe Black
3ceb0a46ae Add in some microregs. 
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
 2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future. 
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
 2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm. 
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
 2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect. 
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
 2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place. 
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
 2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
 2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method. 
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
 2007-06-14 16:52:19 -04:00
Gabe Black
cb7934f052 Fix an assert to allow rounding mode 0. 
--HG--
extra : convert_revision : 119cc87ccf939d3a0048d87d18e125deca378bb7
 2007-06-14 13:53:27 +00:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode. 
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
 2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst. 
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
 2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement. 
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
 2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. 
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
 2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly. 
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
 2007-06-14 13:45:37 +00:00
Gabe Black
6641423a0b A fix for SPARC_FS compilation. 
--HG--
extra : convert_revision : 8af0dd9c16e7db8ed92f7a71c396841d5ae7e072
 2007-06-14 13:27:08 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. 
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
 2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names. 
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
 2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP" 
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
 2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though. 
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
 2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly. 
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
 2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up. 
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
 2007-06-12 17:35:11 +00:00
Gabe Black
02732929e8 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1d2efac895a1c8328026a079e0b319a436325616
 2007-06-12 17:19:14 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix. 
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
 2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well. 
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
 2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes. 
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
 2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions. 
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
 2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86. 
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
 2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype. 
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
 2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things. 
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
 2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst 
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
 2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs 
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
 2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent. 
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
 2007-06-12 16:21:47 +00:00
Nathan Binkert
125237d357 Rename enum from OpType to OpClass so it's consistent with the 
real thing.  Also rename the null case to something that can
be a C++ symbol.

--HG--
extra : convert_revision : e3bfc4065b59c21f613e486d234711c48d7c9070
 2007-06-11 23:10:58 -07:00
Nathan Binkert
961f8382f6 Add a function to get a SimObject's memory mode and rework 
the set memory mode code to only go through the change if
it is necessary

--HG--
extra : convert_revision : 28288227bb56b0a04d756776eaf0a4ff9e1f8c20
 2007-06-10 13:52:21 -07:00
Nathan Binkert
fc4ab050b4 Add a startup function that will fast forward to the right clock edge 
using a divide in order to not loop forever after resuming from a checkpoint

--HG--
extra : convert_revision : 4bbc70b1be4e5c4ed99d4f88418ab620d5ce475a
 2007-06-09 23:01:47 -07:00
Nathan Binkert
11f1c8dd3e Use the right type 
--HG--
extra : convert_revision : b5ca3153ca786ea4e86bfe83f7760ba9ee41a882
 2007-06-09 23:00:13 -07:00
Nathan Binkert
9f75ac783b only compile fenv.c if we're using fenv 
--HG--
extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
 2007-06-09 22:59:33 -07:00
Nathan Binkert
e9936a6250 More realistic parameters 
--HG--
extra : convert_revision : aaa4ea2b7c97df3d6b731e9252984b45715e9d6f
 2007-06-09 22:43:08 -07:00
Gabe Black
1493ceda8f Fix another outdated comment. 
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
 2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments. 
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
 2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment. 
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
 2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment. 
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
 2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft. 
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
 2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little. 
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
 2007-06-08 17:06:34 +00:00
Gabe Black
5f0d82baeb Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 4a2f2884a9d1125dc3156e080931ddc40defcfc7
 2007-06-08 16:13:45 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
 2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler. 
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
 2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR. 
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
 2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst. 
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
 2007-06-08 16:06:22 +00:00
Ali Saidi
c5a946efea Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/tmp/newmem

--HG--
extra : convert_revision : e0721f59cce9cb356b53977e21bd4a7c779c217d
 2007-06-05 01:03:43 -04:00
Ali Saidi
85986e9dff Clean up some of vincent's code and commit it 
Makes page table cache scheme actually work

src/mem/page_table.cc:
src/mem/page_table.hh:
    fix caching scheme to actually work and improve performance

--HG--
extra : convert_revision : 443a8d8acbee540b26affcfdfbf107b8e735d1bd
 2007-06-05 01:03:35 -04:00
Gabe Black
dba02f703b Make limm (load immediate) microop 
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
 2007-06-04 19:53:06 +00:00
Gabe Black
ddbc26c85e Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 77222b85492c8ad6c0b776fa34c83065c77c402e
 2007-06-04 19:53:05 +00:00
Ali Saidi
42174babbb don't be so aggressive with the tracing on #if 
--HG--
extra : convert_revision : 8ee88bff8010dcb7a412f6a6b49d40fad1c0bb68
 2007-06-04 15:53:04 -04:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
 2007-06-04 15:59:20 +00:00
Gabe Black
e47f1667b6 Don't mask the pc because the Alpha predecoder needs it to set the PAL mode bit in the ExtMachInst. 
--HG--
extra : convert_revision : 87dc6e6b2281b6a11a0c0e8320b7f4acc29f6fb8
 2007-06-02 03:41:47 +00:00
Nathan Binkert
aba2eeaf8f Fix typo so m5.fast will compile 
--HG--
extra : convert_revision : 8ceb816c17108d7cb65cb46d8dc2bd2753b0e0f0
 2007-06-01 20:41:46 -07:00
Ali Saidi
66ee27078e Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 43dc3a23758e7956572d59464ebddcc56e82728b
 2007-06-01 14:55:17 -04:00
Ali Saidi
be0aef9819 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

src/cpu/simple/base.cc:
    hand merge vincent/gabe/my changes to cast sizeof() to a 64bit int

--HG--
extra : convert_revision : eb989b4d65d08057df1777c04b8ee2cfa75a2695
 2007-06-01 14:18:45 -04:00
Ali Saidi
d8f6769962 cast sizeof(MachInst) to Addr before generating a mask 
--HG--
extra : convert_revision : 1ae34a069bbd997a8f888f69415fbeaaf4ade0b3
 2007-06-01 14:16:58 -04:00
Ali Saidi
d8c487c401 don't generate trace data unless tracing is on 
--HG--
extra : convert_revision : 3953ace8d481d758d6e0d89183c0a7e7bebcf681
 2007-06-01 13:44:24 -04:00
Gabe Black
6e8a06b237 Clean things up 
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
 2007-06-01 16:24:51 +00:00
Gabe Black
85caab4e8c Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : de6db1dbe0db519e75d723c7221a60f54b713f8f
 2007-06-01 16:24:50 +00:00
Vincentius Robby
a7fe9345ee Minor error. Forgotten to remove brackets for threadPC. 
--HG--
extra : convert_revision : 40a636a539e84decfca438c07adf022eed7b7780
 2007-06-01 12:24:49 -04:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly. 
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
 2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor 
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
 2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops 
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
 2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name 
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
 2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments 
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
 2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
 2007-05-31 20:45:04 +00:00
Vincentius Robby
83aa742d26 Merge zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/.automount/greenville/w/acolyte/newmem

--HG--
extra : convert_revision : c80b7ef5a2cc4ab1b86bb1eef7fae91886a7737d
 2007-05-31 16:02:31 -04:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor. 
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
 2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler 
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
 2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
 2007-05-31 13:50:35 +00:00
Nathan Binkert
7797a239cc Fix cut-n-pasto to make the path correct 
--HG--
extra : convert_revision : a6194cc9c3b2eb83dc8480ed0417b2246f07b4bd
 2007-05-30 17:19:20 -07:00
Steve Reinhardt
a9b7c558fd Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 26921dad179699b7868768361143aaa8d790b8fc
 2007-05-29 22:59:20 -07:00
Steve Reinhardt
4e65d2678d tport.cc: 
Oops... forgot to update call site after changing
function argument semantics.

src/mem/tport.cc:
    Oops... forgot to update call site after changing
    function argument semantics.

--HG--
extra : convert_revision : 9234b991dc678f062d268ace73c71b3d13dd17dc
 2007-05-30 01:53:28 -04:00
Steve Reinhardt
94c19ad37d Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 72c6f2ce7e9e2b46e59711a2c3cfe770c243018e
 2007-05-29 22:25:57 -07:00
Steve Reinhardt
365e4ac374 A little more cleanup & refactoring of SimpleTimingPort. 
Make it a better base class for cache ports.

--HG--
extra : convert_revision : 37d6de11545a68c1a7d11ce33fe5971c51434ee4
 2007-05-29 22:23:41 -07:00
Steve Reinhardt
05915ed6f7 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 6f462916cb0eb309b6799e94fbf07629abb50eba
 2007-05-28 08:13:40 -07:00
Steve Reinhardt
41f6cbce9a Restructure SimpleTimingPort a bit: 
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability

--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
 2007-05-28 08:11:43 -07:00
Steve Reinhardt
04ac944920 Reformat comments to meet line length restriction. 
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
 2007-05-28 08:04:33 -07:00
Steve Reinhardt
07bda077f2 Remove unnecessary include of physical.hh. 
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
 2007-05-28 08:03:13 -07:00
Steve Reinhardt
075f4b108a Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : fba7efd444e1ca9738385dd4662a33feab357e79
 2007-05-27 21:34:37 -07:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix 
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
 2007-05-27 19:21:17 -07:00
Steve Reinhardt
6a48f6b67d Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : f940480672861185a494f3fae1bfca13d31fed9f
 2007-05-26 20:15:35 -07:00
Nathan Binkert
4f0f217c1b Get rid of GNU libelf and its autoconf nastiness and replace 
it with FreeBSD's implementation

--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
 2007-05-26 18:15:22 -07:00
Steve Reinhardt
87bb4c3792 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : c2540bfd34eb5a6f41cb15ffe50f8ec72f80abb1
 2007-05-26 17:10:35 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
 2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated. 
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
 2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3 
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
 2007-05-24 21:54:51 -07:00
Steve Reinhardt
da46364b18 Fix getDeviceAddressRanges() to get snooping right. 
--HG--
extra : convert_revision : 2aeab25ef955ab9db7b968786faff227239fbbe4
 2007-05-22 07:30:55 -07:00
Steve Reinhardt
0484867d85 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

src/mem/cache/base_cache.hh:
    Manual conflict resolution.

--HG--
extra : convert_revision : 5ebfd7abb4f978caa88bf43d25935869edfc6b9f
 2007-05-22 06:36:01 -07:00
Steve Reinhardt
41dde5f6fd memtest.hh: 
Fix description string.
Minor whitespace cleanup.

src/cpu/memtest/memtest.hh:
    Fix description string.
    Minor whitespace cleanup.

--HG--
extra : convert_revision : 0c7213d088da46de9713ca6beabc30523ccb1c8c
 2007-05-22 06:32:24 -07:00
Steve Reinhardt
9048c695a0 Another pass of minor changes in preparation for new protocol. 
src/mem/cache/cache_impl.hh:
src/mem/cache/coherence/simple_coherence.hh:
    Get rid of old invalidate propagation logic in preparation
    for new multilevel snoop protocol.
src/mem/cache/coherence/coherence_protocol.cc:
    L2 cache now has protocol, so protocol must handle ReadExReq
    coming in from the CPU side.
src/mem/cache/miss/mshr_queue.cc:
    Assertion is failing, so let's take it out for now.
src/mem/packet.cc:
src/mem/packet.hh:
    Add WritebackAck command.
    Reorganize enum to put responses next to corresponding requests.
    Get rid of unused WriteReqNoAck.

--HG--
extra : convert_revision : 24c519846d161978123f9aa029ae358a41546c73
 2007-05-22 06:29:48 -07:00
Steve Reinhardt
41241799ae Change getDeviceAddressRanges to use bool for snoop arg. 
--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
 2007-05-21 23:36:09 -07:00
Steve Reinhardt
0a02e3a764 Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : a8efe71a50b9ae480c5ad0aabd7aa9ba22bc2968
 2007-05-20 23:05:02 -07:00
Steve Reinhardt
05d14cf3e2 Add new EventWrapper constructor that takes a Tick value 
and schedules the event immediately.

--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
 2007-05-20 21:43:01 -07:00
Steve Reinhardt
87adc37e91 Insist that PhysicalMemory object have at least one connection. 
--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc
 2007-05-20 18:23:05 -07:00
Steve Reinhardt
dcce351eaa Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

src/mem/bridge.cc:
    SCCS merged

--HG--
extra : convert_revision : 9492be56a305afe88f28a77c3b23e80ce6aa81b3
 2007-05-18 22:37:32 -07:00
Steve Reinhardt
792d5b9e5e First set of changes for reorganized cache coherence support. 
Compiles but doesn't work... committing just so I can merge
(stupid bk!).

src/mem/bridge.cc:
    Get rid of SNOOP_COMMIT.
src/mem/bus.cc:
src/mem/packet.hh:
    Get rid of SNOOP_COMMIT & two-pass snoop.
    First bits of EXPRESS_SNOOP support.
src/mem/cache/base_cache.cc:
src/mem/cache/base_cache.hh:
src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/prefetch/base_prefetcher.cc:
    Big reorg of ports and port-related functions & events.
src/mem/cache/cache.cc:
src/mem/cache/cache_builder.cc:
src/mem/cache/coherence/SConscript:
    Get rid of UniCoherence object.

--HG--
extra : convert_revision : 7672434fa3115c9b1c94686f497e57e90413b7c3
 2007-05-18 22:35:04 -07:00
Steve Reinhardt
aa5b595f39 Oops... some places in C++ explicitly ask for a "functional" 
port.  It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.

--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d
 2007-05-19 01:20:58 -04:00
Steve Reinhardt
0305159abf PhysicalMemory has vector of uniform ports instead of one special one. 
configs/example/memtest.py:
    PhysicalMemory has vector of uniform ports instead of one special one.
    Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
    Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
    Add comment.

--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
 2007-05-19 00:24:34 -04:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
 2007-05-18 13:36:47 -07:00
Gabe Black
6a6e62014e Changes to make simple cpu handle pcs appropriately for x86 
--HG--
extra : convert_revision : cf68886d53301e0a63705247bd7d66b2ff08ea84
 2007-05-18 10:42:50 -07:00
Ali Saidi
f487edf146 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 32dc1bec7fdb1ecb8879ed2dd745c4b23929aeab
 2007-05-15 18:06:52 -04:00
Ali Saidi
f317227b4e hopefully the final hacky change to make the bus bridge work ok 
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here

src/mem/bridge.cc:
src/mem/bridge.hh:
    hopefully the final hacky change to make the bus bridge work ok

--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c
 2007-05-15 17:39:50 -04:00
Steve Reinhardt
224ae7813d Merge vm1.(none):/home/stever/bk/newmem-head 
into  vm1.(none):/home/stever/bk/newmem-cache2

--HG--
extra : convert_revision : 8a501917daf81021212d136b4ebbfa059b452a13
 2007-05-14 13:54:22 -07:00
Ali Saidi
fcf85725b5 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : e445097240af7b4e73efaca855cd1f217cf00313
 2007-05-14 16:37:22 -04:00
Ali Saidi
57104ea5f9 couple more bug fixes for intel nic 
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
    couple more bug fixes

--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
 2007-05-14 16:37:00 -04:00
Ali Saidi
ea4e6f2e3d add uglyiness to fix dmas 
src/dev/io_device.cc:
    extra printing and assertions
src/mem/bridge.hh:
    deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
    make the cache try to satisfy a functional request from the cache above it before checking itself

--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
 2007-05-14 16:14:59 -04:00
Steve Reinhardt
fecae03a0b Eliminate unused PacketPtr from BaseCache's 
RequestEvent and ResponseEvent.
Compiles but not tested.

--HG--
extra : convert_revision : cc791e7adea5b0406e986a0076edba51856b9105
 2007-05-13 23:09:10 -07:00
Steve Reinhardt
df3fc36fa9 Split BaseCache::CacheEvent into RequestEvent and ResponseEvent. 
Compiles but not tested.

--HG--
extra : convert_revision : 4e1e28c4b87721ccfcf35a5ea62c1fa324acbaf9
 2007-05-13 22:58:06 -07:00
Ali Saidi
af26532bbd fix handling of atomic packets 
fix up code for counting requests and responses

--HG--
extra : convert_revision : 0d70981ee41c5d9c36cad01bd505281a096f6119
 2007-05-13 01:44:42 -04:00
Gabe Black
debf04aef1 Make sure all addresses used in syscalls are truncated to 32 bits. Actually -all- arguements are truncated to 32 bits, but we should be able to get away with it. 
--HG--
extra : convert_revision : 3b8766c68a4ab36e2e769fac4812657f3f7e0d1c
 2007-05-12 15:11:44 -07:00
Nathan Binkert
011db5c851 Move full CPU sim object stuff into the encumbered directory 
--HG--
extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c
 2007-05-11 15:01:44 -07:00
Nathan Binkert
113319a7da Float should have a c++ param type 
--HG--
extra : convert_revision : 150bbe7f31aafb43a75195fc2a365fb3c0ec5673
 2007-05-11 11:48:58 -07:00
Nathan Binkert
d667ce01b4 total should be the sum of the vector result of an operation, 
not sum the operands and then apply the operation.

--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09
 2007-05-11 11:47:18 -07:00
Ali Saidi
634d2e9d83 remove hit_latency and make latency do the right thing 
set the latency parameter in terms of a latency
add caches to tsunami-simple configs

configs/common/Caches.py:
tests/configs/memtest.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
    set the latency parameter in terms of a latency
configs/common/FSConfig.py:
    give the bridge a default latency too
src/mem/cache/cache_builder.cc:
src/python/m5/objects/BaseCache.py:
    remove hit_latency and make latency do the right thing
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
    add caches to tsunami-simple configs

--HG--
extra : convert_revision : 37bef7c652e97c8cdb91f471fba62978f89019f1
 2007-05-10 18:24:48 -04:00
Gabe Black
6d199f0b25 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
 2007-05-09 22:04:58 -07:00
Ali Saidi
e08a5c6052 Merge zizzer:/bk/newmem 
into  pb15.local:/Users/ali/work/m5.newmem.zeep

tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
    the new version of this is what we want

--HG--
extra : convert_revision : 204df6f8181df81e423def4695cd81544c485c47
 2007-05-10 00:36:47 -04:00
Ali Saidi
4a37c48e8e add/update parameters for bus bridge 
--HG--
extra : convert_revision : 063f757fbfa2c613328ffa70e556f8926623fa91
 2007-05-10 00:08:22 -04:00
Gabe Black
4ad1b58fdd Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
 2007-05-09 20:50:46 -07:00
Ali Saidi
69ea50c163 couple of updates in the intel nic 
--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
 2007-05-09 22:39:43 -04:00
Ali Saidi
9dfbea68a2 update for new reschedule semantics 
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
 2007-05-09 22:34:54 -04:00
Ali Saidi
ff55888575 undo my previous bus change, it can make the bus deadlock.. so it still constantly reschedules itself 
--HG--
extra : convert_revision : b5ef1aa0a6a2e32bd775d2dbcad9cd9505ad9b78
 2007-05-09 22:23:01 -04:00
Ali Saidi
3c608bf765 add a backoff algorithm when nacks are received by devices 
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge

src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
    add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
    add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
    add seperate response buffers and request queue sizes
    add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
    assert on the
src/mem/tport.cc:
    add a friendly assert to make sure the packet was inserted into the list

--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
 2007-05-09 18:20:24 -04:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault 
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
 2007-05-09 15:37:46 -04:00
Ali Saidi
939cbd8201 Merge zizzer:/bk/newmem 
into  udhcp-macvpn-703.public.engin.umich.edu:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : e977c5b194954774b6503484797f1c1e0eb4e425
 2007-05-09 12:02:36 -04:00
Ali Saidi
ee70d8cfc4 bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer. 
src/base/bitfield.hh:
    bit_val was being used directly in the statement in
    return. If type B had fewer bits than last, bit_val << last would get
    the wrong answer.

--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64
 2007-05-09 12:01:31 -04:00
Gabe Black
c2ac0fd89b Fix insertBits so it doesn't shift things into oblivion 
--HG--
extra : convert_revision : 8833b60e3fc94c917fbdb7a99f3d90155907b44e
 2007-05-08 17:19:33 +00:00
Gabe Black
dc1c9e0300 Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed. 
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
 2007-05-08 13:02:19 +00:00
Ali Saidi
a38c79ec22 the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space 
fix the timing cpu to handle receiving a nacked packet

src/cpu/simple/timing.cc:
    make the timing cpu handle receiving a nacked packet
src/mem/bridge.cc:
src/mem/bridge.hh:
    the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space

--HG--
extra : convert_revision : 5e12d0cf6ce985a5f72bcb7ce26c83a76c34c50a
 2007-05-07 18:58:38 -04:00
Ali Saidi
0dfc29a023 fix partial writes with a functional memory hack 
figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached

configs/common/FSConfig.py:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/python/m5/objects/Bridge.py:
    fix partial writes with a functional memory hack
src/mem/bus.cc:
src/mem/bus.hh:
src/python/m5/objects/Bus.py:
    figure out the block size from devices attached to the bus otherwise use a default block size when no devices that care are attached
src/mem/packet.cc:
    fix WriteInvalidateResp to not be a request that needs a response since it isn't
src/mem/port.hh:
    by default return 0 for deviceBlockSize instead of panicing. This makes finding the block size the bus should use easier

--HG--
extra : convert_revision : 3fcfe95f9f392ef76f324ee8bd1d7f6de95c1a64
 2007-05-07 14:42:03 -04:00
Ali Saidi
3f2b039c98 change the way dprintf works so the cache accesses required to fulfill the dprintf aren't show in between the Cycle: name: 
printing and the actual formatted string being printed

--HG--
extra : convert_revision : 8876ba938ba971f854bab490c9af10db039a2e83
 2007-05-01 18:14:16 -04:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted 
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
 2007-05-01 18:12:58 -04:00
Ali Saidi
e0f8e57a7f Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 7e4b82f5949c0807d93fff80c44a8828968d1248
 2007-05-01 12:33:03 -04:00
Ali Saidi
ccdf60f7b2 initialize lastTxInt to 0 
--HG--
extra : convert_revision : 4c5e9c2145b12fdeba91f3fdd8963c35abe326c2
 2007-05-01 12:32:30 -04:00
Ali Saidi
8d56145d7b always skip the debugprintf function (DebugPrintf traceflag shouldn't matter). Otherwise, when you turn on debugprintf alters the execution 
--HG--
extra : convert_revision : 1c9a665e3b7234cacf06c31d2e7886244a9e82bc
 2007-04-30 22:49:21 -04:00
Ali Saidi
7baf29c9d0 fix igbe bug 
--HG--
extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
 2007-04-30 13:18:44 -04:00
Ali Saidi
58b9047194 fix console printing bug 
--HG--
extra : convert_revision : 5481b72b22e7a2cf3367d777309bc30201f3b1fc
 2007-04-30 13:13:03 -04:00
Ali Saidi
ae4208f3a3 add the ability for the ethernet device to check if the link is busy 
--HG--
extra : convert_revision : 0dc0c4c4546869261f4508ad22a6a85aecf3c334
 2007-04-30 13:09:13 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized, 
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
 2007-04-27 13:59:17 -07:00
Kevin Lim
092951e2b1 Remove extra delete that was causing segfault. 
--HG--
extra : convert_revision : 8a27ed80308c95988f3bc43d670dc0ac9e946d39
 2007-04-26 00:07:42 -04:00
Kevin Lim
15cc194d71 Remove unnecessary check. 
--HG--
extra : convert_revision : 8cc2943ebc41e4d430789ee7923dd0dc878be06b
 2007-04-26 00:02:37 -04:00
Ron Dreslinski
3eb4ba3abb Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 11df5fb2a8f1fa020d042e75b22a7f2f2bcbd9ab
 2007-04-23 14:38:04 -04:00
Gabe Black
cca881a531 Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
 2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
 2007-04-23 11:34:39 -04:00
Kevin Lim
dbc1edd23d Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 05f738ab6cf1e8bd2940f4ce20602f1e8ad1af48
 2007-04-22 15:31:33 -04:00
Kevin Lim
8c7a6e1654 Use proper cycles for IPC and CPI equations. 
src/cpu/o3/cpu.cc:
    Use proper cycles for these equations.

--HG--
extra : convert_revision : cd49410eed978c789d788e80462abed6cb89fbae
 2007-04-22 15:11:54 -04:00
Gabe Black
acc62514b1 Make the floating point zero register special handling only apply for ALPHA. 
--HG--
extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
 2007-04-22 17:50:43 +00:00
Gabe Black
cea5435760 Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used. 
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
 2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f fixes for solaris compile 
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
 2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
 2007-04-21 17:50:47 -04:00
Gabe Black
f3a0abbecc Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 26118d0dce464405148d2693fee4561fa0ce10ff
 2007-04-18 21:27:37 -04:00
Nathan Binkert
6f4c1aa475 Move the turbolaser python simobject stuff into the 
encumbered directory

--HG--
extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854
 2007-04-18 11:15:52 -07:00
Nathan Binkert
d92fff858b fix SIGUSR1 and SIGUSR2 by clearing the variables after 
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
 2007-04-18 08:04:46 -07:00
Gabe Black
dde2b11ae6 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : d18cce378fe3390c6e708945b9ea7c76c2d20a81
 2007-04-17 08:56:59 -04:00
Ron Dreslinski
3b95161da8 Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 8630b3771678b68d5cd12a61f7a4de2e3443a8d7
 2007-04-16 11:32:09 -04:00
Ron Dreslinski
2952c34096 Fixes for splash, may conflict with Korey's SMT work and doesn't support 03cpu yet. 
src/cpu/simple/base.cc:
    Cpu's should start as unallocated, not suspended
src/cpu/simple_thread.cc:
    Wait for a thread to be assigned to activate the cpu
src/kern/tru64/tru64.hh:
    When looking for a open cpu to assign threads, look for an unallocated one, not a suspended one.

--HG--
extra : convert_revision : 5e3ad2e96b4a715ed38293ceaccff5b9f4ea7985
 2007-04-16 11:31:54 -04:00
Gabe Black
8248af53b1 Make an inner loop which pulls microops out of macroops. These aren't checked for control flow because we can pull out microops until we run out of buffer. This prevents microops from being interpretted as branches because the pc doesn't become npc. 
--HG--
extra : convert_revision : 9fff7c6c32900692bbc567ecb75701c9c73da259
 2007-04-15 21:52:38 +00:00
Gabe Black
308b2f0ce3 Add extra constructors to Alpha and MIPS 
--HG--
extra : convert_revision : 26ea87bfe9e5c27134eb9a15bf9e4629afae6c69
 2007-04-15 21:51:05 +00:00
Gabe Black
c3081d9c1c Add support for microcode and pull out the special branch delay slot handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect. 
--HG--
extra : convert_revision : 8b9c603616bcad254417a7a3fa3edfb4c8728719
 2007-04-14 17:13:18 +00:00
Gabe Black
5a3dcc172a Make register indexes larger so they can actually hold all the legal values. Oops! 
--HG--
extra : convert_revision : 7689b2e1f7468e4acb8be0f242f74002c79e7960
 2007-04-14 17:08:24 +00:00
Gabe Black
3140dd88bc Make the fsr a serializing register. Other control registers probably need this as well. 
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
 2007-04-14 17:07:24 +00:00
Gabe Black
c7f1cf1d58 Remove most of the special handling for delay slots since they have to be squashed anyway on a mispredict. This is because the NNPC value they saw when executing was incorrect. 
--HG--
extra : convert_revision : b42c4eb28b4fbba66c65cbd0a5033bf886c1532d
 2007-04-13 13:59:31 +00:00
Nathan Binkert
a575fbd4aa Completely re-work how the scons framework incorporates swig 
and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python.  This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++).  Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.

--HG--
extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
 2007-04-12 21:20:04 -07:00
Nathan Binkert
eefbda7f7c Don't allow Source to accept multiple arguments, lists, 
or automatically do Split().  It isn't used anywhere, and
isn't very consistent with the python features that are
about to be added.  Do accept SCons.Node.FS.File arguments
though.

--HG--
extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
 2007-04-12 09:07:59 -07:00
Nathan Binkert
e04208f046 Fix NextEthernetAddr. 
unproxy() needs to return a new object otherwise all
instances will use the same value.  This fix is more
or less unique to NextEthernetAddr because its use of
the proxy stuff is a bit different than everything else.

--HG--
extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
 2007-04-12 08:37:55 -07:00
Nathan Binkert
fa2a93a236 Add a scons hack to force symlinks to the swig .i files 
to be created

--HG--
extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
 2007-04-12 08:35:19 -07:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
 2007-04-11 15:30:09 +00:00
Gabe Black
c382bdf93d Use a computed mask to mask out the fetch address and not a hard coded one. 
--HG--
extra : convert_revision : c22907bed4b83f0dff51d2283dafe4f76fa9e94a
 2007-04-11 14:16:54 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu. 
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
 2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message. 
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
 2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
 2007-04-11 12:25:00 +00:00
Gabe Black
fcc35a67e0 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
 2007-04-10 17:27:33 +00:00
Gabe Black
74122c04cf Even if you don't want to fetch more bytes, make sure you handle a fault. 
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
 2007-04-10 17:27:12 +00:00
Gabe Black
798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions. 
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
 2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit. 
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
 2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. 
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
 2007-04-10 17:13:26 +00:00
Gabe Black
5476247623 Fixed a compile error. 
--HG--
extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
 2007-04-10 01:52:38 +00:00
Gabe Black
d54b8b73ed Comment out the remote gdb object for SE mode. 
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
 2007-04-09 18:30:50 +00:00
Kevin Lim
64b4572c3e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
 2007-04-09 14:30:49 -04:00
Kevin Lim
0cc343d41d Fix bug when blocking due to no free registers. 
--HG--
extra : convert_revision : a1a218d3294515184689041487057495223360b7
 2007-04-09 14:29:59 -04:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
 2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here. 
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
 2007-04-09 01:08:05 +00:00
Gabe Black
c7bb106886 Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts. 
--HG--
extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
 2007-04-08 23:31:11 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
 2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
 2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa 
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
 2007-04-06 16:55:56 +00:00
Gabe Black
a3ed19f82a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
 2007-04-06 16:39:47 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. 
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
 2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function 
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
 2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code. 
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
 2007-04-06 15:15:36 +00:00
Gabe Black
3c9768e644 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
 2007-04-06 14:37:46 +00:00
Gabe Black
077183f7ec Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : efdbf9787383dc1df544b7276f8120285e69bf69
 2007-04-05 11:35:31 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution. 
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
 2007-04-04 23:19:32 +00:00
Gabe Black
a664017c2a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 81269f094834f43b4e908321bfce2e031b39d2a4
 2007-04-04 20:50:49 +00:00
Kevin Lim
3d2a434e42 Updates for other ISA cpu_builders. 
--HG--
extra : convert_revision : b02736c627bb9dcf87463a9133e04369b9f8fae2
 2007-04-04 16:50:48 -04:00
Kevin Lim
b247e02f6e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 7181d8c2ee673322372484cf288a94ebd91b5265
 2007-04-04 15:39:13 -04:00
Kevin Lim
6ff6621f20 Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 
src/cpu/o3/alpha/cpu_impl.hh:
    Pass ISA-specific O3 CPU to FullO3CPU as a constructor parameter instead of using setCPU functions.

--HG--
extra : convert_revision : 74f4b1f5fb6f95a56081f367cce7ff44acb5688a
 2007-04-04 15:38:59 -04:00
Ali Saidi
d9ab45d066 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : be37463ea3ca38ef02ae0b82da0752f240a530d0
 2007-04-04 13:57:23 -04:00
Ali Saidi
d0ea8ff088 The MemoryObject tha owns a port should delete it if it so chooses when deletePortRefs() is called on it with that port as a parameter. 
In this way a MemoryObject can keep a functional port around and give it to anyone who wants to do functional accesses rather
than creating a new one each time.

src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/cache_impl.hh:
    only keep around one func port we give to anyone who wants it. Otherwise we can run out of port ids reasonably quickly if
    a lot of functional accesses are happening (e.g. remote debugging, dprintk, etc)

--HG--
extra : convert_revision : 6a9e3e96f51cedaab6de1b36cf317203899a3716
 2007-04-04 13:56:38 -04:00
Gabe Black
4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: 
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
 2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case 
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
 2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7 Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function. 
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
 2007-04-04 14:27:00 +00:00