sanchayanmaity/gem5
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Author SHA1 Message Date
Gabe Black
387f00e3dd Fill out the miscreg file and add types to miscregs.hh 
--HG--
extra : convert_revision : 865432256518c4340d9f319bdd9b7d160dc656a0
 2007-07-18 16:12:39 -07:00
Gabe Black
5cca5ca3d9 Hook x86 nop into the decoder. 
--HG--
extra : convert_revision : 26f765ecf74a0bb6a1ec89816f1d630a1a8e4553
 2007-07-18 16:11:52 -07:00
Gabe Black
3bd42af99e Implement the x86 nop to be a "fault" microop which returns "NoFault". 
--HG--
extra : convert_revision : 1b446def756f1d0f80631db944d1cc41be95efbd
 2007-07-18 16:10:44 -07:00
Gabe Black
dffc40ff62 Add a generateDisassembly function to the MicroFault StaticInst. 
--HG--
extra : convert_revision : 73811bf99b26fad413c9b84a54f44e3763ff1835
 2007-07-18 16:09:35 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const. 
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
 2007-07-18 16:09:00 -07:00
Gabe Black
85f32920fb Calculate the correct address size. 
--HG--
extra : convert_revision : 6bd9d5a01ba6600781e3678e0403dca524fb2cba
 2007-07-17 20:54:55 -07:00
Gabe Black
e524240d68 Make disassembled x86 register indices reflect their size. 
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
 2007-07-17 18:12:33 -07:00
Gabe Black
2e80f71dcd Implemented jnz. 
--HG--
extra : convert_revision : ea169ad68acbb3383443586b783b831b3a9eecf9
 2007-07-17 16:55:33 -07:00
Gabe Black
62ffc71fab Use limm to set up immediate value for subtract instruction. 
--HG--
extra : convert_revision : f94e391e36a47c2f5222f30d7e28f48f7875db58
 2007-07-17 16:50:13 -07:00
Gabe Black
d77d4c04b7 Implement the jz instruction. 
--HG--
extra : convert_revision : 7c0bd7ce244f724ac03bbb5fdf770c7a3eba78b4
 2007-07-17 15:36:45 -07:00
Gabe Black
c4004482a5 Make "test" set some condition codes. 
It still needs to zero the overflow and carry flags to be correct.

--HG--
extra : convert_revision : 73cb3a55f7b4234389d9355f5ad45da6aaaa6c60
 2007-07-17 15:35:34 -07:00
Gabe Black
a6757095c3 Add in support for condition code flags. 
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
 2007-07-17 15:33:18 -07:00
Gabe Black
cf846d5205 Add in operand which holds the condition code bits of the flag register. 
--HG--
extra : convert_revision : 416052f41fccc8286b3bdbe8d559512a761224f2
 2007-07-17 15:28:48 -07:00
Gabe Black
bbf7163dd9 Add symbols for each of the flags a microop could set and each condition it could check. 
--HG--
extra : convert_revision : 1f542b8aadfd5146539cadef631b49d77f578472
 2007-07-17 15:27:28 -07:00
Gabe Black
cbc24d6600 Actually include miscregs.hh 
--HG--
extra : convert_revision : 6ebf906d2211b94f28c173f0d2da91bd446fcb2c
 2007-07-17 13:30:23 -07:00
Gabe Black
b0643a08a3 Create a file to describe misc registers. 
Define bitfields, indices, etc.

--HG--
extra : convert_revision : 8fffdc4cf796d304b12b317d8bddf5685bd50cf4
 2007-07-17 13:29:40 -07:00
Gabe Black
aad11bf879 Add a spot for the condition code portion of the flag register. 
This is stored in the integer register file so that it can be renamed, but it should be a misc reg.

--HG--
extra : convert_revision : eee48f24dd80b145f14427482047c4d8af2521ab
 2007-07-17 13:26:06 -07:00
Gabe Black
873b762d4b Move bitunion code into it's own file. 
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
 2007-07-14 17:28:26 -07:00
Gabe Black
4f7809d5e6 Pull some hard coded base classes out of the isa description. 
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
 2007-07-14 17:14:19 -07:00
Steve Reinhardt
288f9cf7d2 Merge from head. 
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
 2007-07-14 12:23:47 -07:00
Steve Reinhardt
e5ecfa2745 Disable PrintThreadInfo since it causes a panic when using VPtr. 
See Flyspray #281.

--HG--
extra : convert_revision : 199ef802bcabed09f6ea6922c3a3954fea161190
 2007-07-14 12:22:04 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event" 
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
 2007-06-30 17:45:58 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are 
now encoded in cmd field.

--HG--
extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
 2007-06-30 10:16:18 -07:00
Korey Sewell
738ecc495b fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... 
src/arch/mips/isa/decoder.isa:
    commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
    edit fp format
src/arch/mips/isa/formats/mem.isa:
    fix for basic store instructions

--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
 2007-06-29 15:13:50 -04:00
Korey Sewell
e28cbc98a0 o3cpu build for mips 
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
 2007-06-28 05:30:46 -04:00
Korey Sewell
ac19e0c505 FINISH off merge of mips mt/dsp isa extensions by adding the ControlBitfieldOPerand to ISA Parser. Now, while things do build, we have to fix broken functionality... 
src/arch/isa_parser.py:
    add back deleted writeback in Control Operand

--HG--
extra : convert_revision : dba11af220a1281fa53f79d87e4f8752bdfc56db
 2007-06-22 21:09:35 -04:00
Korey Sewell
c6d137f565 add Control Bitfield class 
--HG--
extra : convert_revision : 31e7243c8820cb9f6744c53c417460dee9adaf44
 2007-06-22 20:09:46 -04:00
Korey Sewell
753adb38d5 mips import pt. 1 
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
 2007-06-22 19:03:42 -04:00
Gabe Black
16c1b5484f Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 3fa3fa4544ff8c9d2135e1befe6c8f4757006a2a
 2007-06-22 17:44:33 -04:00
Gabe Black
70d6044527 Make symbols for regular registers. 
--HG--
extra : convert_revision : 28a6df1efe4298877dc2b20179caeb25dfdc4622
 2007-06-21 20:35:27 +00:00
Gabe Black
ec24de8b59 Get rid of an unnecessary include file. 
--HG--
extra : convert_revision : d8d139180917f54006a5a79df4a0f206ddd39fed
 2007-06-21 20:35:26 +00:00
Gabe Black
49490b334a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

src/cpu/o3/fetch_impl.hh:
    hand merge

--HG--
extra : convert_revision : 3f71f3ac2035eec8b6f7bceb6906edb4dd09c045
 2007-06-21 20:35:25 +00:00
Gabe Black
25e385e0cf Use the new symbols to clean up the assembler. 
--HG--
extra : convert_revision : 005464e875ede1e37dfe0e0482c29fd793ca52be
 2007-06-21 15:30:05 +00:00
Gabe Black
13bf022053 Needed for last change set to work :P 
--HG--
extra : convert_revision : 9e57e582dd1ef2805d5adffcc0ccfd99596d9f54
 2007-06-21 15:29:02 +00:00
Gabe Black
ae60d58083 Define symbols for the x86 specialization of the microassembler. 
--HG--
extra : convert_revision : 1fd66ba519d211fec18641b6df94b7640c56080c
 2007-06-21 15:28:08 +00:00
Gabe Black
0dc15742e3 Fix a comment. 
--HG--
extra : convert_revision : 17e67cf6ea17fe6f971ef608547983fbb94adec9
 2007-06-21 15:26:38 +00:00
Gabe Black
7e7d3ee0aa Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols. 
--HG--
extra : convert_revision : 60d1ef677a6a59a9d897086893843ec1ec368148
 2007-06-21 15:26:01 +00:00
Gabe Black
efce09e958 Add in code that lays the ground work for setting flags. 
--HG--
extra : convert_revision : e4fcb64d45804700a0ef34e8acf5615b66e2a527
 2007-06-21 13:48:44 +00:00
Gabe Black
77aa98d0f8 Implement rip relative addressing and put in some missing loads and stores. 
--HG--
extra : convert_revision : 99053414cef40f13c5226871a72909b2622d8c26
 2007-06-20 19:08:04 +00:00
Gabe Black
c4ebfa850e Fix a newly introduced bug where the predecoder wasn't picking up all the displacement. 
--HG--
extra : convert_revision : 9202c11ee187458adcd85ba616b7f7f4bdd4eec1
 2007-06-20 19:06:08 +00:00
Gabe Black
a19f1c4014 X86 probably doesn't need a window save area. 
--HG--
extra : convert_revision : c4a76262d4396f5f5b96b1c9e751014c2abbd78a
 2007-06-20 19:05:06 +00:00
Gabe Black
6c4b3db04c Fix a typo in one of the operand type tags. 
--HG--
extra : convert_revision : bea87214ba4b40d75a350b803154836ec6d0ae9e
 2007-06-20 19:04:41 +00:00
Gabe Black
e6328170e1 Comment out some unnecessary debug output. 
--HG--
extra : convert_revision : 9df17841d970a7995d8ed1d51ee66e2c5457e5e3
 2007-06-20 19:04:40 +00:00
Gabe Black
a735b7e282 Forgot to check these in... 
--HG--
extra : convert_revision : f489fda15740bae0a73bfb012f3bab5790b5c2b5
 2007-06-20 19:04:39 +00:00
Gabe Black
27da9f99b1 Comment out some unnecessary debug statements. 
--HG--
extra : convert_revision : aabaaf099f070832bf42cedf2472170e0738ee1c
 2007-06-20 19:04:38 +00:00
Gabe Black
a68ddf685c Make memory instructions work better, add more macroop implementations, add an lea microop, move EmulEnv into it's own .cc and .hh. 
--HG--
extra : convert_revision : 1212b8463eab1c1dcba7182c487d1e9184cf9bea
 2007-06-20 15:02:50 +00:00
Gabe Black
5c48a05813 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.hpl.hp.com:/home/gblack/newmem-o3-micro

src/cpu/base_dyn_inst_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Hand merge

--HG--
extra : convert_revision : 0c0692033ac30133672d8dfe1f1a27e9d9e95a3d
 2007-06-19 18:54:40 -07:00
Gabe Black
d2ccf5e509 More faithfulness to what instructions should work in what modes, and added the MOVSXD instruction. 
--HG--
extra : convert_revision : 38b9bf6cd4bdec6355b1158967c7d3562715cacd
 2007-06-19 22:40:10 +00:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. 
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
 2007-06-19 18:17:34 +00:00
Gabe Black
d496492793 Make instructions that are illegal in 64 bit mode not do the wrong thing in 64 bit mode. Also add in more versions of PUSH and POP, and a version of near CALL. 
--HG--
extra : convert_revision : 7d8266cdfa54ac25610466b3533d3e9e5433297b
 2007-06-19 17:56:06 +00:00
Gabe Black
4486762a85 Make an error message a little more descriptive. 
--HG--
extra : convert_revision : dbde025b1dcec0083e7276a9938bd21e7ab2887f
 2007-06-19 17:53:10 +00:00
Gabe Black
ebe4d05f70 Renovate the "fault" microop implementation. 
--HG--
extra : convert_revision : dc9d67dd5413f00f16d37cb2d0f8b0d10971e14a
 2007-06-19 14:50:35 +00:00
Gabe Black
056cfc345b Get rid of the commented out versions of macroops which have been reimplemented. The comments are basically functioning like a todo list. 
--HG--
extra : convert_revision : cb07e3813f6cf882b4a5c77c498ffbca26adf586
 2007-06-19 14:26:42 +00:00
Gabe Black
6e286cddfa Get rid of the immediate and displacement components of the EmulEnv struct and use them directly out of the instruction. The extra copies are conceptually realistic but are just innefficient as implemented. Also don't use the zeroeth microcode register for general storage since it's now the zero register, and implement a load and a store microops. 
--HG--
extra : convert_revision : 0686296ca8b72940d961ecc6051063bfda1e932d
 2007-06-19 14:18:25 +00:00
Gabe Black
8caef7d25a Add a stack size bitfield and expose the mode component of the ExtMachInst. 
--HG--
extra : convert_revision : aad0ec51745fb94335898b0565bb11c1b399bbee
 2007-06-19 14:15:21 +00:00
Gabe Black
1012fd4427 Add a function to print out segment names. 
--HG--
extra : convert_revision : 8cbe3ca0d05165f7da5d6fa38c899ecc9e782511
 2007-06-19 14:14:17 +00:00
Gabe Black
4ae284282e Get rid of unnecessary output. 
--HG--
extra : convert_revision : 0df9a12788b8ce3225c113c095d5f13e49a7c544
 2007-06-18 14:15:47 +00:00
Gabe Black
6c12577937 Add in incomplete pick and merge functions which read and write pieces of registers, and fill out microcode disassembly. 
--HG--
extra : convert_revision : 56332b3999a9079b1bd305ee2826abdf593367e1
 2007-06-18 14:15:00 +00:00
Gabe Black
3ceb0a46ae Add in some microregs. 
--HG--
extra : convert_revision : e8a894c2f7901329bd390a4cfd92209d0e29cf80
 2007-06-14 20:52:25 +00:00
Gabe Black
dad3058224 Sign extend byte immediates as well. There might need to be a fancier system in place to handle this in the future. 
--HG--
extra : convert_revision : 2c5bd719c770d9a93a57bd29782842f82384863d
 2007-06-14 20:52:24 +00:00
Gabe Black
7213944110 Fix limm. 
--HG--
extra : convert_revision : ab76b11c2bb2f3abc0e7a84f7167d92d16ed074e
 2007-06-14 20:52:23 +00:00
Gabe Black
866cc8214b Implement a handful more instructions and differentiate macroops based on the operand types they expect. 
--HG--
extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
 2007-06-14 20:52:22 +00:00
Gabe Black
a8f65b18bc Move the high byte register indices to the right place. 
--HG--
extra : convert_revision : 3f04036d598b6572bab6ec06d162b97564a6529c
 2007-06-14 20:52:21 +00:00
Gabe Black
7219b6edd9 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : ba718de4d676f6d0bd80c29de46be1f6a2f73feb
 2007-06-14 20:52:20 +00:00
Vincentius Robby
5b5570e0bf Modified instruction decode method. 
Make code compatible with new decode method.

src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
    Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
    Modified instruction decode method.

--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
 2007-06-14 16:52:19 -04:00
Gabe Black
752199f827 Make POP special case its dataSize to default to 64 bits in 64 bit mode. 
--HG--
extra : convert_revision : 5c6251d962d9997676ffc795bb92eeb588caed39
 2007-06-14 13:52:08 +00:00
Gabe Black
cd3fee1b81 Put the mode in the ExtMachInst. 
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e
 2007-06-14 13:50:58 +00:00
Gabe Black
640ab1d2e7 Get rid of an unnecessary debug statement. 
--HG--
extra : convert_revision : 0b306dd96f5358474ad6a8bf4a949c12bcd139cd
 2007-06-14 13:49:23 +00:00
Gabe Black
20ec77fdc1 Get rid of some debug output and let macroops set headers in their constructor. The intention is to allow them to modify the emulation environment struct before it's used to construct its microops. 
--HG--
extra : convert_revision : b04fc9ead8e3322fc3af3f14d75e2206ddfbe561
 2007-06-14 13:47:52 +00:00
Gabe Black
d265c9951f Fix up param regular expression to not duplicated the escaping \ and to pair up \s correctly. 
--HG--
extra : convert_revision : b4b790fb8cfd2a9e28568cf978eca70b1c65806b
 2007-06-14 13:45:37 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. 
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
 2007-06-13 20:09:03 +00:00
Gabe Black
5fd567425d Fix the operand type tag parser to recognize multi character register names. 
--HG--
extra : convert_revision : e025620e29f2515d51240e96c4a05a4f74bdf72e
 2007-06-13 18:08:06 +00:00
Gabe Black
715efab3b9 Partially implement "POP" 
--HG--
extra : convert_revision : ba454579a6a82ce4924102a633e5758fb2a30b2d
 2007-06-13 18:06:34 +00:00
Gabe Black
fd45c4a58f Move load/store microops into their own file. They still don't do anything, though. 
--HG--
extra : convert_revision : 251763c614b9056c3ca7a85ef92c416552da893f
 2007-06-13 18:05:08 +00:00
Gabe Black
dc13db8578 Fix the immediate version of register operations, and get their name to show up correctly. 
--HG--
extra : convert_revision : 9fc36b99c9027e35f22983d5d1e22c940fa093de
 2007-06-13 18:01:23 +00:00
Gabe Black
4e7786d971 Minor comment fix up. 
--HG--
extra : convert_revision : 20d517c4bc2aae54e53368c708b5abb27ed3a469
 2007-06-12 17:35:11 +00:00
Gabe Black
0d8d3f988f Make use of some of the REX prefix. 
--HG--
extra : convert_revision : 948eceb59a1cd9b02ad9355dd5894af0bbec4e83
 2007-06-12 16:47:10 +00:00
Gabe Black
baf145e0f5 Reset the rex and legacy prefix components of the ExtMachInst as well. 
--HG--
extra : convert_revision : 832a324fec2d2b59f1c101d7fa72d7f670f0495d
 2007-06-12 16:46:04 +00:00
Gabe Black
548b121c1c Flesh out the bitfields for prefixes. 
--HG--
extra : convert_revision : 0956b3d3532cba3856deda914d7cc708377b701b
 2007-06-12 16:45:06 +00:00
Gabe Black
ea3f7c9531 Add in MOV instructions. 
--HG--
extra : convert_revision : 54a6b36dff3c15699faf2c767fc594359422c0ee
 2007-06-12 16:31:42 +00:00
Gabe Black
eb68c9986e Fix up a comment that wasn't changed over to x86. 
--HG--
extra : convert_revision : 58448b984447babba708b9dcb1b4939ed35308a6
 2007-06-12 16:30:48 +00:00
Gabe Black
2e9fa55f51 Get rid of unnecessary namespace prototype. 
--HG--
extra : convert_revision : 388c0d6f2af96c4d33c1fe5d42a21866a4d71556
 2007-06-12 16:29:49 +00:00
Gabe Black
7a52faa39b Use objects to pass around output code, and fix/implement a few things. 
src/arch/x86/isa/formats/multi.isa:
    Make the formats use objects to pass around output code.

--HG--
extra : convert_revision : 428915bda22e848befac15097f56375c1818426e
 2007-06-12 16:25:47 +00:00
Gabe Black
d0c5da2cd4 Add an address size bitfield to the isa description and the ExtMachInst 
--HG--
extra : convert_revision : f8907ef5ef77e050eeb00d895263b49da4a9b6e9
 2007-06-12 16:23:42 +00:00
Gabe Black
4ad73abcfb Add some dprintfs 
--HG--
extra : convert_revision : 7e9a1feb808604364584893eed1735a8da1556fb
 2007-06-12 16:22:35 +00:00
Gabe Black
a7f3bbcfab Make microOp vs microop and macroOp vs macroop capitilization consistent. 
src/arch/x86/isa/macroop.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also fill out the emulation environment handling a little more, and use an object to pass around output code.
src/arch/x86/isa/microops/base.isa:
    Make microOp vs microop and macroOp vs macroop capitilization consistent. Also adjust python to C++ bool translation.

--HG--
extra : convert_revision : 6f4bacfa334c42732c845f9a7f211cbefc73f96f
 2007-06-12 16:21:47 +00:00
Gabe Black
1493ceda8f Fix another outdated comment. 
--HG--
extra : convert_revision : 55f89d9f96734e96ae082399df6b0206d112cd6c
 2007-06-08 18:41:58 +00:00
Gabe Black
78910a7b3d Adjust a few more comments. 
--HG--
extra : convert_revision : 9b79ce72acf8932ce26e1744a149f2fd2435ea96
 2007-06-08 17:41:23 +00:00
Gabe Black
b9c38660ef Fix up a potentially misleading comment. 
--HG--
extra : convert_revision : 58d37d8cc8e41c9640038d6dddae4cb5649638aa
 2007-06-08 17:30:16 +00:00
Gabe Black
57a8c32bea Fix the formatting on a comment. 
--HG--
extra : convert_revision : 89636a7410dec54235416e3c16db98cc5eecf2b0
 2007-06-08 17:16:05 +00:00
Gabe Black
038fa48990 Clean up where files are included, and get rid of some cruft. 
src/arch/x86/isa/main.isa:
    Clean up where files are included.

--HG--
extra : convert_revision : 0528359432bf0fb9198b63de9611176bc78e07c7
 2007-06-08 17:14:39 +00:00
Gabe Black
658df56bf3 Clean things up a little. 
--HG--
extra : convert_revision : 62ad0839847db85738054da6f7da8a956b24143e
 2007-06-08 17:06:34 +00:00
Gabe Black
8bd213b3b8 Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction. 
--HG--
extra : convert_revision : 20e6d6ac625dde8f1885acc445882096df562778
 2007-06-08 16:13:20 +00:00
Gabe Black
1f7ed5b7b4 Big changes to use the new microcode assembler. 
--HG--
extra : convert_revision : 7d1a43c5791a2e7e30533746da3dd7036a5b8799
 2007-06-08 16:09:43 +00:00
Gabe Black
ce8f4c1f16 Fixed format arguments for XOR. 
--HG--
extra : convert_revision : d64fe734fcdcc414ba9af9fc5f0f795429d5dad3
 2007-06-08 16:07:31 +00:00
Gabe Black
2f194cc6f7 Add a bitfield to refer to the opSize member of the extMachInst. 
--HG--
extra : convert_revision : 1854ebc00a9f3ae8c36cc579de6c3a2b48c0fdb6
 2007-06-08 16:06:22 +00:00
Gabe Black
dba02f703b Make limm (load immediate) microop 
--HG--
extra : convert_revision : f4883febd92cfade61c1a6a31fdb2d27296d9044
 2007-06-04 19:53:06 +00:00
Gabe Black
41bc0fc5b2 Reworking x86's microcode system. This is a work in progress, and X86 doesn't compile. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/macroop.isa:
src/arch/x86/isa/main.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/base.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/regop.isa:
src/arch/x86/isa/microops/specop.isa:
    Reworking x86's microcode system

--HG--
extra : convert_revision : cab66be59ed758b192226af17eddd5a86aa190f3
 2007-06-04 15:59:20 +00:00
Gabe Black
6e8a06b237 Clean things up 
--HG--
extra : convert_revision : 72ffcf5492d4e4f899ea5761639147e001c525b0
 2007-06-01 16:24:51 +00:00
Gabe Black
a703fdfcf9 Add a second section to make sure the ROM is extended properly. 
--HG--
extra : convert_revision : a69c09c5e62c8b00d6c8039199c02e8fecbf9f2f
 2007-05-31 22:21:21 +00:00
Gabe Black
2bdd4eda12 Add rom based macroops into the macroop dict instead of dropping them on the floor 
--HG--
extra : convert_revision : 964391c8050af0239da32bcc77550740de1f3160
 2007-05-31 22:21:20 +00:00
Gabe Black
287446396c Do something with ROM based macroops 
--HG--
extra : convert_revision : 3a14c683ab89217c083c58e8c374607dd04b66c4
 2007-05-31 22:21:19 +00:00
Gabe Black
d24a9c7d21 Make directives take parameters and use the directive function and not it's name 
--HG--
extra : convert_revision : fbc93ba592b0cc009696e8d7edead841ec2ea01c
 2007-05-31 20:45:06 +00:00
Gabe Black
ace2890f9f Handle comments 
--HG--
extra : convert_revision : 3f93baaf250922eb40d8718e978273b0def1e4dd
 2007-05-31 20:45:05 +00:00
Gabe Black
c432588981 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/cpu/simple/base.cc:
    Hand merge

--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
 2007-05-31 20:45:04 +00:00
Vincentius Robby
ecf1eb7248 Assign traceData to be NULL at BaseSimpleCPU constructor. 
Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
exec tracing isn't needed for m5.fast binaries
Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.

src/arch/sparc/miscregfile.cc:
    Moved MISCREG_GL, MISCREG_CWP, and MISCREG_TLB_DATA out of switch statement and use if blocks instead.
src/cpu/simple/base.cc:
    Assign traceData to be NULL at BaseSimpleCPU constructor.
    Initialize a temporary variable for thread->readPC() at setupFetchRequest() to reduce function calls.
    exec tracing isn't needed for m5.fast binaries

--HG--
extra : convert_revision : 5dc92fff05c9bde994f1e0f1bb40e11c44eb72c6
 2007-05-31 16:01:41 -04:00
Gabe Black
62fde97bb2 Early micro assembler 
src/arch/micro_asm.py:
    Micro assembler
src/arch/micro_asm_test.py:
    Test script for the micro assembler. This probably should go somewhere else eventually.

--HG--
extra : convert_revision : 277fdadec94763ae657f55f501704693b81e0015
 2007-05-31 13:52:48 +00:00
Gabe Black
7860c045e2 x86 work that hadn't been checked in. 
src/arch/x86/isa/decoder/one_byte_opcodes.isa:
    Give the "MOV" instruction the format of it's arguments. This will likely need to be completely overhauled in the near future.
src/arch/x86/predecoder.cc:
src/arch/x86/predecoder.hh:
    Make the predecoder explicitly reset itself rather than counting on it happening naturally.
src/arch/x86/predecoder_tables.cc:
    Fix the immediate size table
src/arch/x86/regfile.cc:
    nextnpc is bogus

--HG--
extra : convert_revision : 0926701fedaab41817e64bb05410a25174484a5a
 2007-05-31 13:50:35 +00:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix 
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
 2007-05-27 19:21:17 -07:00
Gabe Black
a3ae9486d5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
 2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89 Make the lexer and parser use objects and not the last lexer and parser generated. 
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
 2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2 Update to ply 2.3 
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
    Import patch ply.diff
src/arch/isa_parser.py:
    everything is now within the ply package

--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
 2007-05-24 21:54:51 -07:00
Gabe Black
a13d5af274 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
 2007-05-18 13:36:47 -07:00
Gabe Black
6d199f0b25 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 56c2205cdbb9af64c30b381a80b4d14c97841da7
 2007-05-09 22:04:58 -07:00
Gabe Black
4ad1b58fdd Merge zizzer.eecs.umich.edu:/bk/newmem 
into  doughnut.mwconnections.com:/home/gblack/newmem-o3-micro

--HG--
extra : convert_revision : 545b9e98eb1895f4b9e782224fb6615c71ed6323
 2007-05-09 20:50:46 -07:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault 
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
 2007-05-09 15:37:46 -04:00
Gabe Black
dc1c9e0300 Add a hack to truncate addresses to 32 bits in SE. Paging should be changed to use the architecture's TLB, at which point this can be removed. 
--HG--
extra : convert_revision : 54f3c18e5aead727d0ac244ed00fd97d3ca8ad75
 2007-05-08 13:02:19 +00:00
Ali Saidi
39743d35a3 fix flushAddr so it doesn't modify an iterator that has been deleted 
--HG--
extra : convert_revision : 8b7e4948974517b13616ab782aa7e84471b24f10
 2007-05-01 18:12:58 -04:00
Nathan Binkert
69d259b6ae gcc 4.1 claims that mem_data might be used uninitialized, 
though I don't believe that's true.  Placate it anyway.

--HG--
extra : convert_revision : dcd9427af14f0e7a33510054bee4ecbe73e050be
 2007-04-27 13:59:17 -07:00
Gabe Black
cca881a531 Merge zizzer.eecs.umich.edu:/n/wexford/x/gblack/m5/newmem-o3-spec 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-micro

--HG--
extra : convert_revision : 757e1d79033e6f8e0aaaf5ecaf14077d416cff8e
 2007-04-23 15:34:40 +00:00
Gabe Black
a006aa067a Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 12f10c174f0eca1ddf74b672414fbe78251f686b
 2007-04-23 11:34:39 -04:00
Gabe Black
cea5435760 Make the GSR into a renamed control register. It should be split into a renamed part and a control part for the different bitfields, but the renamed part is all that's actually used. 
--HG--
extra : convert_revision : ffeb4f874bd4430255064f6e8bcb135309932ff8
 2007-04-22 17:43:45 +00:00
Ali Saidi
53ba34391f fixes for solaris compile 
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
 2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
 2007-04-21 17:50:47 -04:00
Gabe Black
5a3dcc172a Make register indexes larger so they can actually hold all the legal values. Oops! 
--HG--
extra : convert_revision : 7689b2e1f7468e4acb8be0f242f74002c79e7960
 2007-04-14 17:08:24 +00:00
Gabe Black
3140dd88bc Make the fsr a serializing register. Other control registers probably need this as well. 
--HG--
extra : convert_revision : edd3f9a83cc2722b6e0eff0eff4a8e034b0f6ec6
 2007-04-14 17:07:24 +00:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
 2007-04-11 15:30:09 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu. 
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
 2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message. 
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
 2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
 2007-04-11 12:25:00 +00:00
Gabe Black
798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions. 
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
 2007-04-10 17:22:45 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit. 
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
 2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. 
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
 2007-04-10 17:13:26 +00:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
 2007-04-09 07:59:57 +00:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here. 
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
 2007-04-09 01:08:05 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
 2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
 2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa 
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
 2007-04-06 16:55:56 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. 
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
 2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function 
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
 2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code. 
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
 2007-04-06 15:15:36 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution. 
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
 2007-04-04 23:19:32 +00:00
Gabe Black
4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: 
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
 2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case 
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
 2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7 Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function. 
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
 2007-04-04 14:27:00 +00:00
Gabe Black
6010c6ded4 Added all the different variations of the register names. 
--HG--
extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
 2007-04-04 14:25:36 +00:00
Gabe Black
93d4c624c5 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 7be8ebe55a7b11552d78701520f93aa86db1e501
 2007-04-03 15:01:36 +00:00
Gabe Black
61c56ffeaf A batch of changes and fixes. Macroops are now generated automatically, multiops do alot more of what they're supposed to (excluding memory operands), and microops are slightly more implemented. 
--HG--
extra : convert_revision : 518059f47e11df50aa450d4a322ef2ac069c99c9
 2007-04-03 15:01:09 +00:00
Gabe Black
0ce6936e7d Zero out ModRM if the byte isn't there, and fix some displacement size stuff. 
--HG--
extra : convert_revision : f43abf33a223a665b30098c63011fb162200d5e6
 2007-04-03 14:56:24 +00:00
Ali Saidi
c46e946c94 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 2f7f50f4ad31f741c0c67db96e49d30ca078fc94
 2007-03-29 22:01:34 -04:00
Ali Saidi
8ca218cab5 get rid of CWP bounds warning... 
--HG--
extra : convert_revision : 74df09341c091c2d6ca9b46c6a3521f22b48acf4
 2007-03-29 15:57:11 -04:00
Gabe Black
7fcc9d2106 Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support. 
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
 2007-03-29 17:57:19 +00:00
Gabe Black
e67a207ad3 Add a microcode assembler. A microcode "program" is a series of statements. Each statement has an optional label at the beginning, a capitilized microcode class name which is roughly equivalent to a mnemonic in a regular ISA, and then an optional series of operands seperated by white space. The operands are either a decimal constant, a label, or a code fragment surrounded by non nested {}s. Labels are a letter or underscore followed by letters, underscores, or digits. The syntax for describing code segments might need to be changed if a need arrises to have {}s in the code itself. 
--HG--
extra : convert_revision : 8e5cfdd1a3c9a7e3731fdf6acd615ee82ac2b9b7
 2007-03-29 17:57:18 +00:00
Gabe Black
77ce05f478 Fidget with the syntax of the MultiOp format in anticipation of making it actually work. 
--HG--
extra : convert_revision : f62a1f035cc11677df8eb5a839ca1247d819fab3
 2007-03-29 00:50:54 -07:00
Gabe Black
fd77212b72 Add code to generate register and immediate based integer op microop classes. 
--HG--
extra : convert_revision : 718f941da74dd3b4557cd21e1772879ac21aa9c6
 2007-03-29 00:49:53 -07:00
Gabe Black
0d5f6167ff Allow "let" blocks to add code to the output files. 
--HG--
extra : convert_revision : 0ffddb2b40dccbf2a3790464c843cfc1b43eaa02
 2007-03-29 00:47:46 -07:00
Kevin Lim
4bad33ce9d Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02
 2007-03-24 14:00:16 -04:00
Gabe Black
e7bbd85ae6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 6b1c8025d29f3e8f90906805dd51a5d523d56004
 2007-03-23 21:47:03 -04:00
Kevin Lim
047f77102b Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

src/cpu/base_dyn_inst.hh:
    Hand merge.  Line is no longer needed because it's handled in the ISA.

--HG--
extra : convert_revision : 0be4067aa38759a5631c6940f0167d48fde2b680
 2007-03-23 13:20:19 -04:00
Kevin Lim
2330adfa28 Make hardware loads/stores serializing; they need to avoid certain out-of-order interactions in the 21264. 
--HG--
extra : convert_revision : d83940af7d0e8efe891d574ac42c6d70d179e2b1
 2007-03-23 13:14:05 -04:00
Gabe Black
e3d3ab4513 Add structure based bitfield syntax to the isa_parser. This is primarily useful for x86. 
--HG--
extra : convert_revision : dfe6df160d00adec1830d9b88520ba20834d1209
 2007-03-22 04:10:57 +00:00
Gabe Black
39182808bc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 79c337f18d635acc176f0ca8d6e71fbc429cb258
 2007-03-22 04:10:56 +00:00
Gabe Black
276f6d794d Add a junk operand. With no operands, the parser breaks. 
--HG--
extra : convert_revision : 7410fd3681ed3d9b1293d982ed5f3553a6c75f3f
 2007-03-21 21:09:24 +00:00
Gabe Black
bbffaa8ee0 Start implementing groups of instructions which do the same thing on different sets of inputs. 
--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320
 2007-03-21 21:07:43 +00:00
Gabe Black
1707aa750f put the int register count in intregs.hh 
--HG--
extra : convert_revision : c48c13d9c4606c8cb7c60d18cd0f4dac9103a501
 2007-03-21 21:04:54 +00:00
Gabe Black
0a80d06dea Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are. 
--HG--
extra : convert_revision : 8768676eac25e6a4f0dc50ce2dc576bdcdd6e025
 2007-03-21 19:19:53 +00:00
Gabe Black
3efec59fc5 Missed a const 
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
 2007-03-21 19:15:40 +00:00
Gabe Black
63e2d3dcbf Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 41214c71e7fa11d47395975a141793337d020463
 2007-03-21 01:18:55 -04:00
Gabe Black
475d36ee93 Ignore "time" and "times" syscalls. 
--HG--
extra : convert_revision : 3ff55e35877c0fd74823ce5e52ed16c38da92068
 2007-03-20 23:53:52 -04:00
Gabe Black
e7b015cee1 Added syntax for structure oriented extMachInsts. 
--HG--
extra : convert_revision : 4a30c58019ad8e3dd8dffb4c4c08eb6914e5c5be
 2007-03-20 06:08:52 +00:00
Gabe Black
7c0825ccf9 Compile fixes for SPARC_FS. 
src/arch/alpha/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Put in a missing include
src/cpu/exetrace.cc:
    Convert the legion lockstep stuff from makeExtMI to the predecoder object.

--HG--
extra : convert_revision : 91bad4466f8db1447fff8608fa46a5f236dc3a89
 2007-03-18 23:09:51 -04:00
Gabe Black
a1f92af0fb The syntax used for twin stores was confusing the parser so it's now broken down farther. 
--HG--
extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76
 2007-03-17 21:23:03 -04:00
Gabe Black
3ccaee976a Make the SPARC branch instructions use ExtMachInsts in their constructors. This isn't necessary since they don't use the extended fields, but it's more consistent and more correct. 
--HG--
extra : convert_revision : afd4f408122ad5e497012eb9744d6bce66a1de37
 2007-03-16 10:55:50 +00:00
Gabe Black
9ad3f1e479 Refactor things a little. 
--HG--
extra : convert_revision : 8167455ffc05130d4afcc68466879c7c439bee57
 2007-03-15 19:16:39 +00:00
Gabe Black
f4eee4fb81 File with the predecoder in it. 
src/arch/x86/predecoder.cc:
    File for the x86 predecoder process function.

--HG--
extra : convert_revision : f7b53c38ff152cb2677d641074218ffd8434457b
 2007-03-15 19:16:38 +00:00
Gabe Black
ae9bed4f8f Split the x86 "process" predecoder method into it's own file. 
--HG--
extra : convert_revision : 88185e592df2a7527d36efcce7376fb05f469cbc
 2007-03-15 19:16:37 +00:00
Gabe Black
6cdd434f7f Changed warns to DPRINTFs and multiply by 8 where needed. 
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
 2007-03-15 16:13:40 +00:00
Gabe Black
075df1469f Added immediate value support, and fixed alot of bugs. This won't support 3 byte opcodes. 
--HG--
extra : convert_revision : 4c79bff2592a668e1154916875f019ecafe67022
 2007-03-15 15:29:39 +00:00
Gabe Black
4379e54b52 Compile fix 
--HG--
extra : convert_revision : 4a66d04404beee9656e3e33089afcec10d7ee5ff
 2007-03-15 03:17:00 +00:00
Gabe Black
32368a2bd6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/arch/mips/utility.hh:
src/arch/x86/SConscript:
    Hand merge

--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
 2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86. 
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
 2007-03-15 02:47:42 +00:00
Gabe Black
ff90b8c1aa Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
 2007-03-13 15:03:34 -04:00
Gabe Black
ce18d900a1 Replaced makeExtMI with predecode. 
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.

--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
 2007-03-13 16:13:21 +00:00
Ali Saidi
a068d6db0f fix interrupting during a quisce on sparc 
src/arch/sparc/ua2005.cc:
    fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
    check if were suspended and interrupt at the guess time
src/base/traceflags.py:
    add trace flag for Iob
src/cpu/simple/base.cc:
    Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
    add some Dprintfs

--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
 2007-03-13 00:05:52 -04:00
Gabe Black
1f3c3aa234 Fix mulscc. 
--HG--
extra : convert_revision : 405f10f14f2f6666a7bef01bfb0cf90ff14cef24
 2007-03-12 17:07:10 -04:00
Ali Saidi
1356fb953d Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : c6fbe09348b606b94bbb35f911dea94353f076f9
 2007-03-12 13:56:30 -04:00
Ali Saidi
9ad24e2248 move hver code to ua2005.cc 
src/arch/sparc/miscregfile.cc:
    this code should be in readFSreg
src/arch/sparc/ua2005.cc:
    move code froh miscregfile to ua2005.cc

--HG--
extra : convert_revision : fa450b04ad73ab6f6e25d66fa0368054263f09f9
 2007-03-12 13:56:09 -04:00
Gabe Black
b3bdce81fd Add the rename syscall. 
--HG--
extra : convert_revision : 67e92b166599bd20b7ce90d073f2fd7502f810ec
 2007-03-12 01:54:15 -04:00
Gabe Black
57650a201e Fix the mnemonic and the branch displacement field size of the branch on floating point condition codes with prediction. 
--HG--
extra : convert_revision : 812950e92b7e0f34f370a1472c20f52e3ef214b1
 2007-03-12 01:47:49 -04:00
Gabe Black
6a7e4a5904 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 725999a0a5bde6e065bad87b42e973c5c627c69f
 2007-03-11 18:19:38 -04:00
Gabe Black
26c0426e44 Make sttw and sttwa use the twin memory operations. 
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
 2007-03-11 18:12:33 -04:00
Nathan Binkert
1aef5c06a3 Rework the way SCons recurses into subdirectories, making it 
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
 2007-03-10 23:00:54 -08:00
Gabe Black
52ec0fe3d9 Merge zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace-test

--HG--
extra : convert_revision : dc02bb6b4e5cc7f0260da80a71b9713f75566a29
 2007-03-10 20:52:55 -05:00
Gabe Black
7e363e14f7 Fix bounds check for the cwp 
--HG--
extra : convert_revision : 097e6b0c80d71417329b2a4cd118046aa5ed777a
 2007-03-10 19:29:31 -05:00
Gabe Black
91e8729c28 Added implementations of the fpop2 instructions. 
--HG--
extra : convert_revision : 1fc88b499334bb4ba44375347d0062843587b6cf
 2007-03-10 19:26:54 -05:00
Gabe Black
df1ea2cf05 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
 2007-03-09 18:32:13 -05:00
Gabe Black
03ff1c3167 Split the syscall table, SPARC specific syscall implementations, and the 32 bit syscall table into it's own file. Corrected problems with the stat structure. These should be tested on 64 bit x86 and SPARC machines. 
--HG--
extra : convert_revision : 5d9fe19e031b92e111069c6b89c3dbeb29975b8a
 2007-03-09 17:14:24 -05:00
Ali Saidi
58f69391ca implement ipi stufff for SPARC 
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
    add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
    handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
    some constants for the strand status register
src/arch/sparc/ua2005.cc:
    properly implement the strand status register
src/dev/sparc/iob.cc:
    implement ipi generation properly
src/sim/system.cc:
    call into the ISA to start the CPU (or not)

--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
 2007-03-09 16:56:39 -05:00
Ali Saidi
1158da37fb Panic if any CMT registers are accessed 
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
    add CMT ASI registers
src/arch/sparc/tlb.cc:
    Panic if any of the CMT registers are being accessed

--HG--
extra : convert_revision : b9a94281e2074a576ac21d042b756950d509e758
 2007-03-08 21:49:13 -05:00
Gabe Black
c40d95e4c4 Fixed an off-by-one error. 
--HG--
extra : convert_revision : 498fef18cf339cabc2c00e4758bc8a0da857daca
 2007-03-08 00:55:16 -05:00
Gabe Black
46051c5f65 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : becba8537b11ee4ef33bbf129bef2ca047403df5
 2007-03-08 00:42:30 -05:00
Gabe Black
5caf721074 Fix up the SPARC initial stack frame to match an actual 32 bit process. 
--HG--
extra : convert_revision : 3995744c3bf955a370b18f6e88de1bfb82f79843
 2007-03-08 00:29:37 -05:00
Ali Saidi
87fb0eb8de I missed a couple of WithEffects, this should do it 
--HG--
extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915
 2007-03-07 21:51:44 -05:00
Gabe Black
54fc750924 Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures. 
--HG--
extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
 2007-03-07 20:04:46 +00:00
Ali Saidi
49527ab553 Merge zizzer:/bk/newmem 
into  zeep.pool:/tmp/newmem

--HG--
extra : convert_revision : f078a05729b5fe464a06a58bc4adcb374f560572
 2007-03-07 15:04:44 -05:00
Ali Saidi
689cab36c9 *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 
--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b
 2007-03-07 15:04:31 -05:00
Gabe Black
05c86ec0d7 Get X86 to load an elf and start a process for it. 
src/arch/x86/SConscript:
    Add in process source files.
src/arch/x86/isa_traits.hh:
    Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
    Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
    An X86 process class.
src/base/loader/elf_object.cc:
    Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
    Add an x86 traceflag
src/sim/process.cc:
    Add in code to create an x86 process.
src/arch/x86/intregs.hh:
    A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
    A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
    An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
    The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
    The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
    An x86 hello world test binary.

--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
 2007-03-06 15:42:30 +00:00
Gabe Black
992fda55f9 Fill out a stub version of the vtophys header file. 
--HG--
extra : convert_revision : 2c10a80a2f73207539e3f98b4a3b864d431f5035
 2007-03-05 17:59:04 +00:00
Gabe Black
296891b1c5 Add in NumGDBRegs so the constructor to the base class can get all it's arguments. 
--HG--
extra : convert_revision : fcec1ad134b53a419a952e556ed75cb1559a1127
 2007-03-05 17:58:15 +00:00
Gabe Black
a473d50e4c Reorganize the floating point register file a little. 
--HG--
extra : convert_revision : 643c147b77e931d49ac559681d4bbda737f6e1c7
 2007-03-05 17:57:26 +00:00
Gabe Black
a46e100bd9 Add some new source files. 
--HG--
extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7
 2007-03-05 17:56:26 +00:00
Gabe Black
a41b86ba01 Stub decoder. This is probably even farther from finished than it looks... 
--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
 2007-03-05 16:16:28 +00:00
Gabe Black
a0294c10cd Added missing include. 
--HG--
extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
 2007-03-05 16:11:07 +00:00
Gabe Black
ecfc622451 Added LargestRead type for x86. I might have picked the wrong type. 
--HG--
extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
 2007-03-05 16:10:11 +00:00
Gabe Black
78e5406f19 Stub implementation for x86. 
--HG--
extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
 2007-03-05 16:09:09 +00:00
Gabe Black
05ba90b726 Stub implementation for x86 
--HG--
extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
 2007-03-05 16:08:18 +00:00
Gabe Black
58d30df676 Added fault generation functions. I would still like to see these go away. The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures. 
--HG--
extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
 2007-03-05 16:07:01 +00:00
Gabe Black
7730af9503 Added stub implementations or prototypes for all the functions in this file. 
--HG--
extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
 2007-03-05 14:55:09 +00:00
Gabe Black
b2d356a6b2 Added in a missing include. 
--HG--
extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
 2007-03-05 14:53:51 +00:00
Gabe Black
7ed7d6e80d Filled in a stub header file for setting the result of a syscall. 
--HG--
extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
 2007-03-05 14:53:15 +00:00
Gabe Black
43b8f51bb8 Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha. 
--HG--
extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
 2007-03-05 14:52:28 +00:00
Gabe Black
2e6cf12963 Filled in a stub header file for remote gdb 
--HG--
extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
 2007-03-05 14:51:21 +00:00
Gabe Black
aa5f42b10d Correct a typo 
--HG--
extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
 2007-03-05 14:50:33 +00:00
Gabe Black
0e9db1a2e5 Make the constructor (and all the other functions) public 
--HG--
extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
 2007-03-05 14:49:52 +00:00
Gabe Black
b832e6740f Various touch ups 
--HG--
extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
 2007-03-05 14:49:07 +00:00
Gabe Black
ecc1066f43 Added a missing include. 
--HG--
extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
 2007-03-05 14:48:18 +00:00
Gabe Black
ec8b49cc5f Added a missing include. 
--HG--
extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
 2007-03-05 14:47:42 +00:00
Gabe Black
8a33c8dce4 Fix up the remote gdb include gaurds so it doesn't use the same symbol as Alpha does. 
--HG--
extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
 2007-03-05 14:46:49 +00:00
Gabe Black
30e700600c x86 register file includes. 
--HG--
extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
 2007-03-05 12:23:14 +00:00
Gabe Black
b9b29525a6 Include the x86 specific traits file. 
--HG--
extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
 2007-03-05 12:21:20 +00:00
Gabe Black
9e93feea10 Stub x86 Fault class which just panics. 
--HG--
extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
 2007-03-05 12:20:34 +00:00
Gabe Black
385eb586ce A new file for x86 specific parameters. This could be implemented as a sim object? 
--HG--
extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
 2007-03-05 12:19:54 +00:00
Gabe Black
be29612fbe Add in a declaration of class Checkpoint rather than expecting it to come from some other include. 
--HG--
extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
 2007-03-05 12:19:11 +00:00
Gabe Black
6a19b64de2 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
 2007-03-05 11:00:44 +00:00
Nathan Binkert
ba042842c6 Don't use the exact same name as a system header #define 
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
 2007-03-04 19:26:49 -08:00
Ali Saidi
82874eefca Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
 2007-03-03 19:03:22 -05:00
Ali Saidi
36f43ff6a5 Implement Niagara I/O interface and rework interrupts 
configs/common/FSConfig.py:
    Use binaries we've compiled instead of the ones that come with Legion
src/arch/alpha/interrupts.hh:
    get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number
src/arch/sparc/asi.cc:
    Add AsiIsInterrupt() to AsiIsMmu()
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
    Add InterruptVector type
src/arch/sparc/interrupts.hh:
    rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared
src/arch/sparc/isa_traits.hh:
    Add the "interrupt" trap types to isa traits
src/arch/sparc/miscregfile.cc:
    add names for all the misc registers and possible post an interrupt when TL is changed.
src/arch/sparc/miscregfile.hh:
    Add a helper function to post an interrupt when pil < some set softint
src/arch/sparc/regfile.cc:
src/arch/sparc/regfile.hh:
    InterruptLevel shouldn't really live here, moved to interrupt.hh
src/arch/sparc/tlb.cc:
    Add interrupt ASIs to TLB
src/arch/sparc/ua2005.cc:
    Add checkSoftInt to check if a softint needs to be posted
    Check that a tickCompare isn't scheduled before scheduling one
    Post and clear interrupts on queue writes and what not
src/base/bitfield.hh:
    Add an helper function to return the msb that is set
src/cpu/base.cc:
src/cpu/base.hh:
    get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending
src/cpu/intr_control.cc:
src/cpu/intr_control.hh:
src/dev/alpha/tsunami_cchip.cc:
src/python/m5/objects/IntrControl.py:
    Make IntrControl have a system pointer rather than using a cpu pointer to get one
src/dev/sparc/SConscript:
    add iob to SConsscrip
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out:
    update config.ini/out for intrcntrl not having a cpu pointer anymore

--HG--
extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
 2007-03-03 17:22:47 -05:00
Gabe Black
5498d52985 Filled in with basic x86 stuff. Some things are missing, wrong, or nonsensical for x86. 
--HG--
extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39
 2007-03-03 17:19:52 +00:00
Gabe Black
0150515ac3 Filled in with basic x86 information. Some things are missing, wrong, or non-sensical in x86. 
--HG--
extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
 2007-03-03 17:18:29 +00:00
Gabe Black
10871b7342 Add build hooks for x86. 
--HG--
extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
 2007-03-03 16:01:48 +00:00
Gabe Black
23dc5099a4 Implement the _llseek syscall. It's Linux only, so we'll actually use the lseek syscall. 
--HG--
extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
 2007-03-03 03:34:55 +00:00
Gabe Black
477afcaf5b Fix some issues with 32 bit processes. 
--HG--
extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
 2007-03-03 03:34:54 +00:00
Ali Saidi
4e8d2d1593 make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way as the twin 64 bit loads 
src/arch/isa_parser.py:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/operands.isa:
src/base/bigint.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
src/mem/packet_access.hh:
    make ldtw(a) Twin 32 bit load work correctly

--HG--
extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42
 2007-03-02 22:34:51 -05:00
Gabe Black
d8ada247f4 Forgot to commit this new file last earlier. 
--HG--
extra : convert_revision : f2d80ae551b7e29426141d5c9fe355b43a0b9c7d
 2007-03-02 14:43:27 +00:00
Gabe Black
ececf101c7 Make the m5 psuedo instructions use the BasicOperate format 
--HG--
extra : convert_revision : f02da702ab9b99da124fac7e10a07386b04f3a0f
 2007-02-28 16:49:17 +00:00