Ali Saidi
a17dbdf883
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 17:19:50 +00:00
Nilay Vaish
d272bdb1bf
MOESI Hammer: Update regression test output
2012-01-10 17:28:49 -06:00
Nilay Vaish
a5a2b9ecbd
X86 Regressions: Update stats due to fence instruction
2012-01-10 09:59:01 -06:00
Ali Saidi
d1dd7a24db
imported patch ext/stats_updates.patch
...
--HG--
extra : rebase_source : 4697ba9eb1ca8c67fe0915fb8340d7d4ae94caba
2011-12-01 00:15:23 -08:00
Ali Saidi
ae62d97158
MIPS: Fix regressions tests
2011-09-17 12:34:03 -04:00
Ali Saidi
28a2236ec1
O3: Update stats for new ordering fix.
2011-09-13 12:58:09 -04:00
Gabe Black
c5fd6f4fec
MIPS: Update MIPS stats for cleaned up operand checks.
2011-09-09 01:35:05 -07:00
Ali Saidi
f125ef22b9
O3: Update stats for LSQ changes.
2011-08-19 15:08:06 -05:00
Ali Saidi
3ebfe2eb01
O3: Update stats for fetch and bp changes.
2011-07-10 12:56:09 -05:00
Gabe Black
d42e471baa
Stats: Update stats for the x86 store fault fix.
2011-07-02 22:31:42 -07:00
Korey Sewell
d1e8be9a73
inorder: sparc: add hello world regression
...
- add InOrderCPU compile option to SPARC
- add hello regression for SPARC
2011-06-20 22:44:22 -04:00
Korey Sewell
08c1a6f41b
merge regression updates
2011-06-20 18:58:31 -04:00
Korey Sewell
b5736ba4ef
alpha:o3:simple: update simout/err files
...
A few prior changesets have changed the gem5 output in a way that wont cause
errors but may be confusing for someone trying to debug the regressions. Ones that I caught
were:
- no more "warn: <hash address"
- typo in the ALPHA Prefetch unimplemented warning
Additionaly, the last updated stats changes rearrange the ordering of the stats output even though
they are still correct stats (gem5 is smart enough to detect this). All the regressions pass
w/the same stats even though it looks like they are being changed.
2011-06-20 18:57:14 -04:00
Korey Sewell
9124f46587
inorder: alpha-hello regression update
2011-06-20 12:21:10 -04:00
Korey Sewell
55dce6419d
inorder: update SE regressions
2011-06-19 21:43:42 -04:00
Korey Sewell
9331b5d26a
sparc: update simple cpu regressions
...
use stats file generated by zizzer
2011-06-10 03:45:24 -04:00
Ali Saidi
5d5b0f49cc
Stats: Update stats for minor O3 changes below.
2011-05-23 10:59:13 -05:00
Ali Saidi
44e599a1a4
ARM: Fix up stats for previous changes to condition codes
2011-05-13 17:29:27 -05:00
Brad Beckmann
001c16bc6d
regress: updates after changing ruby network bandwidth
2011-04-28 17:18:16 -07:00
Nathan Binkert
a7e27f9a82
tests: updates for stat name change
2011-04-22 10:18:51 -07:00
Nathan Binkert
8c1563096c
tests: update stats for name changes
2011-04-19 18:45:23 -07:00
Ali Saidi
d50d0152d0
ARM: Fix stats for ARM_SE checkpoint restore fix.
...
Register reads/writes done in startup() count against the stats while they
don't count if done in initState().
2011-04-12 16:09:20 -04:00
Ali Saidi
b20e92e1ca
ARM: Update stats for previous changes.
2011-04-04 11:42:31 -05:00
Ali Saidi
1114be4b78
O3: Update stats for memory order violation checking patch.
2011-04-04 11:42:25 -05:00
Steve Reinhardt
bb67c706d6
tests: update reference outputs for ruby cache index change
...
MOESI_CMP_token is the only protocol that showed noticeable stats
differences.
2011-03-26 22:24:36 -07:00
Ali Saidi
63eb337b3b
ARM: Update stats for the previous changes and add ARM_FS/O3 regression.
2011-03-17 19:20:22 -05:00
Ali Saidi
845f791f37
Stats: Update the statistics for rfe patch.
2011-03-17 19:20:20 -05:00
Gabe Black
e8b982e247
X86: Update stats for the x86 o3 hello world regression.
2011-03-01 23:18:00 -08:00
Ali Saidi
73603c2b17
ARM: Update regression tests for preceeding changes.
2011-02-23 15:10:50 -06:00
Korey Sewell
66bb732c04
m5: merge inorder/release-notes/make_release changes
2011-02-18 14:35:15 -05:00
Korey Sewell
ab9c20cc78
inorder: regr-update: reduce dynamic mem. use to speedup sims
...
previous changesets took a closer look at memory mgmt in the inorder model and sought to avoid
dynamic memory mgmt (for access to pipeline resources) as much as possible. For the regressions
that were run, the sims are about 2x speedup from changeset 7726 which is the last change
since the recent commits in Feb. (note: these regressions now are 4-issue CPUs instead of just 1-issue)
2011-02-18 14:31:37 -05:00
Gabe Black
5ec5794456
X86: Update stats for the improved branch detection/prediction.
2011-02-13 17:46:04 -08:00
Gabe Black
44306e8114
X86: Update stats now that the dest reg isn't read unnecessarily to set flags.
2011-02-13 17:45:30 -08:00
Gabe Black
b046f3feb6
X86: Update stats for the reduced register reads.
2011-02-13 17:44:32 -08:00
Korey Sewell
2971b8401a
inorder:regress: host-inst-rate improved ~58%
...
there are still only a few inorder benchmark but for the lengthier benchmarks (twolf and vortext)
the latest changes to how instruction scheduling (how instructions figure out what they want to
do on each pipeline stage in the inorder model) were able to improve performance by a nice
amount... The latest results for the inorder model process about 100k insts/second
(note: 58% is over the last time run on 64-bit pool machines at UM)
2011-02-12 10:14:52 -05:00
Brad Beckmann
4eab18fd06
regess: protocol regression tester updates
2011-02-08 18:07:54 -08:00
Gabe Black
0851580aad
Stats: Re update stats.
2011-02-07 19:23:13 -08:00
Gabe Black
1b64bfa933
Stats: Back out broken update.
2011-02-07 19:23:11 -08:00
Brad Beckmann
45f881919f
regress: Regression Tester output updates
2011-02-06 22:14:23 -08:00
Gabe Black
55df9e348c
X86: Add o3 regressions in SE mode.
...
Exclude bzip2 for now. It works, it just takes too long to run.
2011-02-05 00:16:09 -08:00
Gabe Black
0aafbe4098
X86: Update ruby stats for stupd change.
2011-02-04 03:47:23 -08:00
Korey Sewell
a48fe2729a
imported patch regression_updates
2011-02-04 00:09:22 -05:00
Gabe Black
54f88d84c2
Stats: Update the x86 stats to reflect changing stupd to a store and update.
2011-02-02 19:56:49 -08:00
Ali Saidi
f7885b8f26
ARM/O3: Add regressions for ARM w/ O3 CPU.
2011-01-18 16:30:06 -06:00
Ali Saidi
9b67f3723e
Stats: Update stats for previous set of patches.
2011-01-18 16:30:06 -06:00
Nilay Vaish
bec0103bb4
Regression Tests: Update the output for MESI_CMP_directory
...
This patch updates the output for regression tests that are carried out on
MESI_CMP_directory protocol. The changes made to the protocol in order to
remove the bugs present result in regression failure for the 60.rubytest.
Since the earlier protocol was incorrect, so we certainly cannot relay on the
earlier reference output. Hence, the update.
2011-01-13 22:48:03 -06:00
Ali Saidi
371110fb0a
Regressions: Update regressions for SIMD opclass changes
2010-11-15 14:04:05 -06:00
Ali Saidi
06c5283930
ARM: Update SE stats for TLB stats additions
2010-11-08 13:59:35 -06:00
Ali Saidi
b4b6a2338a
ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.
2010-11-08 13:58:24 -06:00
Gabe Black
b53231e7fe
Ref output: Update refs for PCState change.
2010-10-31 00:07:48 -07:00
