Nilay Vaish
c5058c0c00
stats: slight changes to MOESI_CMP_token.
...
Due slight change to latency for the reissue table.
2015-09-16 11:59:57 -05:00
Jason Lowe-Power
fdf2a6f439
stats: files for regression tests for Learning gem5 scripts
...
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2015-09-16 09:35:36 -05:00
Jason Lowe-Power
29dd04cfe9
tests: Add tests for the Learning gem5 scripts
...
These tests will ensure that Learning gem5 scripts are always up to date with
the changes in the mainline of gem5.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2015-09-16 09:35:36 -05:00
Nilay Vaish
0d6a6dfd7b
stats: updates due to recent changesets including d0934b57735a
2015-09-15 08:14:09 -05:00
Nilay Vaish
66941163e5
stats: updates due to recent changes.
2015-08-30 12:24:19 -05:00
Nilay Vaish
d383a08f16
stats: updates to ruby fs regression test
...
Changes due to recent patches: fc1e41e88fd3, 882ce080c9f7, e8a6637afa4c, and
e6e3b7097810 by Joel Hestness.
2015-08-14 19:26:43 -05:00
Joel Hestness
93c173a95e
stats: Bump for MessageBuffer, cache latency changes
2015-08-14 01:19:34 -05:00
Andreas Sandberg
023f6eb0f2
stats: Update ARM stats to include programmable oscillators
2015-08-07 15:39:17 +01:00
Andreas Hansson
646994e599
stats: Reflect current behaviour
...
Not sure what went wrong in the pushing of the Ruby patches, but
somehow these regressions are not updated.
2015-08-05 04:36:29 -04:00
Andreas Sandberg
1a7802598b
stats: Update stats for tgen to reflect CommMonitor changes
...
The name of the stack distance stats changed slightly when the stack
distance calculator was redesigned as a probe. Update the reference
stats to reflect this.
2015-08-04 10:29:13 +01:00
Andreas Sandberg
a3f49f60c7
mem: Move trace functionality from the CommMonitor to a probe
...
This changeset moves the access trace functionality from the
CommMonitor into a separate probe. The probe can be hooked up to any
component that exports probe points of the type ProbePoints::Packet.
This patch moves the dependency on Google's Protocol Buffers library
from the CommMonitor to the MemTraceProbe, which means that the
CommMonitor (including stack distance profiling) no long depends on
it.
2015-08-04 10:29:13 +01:00
Andreas Sandberg
022e69e6de
mem: Redesign the stack distance calculator as a probe
...
This changeset removes the stack distance calculator hooks from the
CommMonitor class and implements a stack distance calculator as a
memory system probe instead. The probe can be hooked up to any
component that exports probe points of the type ProbePoints::Packet.
2015-08-04 10:29:13 +01:00
Andreas Sandberg
447a6b6442
stats: Update switcheroo reference stats
...
The Minor draining fixes affect perturb the timing slightly since it
affects how the simulator is drained. Update reference statistics to
reflect this expected change.
2015-07-31 17:04:59 +01:00
Andreas Sandberg
c50e429001
stats: Bump stats after Minor switcheroo inclusion
2015-07-30 10:16:36 +01:00
Andreas Sandberg
decd6b958e
tests: Add Minor to the ARM full switcheroo tests
...
Add the Minor CPU to the RealView and RealView64 full switcheroo
tests.
2015-07-30 10:16:28 +01:00
Andreas Hansson
d8f732273e
stats: Update stats for clean eviction addition
2015-07-30 03:42:27 -04:00
Andreas Hansson
222d920d6b
stats: Bump stats to match current behaviour
...
Somehow this one seems to have slipped through. Perhaps
non-determinism somewhere?
2015-07-30 03:41:36 -04:00
Nilay Vaish
c47001de8c
stats: x86: updates due to patch on vex
2015-07-18 15:07:35 -05:00
Andreas Sandberg
a0cbf55411
stats: Update pc-switcheroo stats
...
The pc-switcheroo test cases has slightly different timing after
decoupling draining from the SimObject hierarchy. This is expected
since objects aren't drained in the exact same order as before.
2015-07-07 09:51:05 +01:00
Andreas Sandberg
f16c0a4a90
sim: Decouple draining from the SimObject hierarchy
...
Draining is currently done by traversing the SimObject graph and
calling drain()/drainResume() on the SimObjects. This is not ideal
when non-SimObjects (e.g., ports) need draining since this means that
SimObjects owning those objects need to be aware of this.
This changeset moves the responsibility for finding objects that need
draining from SimObjects and the Python-side of the simulator to the
DrainManager. The DrainManager now maintains a set of all objects that
need draining. To reduce the overhead in classes owning non-SimObjects
that need draining, objects inheriting from Drainable now
automatically register with the DrainManager. If such an object is
destroyed, it is automatically unregistered. This means that drain()
and drainResume() should never be called directly on a Drainable
object.
While implementing the new functionality, the DrainManager has now
been made thread safe. In practice, this means that it takes a lock
whenever it manipulates the set of Drainable objects since SimObjects
in different threads may create Drainable objects
dynamically. Similarly, the drain counter is now an atomic_uint, which
ensures that it is manipulated correctly when objects signal that they
are done draining.
A nice side effect of these changes is that it makes the drain state
changes stricter, which the simulation scripts can exploit to avoid
redundant drains.
2015-07-07 09:51:05 +01:00
Andreas Sandberg
d7a56ee524
tests: Skip SPARC tests if the required binaries are missing
...
The full-system SPARC tests depend on several binaries that aren't
generally available to the wider community. Flag the tests as skipped
instead of failed if these binaries can't be found.
2015-07-07 09:51:03 +01:00
Nilay Vaish
381e9191dd
stats: x86: update stats missed out on in preivous changeset
2015-07-05 20:26:18 -05:00
Nilay Vaish
9954eb74df
stats: update stale config.ini files, eio and few other stats.
2015-07-04 10:43:47 -05:00
Andreas Hansson
25e1b1c1f5
stats: Update stats for cache, crossbar and DRAM changes
...
This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.
Needless to say, almost every regression is affected.
2015-07-03 10:15:03 -04:00
Andreas Hansson
893533a126
mem: Allow read-only caches and check compliance
...
This patch adds a parameter to the BaseCache to enable a read-only
cache, for example for the instruction cache, or table-walker cache
(not for x86). A number of checks are put in place in the code to
ensure a read-only cache does not end up with dirty data.
A follow-on patch adds suitable read requests to allow a read-only
cache to explicitly ask for clean data.
2015-07-03 10:14:39 -04:00
Andreas Hansson
a22c29b263
arm, stats: Update stats to reflect reduction in misc reg reads
2015-05-26 03:21:44 -04:00
Andreas Hansson
4bc7dfb697
stats: Update MinorCPU regressions after accounting fix
2015-05-26 03:21:39 -04:00
Andreas Sandberg
dbdb9ab518
arm, stats: Update stats to reflect changes to generic timer
...
The addition of a virtual timer affects stats in minor and o3.
2015-05-23 13:50:57 +01:00
Andreas Hansson
40e180ecbe
stats, arm: Update stats for missing FPEXC.EN check
...
Only one regression is affected.
2015-05-05 03:22:48 -04:00
Andreas Hansson
80cd107e51
stats: Update stats to reflect cache changes
2015-05-05 03:22:39 -04:00
Andreas Hansson
eb1a9977bf
stats: Bring regression stats in line with actual behaviour
2015-05-05 03:22:17 -04:00
Nilay Vaish
f71fa17157
stats: arm: updates
2015-04-30 14:17:43 -05:00
Nilay Vaish
42fe2df354
stats: x86: updates due to change in div latency
2015-04-29 22:35:23 -05:00
Steve Reinhardt
0cf36d9409
stats: update for previous changeset
...
Very small differences in IQ-specific O3 stats.
2015-04-22 20:22:29 -07:00
Steve Reinhardt
93c4527128
stats: update a few stats from long O3 runs
...
Very small changes to iew.predictedNotTakenIncorrect
and iew.branchMispredicts. Looks like similar updates
were committed on April 3 (changeset 235ff1c046df), but
only for the quick tests.
2015-04-20 15:09:43 -07:00
Nilay Vaish
172385ae9f
stats: x86: changes due to recent patches
...
The change in 20.parser is from new x87 instructions. The change to
pc-o3-timing is not clear to me. It seems that this test might be invoking
some undefined behavior.
2015-04-14 11:01:11 -05:00
Nilay Vaish
b5770ff5e0
stats: updates due to recent changesets.
2015-04-03 11:42:11 -05:00
Andreas Hansson
d5e03beac2
tests: Update stats for cache block alignment
2015-03-27 04:55:57 -04:00
Andreas Hansson
ed08dc31ba
tests: Final reclassification of quick regressions
...
A few regressions were still considered long, but finished well within
the 180 seconds. They are only a handful (mostly mcf in atomic).
--HG--
rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini
rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr
rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simout
rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/stats.txt
rename : tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/system.terminal
rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm
rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/mcf.out => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/mcf.out
rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simerr
rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout
rename : tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm
rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/config.ini
rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/mcf.out => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/mcf.out
rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simerr
rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout
rename : tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini
rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/mcf.out => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/mcf.out
rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simout => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/config.ini
rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/mcf.out => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/mcf.out
rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simerr => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simout => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/simout
rename : tests/long/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/se/10.mcf/test.py => tests/quick/se/10.mcf/test.py
rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/30.eon/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/se/30.eon/test.py => tests/quick/se/30.eon/test.py
2015-03-23 06:57:31 -04:00
Steve Reinhardt
1483496803
stats: update Minor stats due to PF bug fix
...
A recent changeset of mine (http://repo.gem5.org/gem5/rev/4cfe55719da5 )
inadvertently fixed a bug in the Minor CPU model which caused it to treat
software prefetches as regular loads. Prior to this changeset, Minor
did an ad-hoc generation of memory commands that left out the PF check;
because it now uses the common code that the other CPU models use,
it generates prefetches properly. These stat changes reflect the fact
that the Minor model now issues SoftPFReqs.
2015-03-19 08:41:32 -04:00
Andreas Hansson
f1c3fda965
tests: Recategorise regressions based on run time
...
This patch takes a first stab at recategorising the regression tests
based on actual run times. The simple-atomic and simple-timing runs of
vortex and twolf all finish in less than 180 s, and they are
consequently moved from long to quick. All realview64 linux-boot
regressions take more than 700 s, and they are therefore moved to
long.
Later patches will rename quick to short, and further divide the
regressions into short, medium and long.
--HG--
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simerr
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simout
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/system.terminal
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simerr
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/system.terminal
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simerr
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/system.terminal
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simerr
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/system.terminal
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simerr
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simout
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt
rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/system.terminal
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/simout
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.msg => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/smred.msg
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.out => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/smred.out
rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simerr => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/simerr
rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simout => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/simout
rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/smred.out => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/smred.out
rename : tests/long/se/50.vortex/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini => tests/quick/se/50.vortex/ref/arm/linux/simple-timing/config.ini
rename : tests/long/se/50.vortex/ref/arm/linux/simple-timing/simerr => tests/quick/se/50.vortex/ref/arm/linux/simple-timing/simerr
rename : tests/long/se/50.vortex/ref/arm/linux/simple-timing/simout => tests/quick/se/50.vortex/ref/arm/linux/simple-timing/simout
rename : tests/long/se/50.vortex/ref/arm/linux/simple-timing/smred.out => tests/quick/se/50.vortex/ref/arm/linux/simple-timing/smred.out
rename : tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/50.vortex/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/simout => tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/simout
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/smred.msg => tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/smred.msg
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/smred.out => tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/smred.out
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/50.vortex/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/50.vortex/ref/sparc/linux/simple-timing/config.ini
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-timing/simerr => tests/quick/se/50.vortex/ref/sparc/linux/simple-timing/simerr
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-timing/simout => tests/quick/se/50.vortex/ref/sparc/linux/simple-timing/simout
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-timing/smred.msg => tests/quick/se/50.vortex/ref/sparc/linux/simple-timing/smred.msg
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-timing/smred.out => tests/quick/se/50.vortex/ref/sparc/linux/simple-timing/smred.out
rename : tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/se/50.vortex/test.py => tests/quick/se/50.vortex/test.py
rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out
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rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav
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rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini
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rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simout => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/simout
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rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simerr
rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout
rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/smred.out
rename : tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini
rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simerr
rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout
rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/smred.out
rename : tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out
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rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simerr
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.out
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin
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rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf
rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini
rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simout
rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.out
rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin
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rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2
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rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf
rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simerr
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simout
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.out
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pin
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sav => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sav
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.twf => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.twf
rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/se/70.twolf/test.py => tests/quick/se/70.twolf/test.py
2015-03-19 04:06:21 -04:00
Andreas Sandberg
877435950c
test, arm: Add scripts to test checkpoints
...
Add a set of scripts to automatically test checkpointing in the
regression framework. The checkpointing tests are similar to the
switcheroo tests, but instead of switching between CPUs, they
checkpoint the system and restore from the checkpoint again. This is
done at regular intervals, typically while booting Linux.
The implementation is fairly straight forward, with the exception that
we have to work around gem5's inability to restore from a checkpoint
after a system has been instantiated. We work around this by forking
off child processes that does the actual simulation and never
instantiate a system in the parent process unless a maximum checkpoint
count is reached (in which case we just simulate the system to
completion in the parent).
Checkpoint testing is currently only enabled 32- and 64-bit ARM
systems using atomic CPUs.
Note: An unfortunate side-effect of forking is that every new process
will overwrite the stats and terminal output from the previous
process. This means that the output directory only contains data from
the last checkpoint.
2015-03-19 04:06:20 -04:00
Andreas Hansson
2626effdf2
tests: Bump timeout to 5 hours
...
Align with observed run-times just above 4 hours for some hosts.
2015-03-19 04:06:07 -04:00
Nilay Vaish
7902e5778f
tests: remove not maintained 20.eio-short detailed test
2015-03-09 09:39:09 -05:00
Nilay Vaish
99fb8f8140
stats: changes to due to recent set of patches
2015-03-09 09:39:09 -05:00
Steve Reinhardt
4b048901cf
stats: update eio stats
...
Minor differences apparently from recent changes
2015-03-07 13:55:56 -05:00
Andreas Hansson
8909843a76
stats: Update stats to reflect cache and interconnect changes
...
This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.
2015-03-02 05:04:20 -05:00
Andreas Hansson
36dc93a5fa
mem: Move crossbar default latencies to subclasses
...
This patch introduces a few subclasses to the CoherentXBar and
NoncoherentXBar to distinguish the different uses in the system. We
use the crossbar in a wide range of places: interfacing cores to the
L2, as a system interconnect, connecting I/O and peripherals,
etc. Needless to say, these crossbars have very different performance,
and the clock frequency alone is not enough to distinguish these
scenarios.
Instead of trying to capture every possible case, this patch
introduces dedicated subclasses for the three primary use-cases:
L2XBar, SystemXBar and IOXbar. More can be added if needed, and the
defaults can be overridden.
2015-03-02 04:00:47 -05:00
Andreas Hansson
eed0795f3a
tests: Run regression timeout as foreground
...
Allow the user to send signals such as Ctrl C to the gem5 runs. Note
that this assumes coreutils >= 8.13, which aligns with Ubuntu 12.04
and RHE6.
2015-03-02 04:00:29 -05:00
Andreas Hansson
acf5a4a3da
stats: Bump the MemTest regression stats
...
Reflect changes in the tester behaviour.
2015-02-11 10:23:31 -05:00
Andreas Hansson
6563ec8634
cpu: Tidy up the MemTest and make false sharing more obvious
...
The MemTest class really only tests false sharing, and as such there
was a lot of old cruft that could be removed. This patch cleans up the
tester, and also makes it more clear what the assumptions are. As part
of this simplification the reference functional memory is also
removed.
The regression configs using MemTest are updated to reflect the
changes, and the stats will be bumped in a separate patch. The example
config will be updated in a separate patch due to more extensive
re-work.
In a follow-on patch a new tester will be introduced that uses the
MemChecker to implement true sharing.
2015-02-11 10:23:28 -05:00
Andreas Hansson
fc8cb1fa76
stats: Update stats to reflect x86 table walker changes
2015-01-22 05:00:57 -05:00
Andreas Hansson
de162ad968
tests: Remove deprecated InOrderCPU tests
...
This patch removes the three MIPS and SPARC regressions that use the
deprecated InOrderCPU.
This is the first step in completely removing the code from the tree,
avoiding confusion, and focusing all development efforts on the
MinorCPU. Brave new world.
2015-01-20 08:12:02 -05:00
Nilay Vaish
e76442e203
stats: changes due to recent changesets.
2015-01-10 18:06:43 -06:00
Gabe Black
d0284544ec
stats: x86: Update stats for the CPUID change.
2015-01-07 00:31:09 -08:00
Nilay Vaish
e979e8d75e
stats: changes due to recent changesets.
2015-01-04 13:02:12 -06:00
Andreas Hansson
df8df4fd0a
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes
...
Changes due to speculative execution of an unaligned PC, introduction
of TLB stats, changes and re-work of the prefetcher, and the
introduction of rank-wise refresh in the DRAM controller.
2014-12-23 09:31:20 -05:00
Andreas Hansson
e76e8e28a3
tests: Add a regression for the stack distance calculator
...
Re-use the existing traffic generator regression, and enable the stack
distance calculation in the comm monitor, along with the verification
stack.
The traffic generator config is also tuned to not increase the
run-time too much (and actually have some address re-use).
2014-12-23 09:31:18 -05:00
Andreas Hansson
6489598fb4
stats: Bump stats for fixes, mostly TLB and WriteInvalidate
2014-12-02 06:08:25 -05:00
Andreas Hansson
726f626e87
stats: Bump stats for o3 LSQ changes
2014-12-02 06:08:05 -05:00
Andreas Hansson
b0aa5a326d
stats: Bump stats after static analysis fixes
...
Fixing up the uninitialised values changes two of the x86 Linux boot
regressions slightly.
2014-11-24 09:03:39 -05:00
Gabe Black
2d2a5aa410
x86: Update stats for the new Linux delay port.
2014-11-21 17:22:19 -08:00
Gabe Black
994c44035d
x86: Update the stats for the x86 FS o3 boot test.
2014-11-17 00:16:36 -08:00
Andreas Hansson
4583a5114a
stats: Bump regressions to match latest changes
...
Updates after timezone hick-up and sorting of dictionary items in the
SimObject.
2014-11-12 09:05:25 -05:00
Nilay Vaish
02b4605da0
stats: changes to x86 o3 fs and sparc fs regression tests.
2014-11-11 14:17:10 -06:00
Marc Orr
3947f88d0f
tests: A test program for the new mwait implementation.
...
This is a simple test program for the new mwait implemenation. It is uses
m5threads to create to threads of execution in syscall emulation mode that
interact using the mwait instruction.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-11-06 05:42:21 -06:00
Nilay Vaish
a75e27b4a6
stats: updates due to changes to ruby
2014-11-06 05:42:21 -06:00
Nilay Vaish
3022d463fb
ruby: interface with classic memory controller
...
This patch is the final in the series. The whole series and this patch in
particular were written with the aim of interfacing ruby's directory controller
with the memory controller in the classic memory system. This is being done
since ruby's memory controller has not being kept up to date with the changes
going on in DRAMs. Classic's memory controller is more up to date and
supports multiple different types of DRAM. This also brings classic and
ruby ever more close. The patch also changes ruby's memory controller to
expose the same interface.
2014-11-06 05:42:21 -06:00
Nilay Vaish
95a0b18431
ruby: single physical memory in fs mode
...
Both ruby and the system used to maintain memory copies. With the changes
carried for programmed io accesses, only one single memory is required for
fs simulations. This patch sets the copy of memory that used to reside
with the system to null, so that no space is allocated, but address checks
can still be carried out. All the memory accesses now source and sink values
to the memory maintained by ruby.
2014-11-06 05:41:44 -06:00
Ali Saidi
ae82551496
tests: Update stats no match.
...
Bootloader I had on my sytem was an older version with a couple of
instruction differences.
2014-11-03 10:14:42 -06:00
Ali Saidi
2c2c3a4ce9
arm, tests: Forgot the system.terminal files for the new regressions.
2014-10-30 00:04:12 -05:00
Ali Saidi
29cd50e14e
arm, tests: Add 64-bit ARM regression tests
2014-10-29 23:50:15 -05:00
Ali Saidi
93c0307d41
tests: Update regressions for the new kernels and various preceeding fixes.
2014-10-29 23:18:29 -05:00
Ali Saidi
f2db2a96d1
arm, tests: Update config files to more recent kernels and create 64-bit regressions.
...
This changes the default ARM system to a Versatile Express-like system that supports
2GB of memory and PCI devices and updates the default kernels/file-systems for
AArch64 ARM systems (64-bit) to support up to 32GB of memory and PCI devices. Some
platforms that are no longer supported have been pruned from the configuration files.
In addition a set of 64-bit ARM regressions have been added to the regression system.
2014-10-29 23:18:27 -05:00
Nilay Vaish
d2a0f60b69
stats: updates due to previous mmap and exit_group patches.
2014-10-20 16:48:19 -05:00
Andreas Hansson
a63ba6c7b7
stats: Small bump of trailing stats
...
Somehow these seem to have been missed.
2014-10-16 05:49:31 -04:00
Nilay Vaish
1efe42fa97
stats: updates due to changes to x86, stale configs.
2014-10-11 16:18:51 -05:00
Andreas Hansson
0746e92cd3
stats: Add DRAM power statistics to reference output
2014-10-09 17:52:13 -04:00
Andreas Hansson
ff2d58f935
stats: Update stats to reflect ARM fixes
...
As a result of the fixes, the full-system dual-core ARM regressions
are slightly changed. Hopefully this also means there will no longer
be any discrepancies between the results observed on different hosts.
2014-09-28 16:53:48 -04:00
Steve Reinhardt
71d5f03175
stats: update t1000 stats for recent changes
2014-09-21 23:04:39 -04:00
Steve Reinhardt
8649757135
stats: update eio stats for recent changes
2014-09-21 16:15:14 -04:00
Andreas Hansson
c4e91289ae
stats: Bump stats for filter, crossbar and config changes
...
This patch bumps the stats to reflect the addition of the snoop filter
and snoop stats, the change from bus to crossbar, and the updates to
the ARM regressions that are now using a different CPU and cache
configuration. Lastly, some minor changes are expected due to the
activation cleanup of the CPUs.
2014-09-20 17:18:53 -04:00
Andreas Hansson
2b0438a11e
tests: Use more representative configs for ARM tests
...
This patch changes the CPU and cache configurations used in the ARM SE and FS
regressions to make them more representative, and also get better code
coverage by exercising different replacement policies and use an L2
prefetcher.
2014-09-20 17:18:33 -04:00
Andreas Hansson
1f6d5f8f84
mem: Rename Bus to XBar to better reflect its behaviour
...
This patch changes the name of the Bus classes to XBar to better
reflect the actual timing behaviour. The actual instances in the
config scripts are not renamed, and remain as e.g. iobus or membus.
As part of this renaming, the code has also been clean up slightly,
making use of range-based for loops and tidying up some comments. The
only changes outside the bus/crossbar code is due to the delay
variables in the packet.
--HG--
rename : src/mem/Bus.py => src/mem/XBar.py
rename : src/mem/coherent_bus.cc => src/mem/coherent_xbar.cc
rename : src/mem/coherent_bus.hh => src/mem/coherent_xbar.hh
rename : src/mem/noncoherent_bus.cc => src/mem/noncoherent_xbar.cc
rename : src/mem/noncoherent_bus.hh => src/mem/noncoherent_xbar.hh
rename : src/mem/bus.cc => src/mem/xbar.cc
rename : src/mem/bus.hh => src/mem/xbar.hh
2014-09-20 17:18:32 -04:00
Andreas Hansson
1884bcc03b
tests: Add a memtest version using the ideal SnoopFilter
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This patch adds a basic regression test for the snoop filter.
--HG--
rename : tests/configs/memtest.py => tests/configs/memtest-filter.py
2014-09-20 17:18:30 -04:00
Curtis Dunham
e553ca67d4
tests: automatically kill regressions that take too long
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When GNU coreutils 'timeout' is available, limit each regression
simulation to 4 hours.
2014-08-25 14:32:00 -05:00
Andreas Hansson
8d18713d28
stats: Minor update of Minor stats after uncacheable fix
2014-09-12 10:22:50 -04:00
Andreas Hansson
a217eba078
stats: Update stats for CPU and cache changes
...
This patch updates the stats to reflect the fixes and changes to the
CPU (mainly the o3), and the caches.
2014-09-03 07:42:59 -04:00
Andreas Hansson
db430698bf
tests: Use medium dataset for perlbmk regressions
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This patch changes the perlbmk regression script from the large to the
medium dataset to reduce the regression run time. For all ISAs and CPU
models, the total perlbmk host CPU time with the large dataset is
roughly 12 hours (constituting >30% of the total regression host
time). There is, most likely, almost no added value in terms of code
coverage for this rather excessive run time.
2014-09-03 07:42:57 -04:00
Andreas Hansson
351e146b37
alpha: Stop using 'inorder' and rely entirely on 'minor'
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This patch avoids building the 'inorder' CPU model for any permutation
of ALPHA, and also removes the ALPHA regressions using the 'inorder'
CPU. The 'minor' CPU is already providing a broader test coverage.
2014-09-03 07:42:56 -04:00
Andreas Hansson
ee68c2b302
tests: Use O3_ARM_v7a config for full-system ARM regressions
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This patch changes the CPU configuration used for the full-system ARM
regressions to increase the test coverage. Note that it is only the
core configuration, and not the caches etc.
2014-09-03 07:42:41 -04:00
Nilay Vaish
fa1fbcf020
stats: updates due to recent ruby and x86 changes
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Also updates many out of date config files.
2014-09-01 16:55:52 -05:00
Emilio Castillo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
01f792a367
ruby: Fixes clock domains in configuration files
...
This patch fixes scripts related to ruby by adding the ruby clock domain.
Now the L1 controllers and the Sequencer shares the cpu clock domain,
while the rest of the components use the ruby clock domain.
Before this patch, running simulations with the cpu clock set at 2GHz or
1GHz will output the same time results and could distort power measurements.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-09-01 16:55:30 -05:00
Andreas Hansson
cbf417c713
stats: Bump stats for the regressions using the minor CPU
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Updating the stats to match the current behaviour.
2014-07-28 01:48:21 -04:00
Andrew Bardsley
5d0b25ba3f
cpu: Minor CPU add regression tests for ARM and ALPHA
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This patch adds regression tests results and test harnesses
for the Minor CPU on ARM and ALPHA.
2014-07-23 16:09:05 -05:00
Steve Reinhardt
040fa23d01
stats: update for syscall DPRINTF change
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Only printing one rather than two args for the ignored syscall
warning means the count of register accesses has changed on
a few runs. Oddly only Alpha Tru64 seems to have any ignored
syscalls in the regression tests.
2014-07-19 19:04:58 -07:00
Steve Reinhardt
5b08e211ab
stats: update for O3 changes
...
Mostly small differences in total ticks, but O3 stall causes
shifted significantly.
30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex
by 4.5% on ARM. At the other extreme, X86 70.twolf is 0.8%
slower.
2014-06-22 14:33:09 -07:00
Nilay Vaish
2a8088f5ae
stats: changes due to recent o3 patch.
2014-05-24 21:30:46 -05:00
Nilay Vaish
0aaa7d10d8
stats: changes due to o3 cpu and ruby message buffer patches
2014-05-23 06:07:02 -05:00
Steve Reinhardt
72403cb595
tests: update t1000 & pc-switcheroo-full stats
...
committed reference config.json files too
2014-05-12 17:22:17 -04:00