stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
This commit is contained in:
parent
a70a83155b
commit
0cf36d9409
163 changed files with 4750 additions and 4700 deletions
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@ -15,19 +15,20 @@ boot_cpu_frequency=500
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boot_osflags=root=/dev/hda1 console=ttyS0
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cache_line_size=64
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clk_domain=system.clk_domain
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console=/dist/binaries/console
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console=/home/stever/m5/m5_system_2.0b3/binaries/console
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eventq_index=0
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init_param=0
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kernel=/dist/binaries/vmlinux
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kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux
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kernel_addr_check=true
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load_addr_mask=1099511627775
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load_offset=0
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mem_mode=timing
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mem_ranges=0:134217727
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memories=system.physmem
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mmap_using_noreserve=false
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num_work_ids=16
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pal=/dist/binaries/ts_osfpal
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readfile=/work/gem5.latest/tests/halt.sh
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pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal
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readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
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symbolfile=
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system_rev=1024
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system_type=34
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@ -149,7 +150,7 @@ dcache_port=system.cpu0.dcache.cpu_side
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icache_port=system.cpu0.icache.cpu_side
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[system.cpu0.branchPred]
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type=BranchPredictor
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type=TournamentBP
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BTBEntries=4096
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BTBTagSize=16
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RASSize=16
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@ -163,7 +164,6 @@ localCtrBits=2
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localHistoryTableSize=2048
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localPredictorSize=2048
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numThreads=1
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predType=tournament
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[system.cpu0.dcache]
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type=BaseCache
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@ -171,6 +171,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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@ -518,6 +519,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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@ -655,7 +657,7 @@ dcache_port=system.cpu1.dcache.cpu_side
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icache_port=system.cpu1.icache.cpu_side
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[system.cpu1.branchPred]
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type=BranchPredictor
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type=TournamentBP
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BTBEntries=4096
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BTBTagSize=16
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RASSize=16
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@ -669,7 +671,6 @@ localCtrBits=2
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localHistoryTableSize=2048
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localPredictorSize=2048
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numThreads=1
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predType=tournament
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[system.cpu1.dcache]
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type=BaseCache
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@ -677,6 +678,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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@ -1024,6 +1026,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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@ -1099,7 +1102,7 @@ table_size=65536
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[system.disk0.image.child]
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type=RawDiskImage
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eventq_index=0
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image_file=/dist/disks/linux-latest.img
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image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img
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read_only=true
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[system.disk2]
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@ -1122,7 +1125,7 @@ table_size=65536
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[system.disk2.image.child]
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type=RawDiskImage
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eventq_index=0
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image_file=/dist/disks/linux-bigswap2.img
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image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img
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read_only=true
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[system.dvfs_handler]
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@ -1142,9 +1145,11 @@ sys=system
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type=NoncoherentXBar
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clk_domain=system.clk_domain
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eventq_index=0
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header_cycles=1
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forward_latency=1
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frontend_latency=2
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response_latency=2
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use_default_range=true
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width=8
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width=16
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default=system.tsunami.pciconfig.pio
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master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
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slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
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@ -1155,6 +1160,7 @@ children=tags
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addr_ranges=0:134217727
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assoc=8
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clk_domain=system.clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=false
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hit_latency=50
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@ -1190,6 +1196,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=8
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=20
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@ -1224,11 +1231,14 @@ type=CoherentXBar
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children=badaddr_responder
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clk_domain=system.clk_domain
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eventq_index=0
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header_cycles=1
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forward_latency=4
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frontend_latency=3
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response_latency=2
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snoop_filter=Null
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snoop_response_latency=4
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system=system
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use_default_range=false
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width=8
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width=16
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default=system.membus.badaddr_responder.pio
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master=system.bridge.slave system.physmem.port
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slave=system.system_port system.l2c.mem_side system.iocache.mem_side
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@ -1278,7 +1288,7 @@ IDD62=0.000000
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VDD=1.500000
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VDD2=0.000000
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activation_limit=4
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addr_mapping=RoRaBaChCo
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addr_mapping=RoRaBaCoCh
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bank_groups_per_rank=0
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banks_per_rank=8
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burst_length=8
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@ -1338,7 +1348,7 @@ system=system
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[system.simple_disk.disk]
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type=RawDiskImage
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eventq_index=0
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image_file=/dist/disks/linux-latest.img
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image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img
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read_only=true
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[system.terminal]
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@ -1353,11 +1363,14 @@ port=3456
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type=CoherentXBar
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clk_domain=system.cpu_clk_domain
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eventq_index=0
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header_cycles=1
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forward_latency=0
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frontend_latency=1
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response_latency=1
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snoop_filter=Null
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snoop_response_latency=1
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system=system
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use_default_range=false
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width=8
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width=32
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master=system.l2c.cpu_side
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slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
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@ -1,13 +1,14 @@
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Oct 29 2014 09:12:51
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gem5 started Oct 29 2014 09:21:02
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gem5 executing on u200540-lin
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual
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gem5 compiled Apr 22 2015 07:55:25
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gem5 started Apr 22 2015 09:01:06
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gem5 executing on phenom
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual
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Global frequency set at 1000000000000 ticks per second
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info: kernel located at: /dist/binaries/vmlinux
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info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux
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0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
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info: Entering event queue @ 0. Starting simulation...
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info: Launching CPU 1 @ 119596000
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Exiting @ tick 1905067807000 because m5_exit instruction encountered
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info: Launching CPU 1 @ 133655000
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Exiting @ tick 1904437574000 because m5_exit instruction encountered
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@ -4,11 +4,11 @@ sim_seconds 1.904438 # Nu
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sim_ticks 1904437574000 # Number of ticks simulated
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final_tick 1904437574000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 150033 # Simulator instruction rate (inst/s)
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host_op_rate 150033 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 5049661741 # Simulator tick rate (ticks/s)
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host_mem_usage 379720 # Number of bytes of host memory used
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host_seconds 377.14 # Real time elapsed on the host
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host_inst_rate 143053 # Simulator instruction rate (inst/s)
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host_op_rate 143053 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 4814720142 # Simulator tick rate (ticks/s)
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host_mem_usage 313028 # Number of bytes of host memory used
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host_seconds 395.54 # Real time elapsed on the host
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sim_insts 56583768 # Number of instructions simulated
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sim_ops 56583768 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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@ -437,7 +437,7 @@ system.cpu0.iq.iqInstsAdded 53110388 # Nu
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system.cpu0.iq.iqNonSpecInstsAdded 1887245 # Number of non-speculative instructions added to the IQ
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system.cpu0.iq.iqInstsIssued 52243998 # Number of instructions issued
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system.cpu0.iq.iqSquashedInstsIssued 50112 # Number of squashed instructions issued
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system.cpu0.iq.iqSquashedInstsExamined 6322079 # Number of squashed instructions iterated over during squash; mainly for profiling
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system.cpu0.iq.iqSquashedInstsExamined 6621677 # Number of squashed instructions iterated over during squash; mainly for profiling
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system.cpu0.iq.iqSquashedOperandsExamined 2924940 # Number of squashed operands that are examined and possibly removed from graph
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system.cpu0.iq.iqSquashedNonSpecRemoved 1298251 # Number of squashed non-spec instructions that were removed
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system.cpu0.iq.issued_per_cycle::samples 110234726 # Number of insts issued each cycle
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@ -530,10 +530,10 @@ system.cpu0.iq.rate 0.453068 # In
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system.cpu0.iq.fu_busy_cnt 970450 # FU busy when requested
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system.cpu0.iq.fu_busy_rate 0.018575 # FU busy rate (busy events/executed inst)
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system.cpu0.iq.int_inst_queue_reads 215148578 # Number of integer instruction queue reads
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system.cpu0.iq.int_inst_queue_writes 61059123 # Number of integer instruction queue writes
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system.cpu0.iq.int_inst_queue_writes 61357419 # Number of integer instruction queue writes
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system.cpu0.iq.int_inst_queue_wakeup_accesses 50866456 # Number of integer instruction queue wakeup accesses
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system.cpu0.iq.fp_inst_queue_reads 594706 # Number of floating instruction queue reads
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system.cpu0.iq.fp_inst_queue_writes 278076 # Number of floating instruction queue writes
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system.cpu0.iq.fp_inst_queue_writes 279378 # Number of floating instruction queue writes
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system.cpu0.iq.fp_inst_queue_wakeup_accesses 273817 # Number of floating instruction queue wakeup accesses
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system.cpu0.iq.int_alu_accesses 52889876 # Number of integer alu accesses
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system.cpu0.iq.fp_alu_accesses 320091 # Number of floating point alu accesses
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@ -1032,7 +1032,7 @@ system.cpu1.iq.iqInstsAdded 9284732 # Nu
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system.cpu1.iq.iqNonSpecInstsAdded 487174 # Number of non-speculative instructions added to the IQ
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system.cpu1.iq.iqInstsIssued 9053277 # Number of instructions issued
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system.cpu1.iq.iqSquashedInstsIssued 20996 # Number of squashed instructions issued
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system.cpu1.iq.iqSquashedInstsExamined 1498950 # Number of squashed instructions iterated over during squash; mainly for profiling
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system.cpu1.iq.iqSquashedInstsExamined 1564088 # Number of squashed instructions iterated over during squash; mainly for profiling
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system.cpu1.iq.iqSquashedOperandsExamined 731721 # Number of squashed operands that are examined and possibly removed from graph
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system.cpu1.iq.iqSquashedNonSpecRemoved 360528 # Number of squashed non-spec instructions that were removed
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system.cpu1.iq.issued_per_cycle::samples 13661307 # Number of insts issued each cycle
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@ -1125,10 +1125,10 @@ system.cpu1.iq.rate 0.633233 # In
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system.cpu1.iq.fu_busy_cnt 251682 # FU busy when requested
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system.cpu1.iq.fu_busy_rate 0.027800 # FU busy rate (busy events/executed inst)
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system.cpu1.iq.int_inst_queue_reads 31870123 # Number of integer instruction queue reads
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system.cpu1.iq.int_inst_queue_writes 11194643 # Number of integer instruction queue writes
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system.cpu1.iq.int_inst_queue_writes 11259293 # Number of integer instruction queue writes
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system.cpu1.iq.int_inst_queue_wakeup_accesses 8718718 # Number of integer instruction queue wakeup accesses
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system.cpu1.iq.fp_inst_queue_reads 170415 # Number of floating instruction queue reads
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system.cpu1.iq.fp_inst_queue_writes 80450 # Number of floating instruction queue writes
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system.cpu1.iq.fp_inst_queue_writes 80938 # Number of floating instruction queue writes
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system.cpu1.iq.fp_inst_queue_wakeup_accesses 78899 # Number of floating instruction queue wakeup accesses
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system.cpu1.iq.int_alu_accesses 9210850 # Number of integer alu accesses
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system.cpu1.iq.fp_alu_accesses 91292 # Number of floating point alu accesses
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@ -27,7 +27,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
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memcluster 1, usage 0, start 392, end 16384
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freeing pages 1069:16384
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reserving pages 1069:1070
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4096K Bcache detected; load hit latency 30 cycles, load miss latency 140 cycles
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4096K Bcache detected; load hit latency 30 cycles, load miss latency 154 cycles
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SMP: 2 CPUs probed -- cpu_present_mask = 3
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Built 1 zonelists
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Kernel command line: root=/dev/hda1 console=ttyS0
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@ -15,19 +15,20 @@ boot_cpu_frequency=500
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boot_osflags=root=/dev/hda1 console=ttyS0
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cache_line_size=64
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clk_domain=system.clk_domain
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console=/dist/binaries/console
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console=/home/stever/m5/m5_system_2.0b3/binaries/console
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eventq_index=0
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init_param=0
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kernel=/dist/binaries/vmlinux
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kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux
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kernel_addr_check=true
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load_addr_mask=1099511627775
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load_offset=0
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mem_mode=timing
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mem_ranges=0:134217727
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memories=system.physmem
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mmap_using_noreserve=false
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num_work_ids=16
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pal=/dist/binaries/ts_osfpal
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readfile=/work/gem5.latest/tests/halt.sh
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pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal
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readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
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symbolfile=
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system_rev=1024
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system_type=34
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@ -149,7 +150,7 @@ dcache_port=system.cpu.dcache.cpu_side
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icache_port=system.cpu.icache.cpu_side
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[system.cpu.branchPred]
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type=BranchPredictor
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type=TournamentBP
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BTBEntries=4096
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BTBTagSize=16
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RASSize=16
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@ -163,7 +164,6 @@ localCtrBits=2
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localHistoryTableSize=2048
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localPredictorSize=2048
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numThreads=1
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predType=tournament
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[system.cpu.dcache]
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type=BaseCache
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@ -171,6 +171,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=4
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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@ -518,6 +519,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=1
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=2
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@ -567,6 +569,7 @@ children=tags
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addr_ranges=0:18446744073709551615
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assoc=8
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clk_domain=system.cpu_clk_domain
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demand_mshr_reserve=1
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eventq_index=0
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forward_snoops=true
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hit_latency=20
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@ -600,8 +603,11 @@ size=4194304
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type=CoherentXBar
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clk_domain=system.cpu_clk_domain
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eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=0
|
||||
frontend_latency=1
|
||||
response_latency=1
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=32
|
||||
|
@ -640,7 +646,7 @@ table_size=65536
|
|||
[system.disk0.image.child]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-latest.img
|
||||
image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img
|
||||
read_only=true
|
||||
|
||||
[system.disk2]
|
||||
|
@ -663,7 +669,7 @@ table_size=65536
|
|||
[system.disk2.image.child]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-bigswap2.img
|
||||
image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img
|
||||
read_only=true
|
||||
|
||||
[system.dvfs_handler]
|
||||
|
@ -683,9 +689,11 @@ sys=system
|
|||
type=NoncoherentXBar
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=1
|
||||
frontend_latency=2
|
||||
response_latency=2
|
||||
use_default_range=true
|
||||
width=8
|
||||
width=16
|
||||
default=system.tsunami.pciconfig.pio
|
||||
master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
|
||||
slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
|
||||
|
@ -696,6 +704,7 @@ children=tags
|
|||
addr_ranges=0:134217727
|
||||
assoc=8
|
||||
clk_domain=system.clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=false
|
||||
hit_latency=50
|
||||
|
@ -730,11 +739,14 @@ type=CoherentXBar
|
|||
children=badaddr_responder
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=4
|
||||
frontend_latency=3
|
||||
response_latency=2
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=4
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=8
|
||||
width=16
|
||||
default=system.membus.badaddr_responder.pio
|
||||
master=system.bridge.slave system.physmem.port
|
||||
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||
|
@ -784,7 +796,7 @@ IDD62=0.000000
|
|||
VDD=1.500000
|
||||
VDD2=0.000000
|
||||
activation_limit=4
|
||||
addr_mapping=RoRaBaChCo
|
||||
addr_mapping=RoRaBaCoCh
|
||||
bank_groups_per_rank=0
|
||||
banks_per_rank=8
|
||||
burst_length=8
|
||||
|
@ -844,7 +856,7 @@ system=system
|
|||
[system.simple_disk.disk]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-latest.img
|
||||
image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img
|
||||
read_only=true
|
||||
|
||||
[system.terminal]
|
||||
|
|
|
@ -1,12 +1,13 @@
|
|||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Oct 29 2014 09:12:51
|
||||
gem5 started Oct 29 2014 09:20:51
|
||||
gem5 executing on u200540-lin
|
||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3
|
||||
gem5 compiled Apr 22 2015 07:55:25
|
||||
gem5 started Apr 22 2015 08:27:15
|
||||
gem5 executing on phenom
|
||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3
|
||||
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
info: kernel located at: /dist/binaries/vmlinux
|
||||
info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux
|
||||
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
||||
info: Entering event queue @ 0. Starting simulation...
|
||||
Exiting @ tick 1859038679000 because m5_exit instruction encountered
|
||||
Exiting @ tick 1861005569500 because m5_exit instruction encountered
|
||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.861006 # Nu
|
|||
sim_ticks 1861005569500 # Number of ticks simulated
|
||||
final_tick 1861005569500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 153218 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 153218 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 5386630373 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 376136 # Number of bytes of host memory used
|
||||
host_seconds 345.49 # Real time elapsed on the host
|
||||
host_inst_rate 145313 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 145313 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 5108711594 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 309496 # Number of bytes of host memory used
|
||||
host_seconds 364.28 # Real time elapsed on the host
|
||||
sim_insts 52934565 # Number of instructions simulated
|
||||
sim_ops 52934565 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
|
@ -425,7 +425,7 @@ system.cpu.iq.iqInstsAdded 58622970 # Nu
|
|||
system.cpu.iq.iqNonSpecInstsAdded 2136022 # Number of non-speculative instructions added to the IQ
|
||||
system.cpu.iq.iqInstsIssued 57539781 # Number of instructions issued
|
||||
system.cpu.iq.iqSquashedInstsIssued 62715 # Number of squashed instructions issued
|
||||
system.cpu.iq.iqSquashedInstsExamined 7497440 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu.iq.iqSquashedInstsExamined 7824422 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu.iq.iqSquashedOperandsExamined 3554737 # Number of squashed operands that are examined and possibly removed from graph
|
||||
system.cpu.iq.iqSquashedNonSpecRemoved 1474907 # Number of squashed non-spec instructions that were removed
|
||||
system.cpu.iq.issued_per_cycle::samples 117014009 # Number of insts issued each cycle
|
||||
|
@ -518,10 +518,10 @@ system.cpu.iq.rate 0.469435 # In
|
|||
system.cpu.iq.fu_busy_cnt 1115222 # FU busy when requested
|
||||
system.cpu.iq.fu_busy_rate 0.019382 # FU busy rate (busy events/executed inst)
|
||||
system.cpu.iq.int_inst_queue_reads 232558247 # Number of integer instruction queue reads
|
||||
system.cpu.iq.int_inst_queue_writes 67941522 # Number of integer instruction queue writes
|
||||
system.cpu.iq.int_inst_queue_writes 68266797 # Number of integer instruction queue writes
|
||||
system.cpu.iq.int_inst_queue_wakeup_accesses 55883323 # Number of integer instruction queue wakeup accesses
|
||||
system.cpu.iq.fp_inst_queue_reads 713260 # Number of floating instruction queue reads
|
||||
system.cpu.iq.fp_inst_queue_writes 334790 # Number of floating instruction queue writes
|
||||
system.cpu.iq.fp_inst_queue_writes 336497 # Number of floating instruction queue writes
|
||||
system.cpu.iq.fp_inst_queue_wakeup_accesses 329169 # Number of floating instruction queue wakeup accesses
|
||||
system.cpu.iq.int_alu_accesses 58264568 # Number of integer alu accesses
|
||||
system.cpu.iq.fp_alu_accesses 383149 # Number of floating point alu accesses
|
||||
|
|
|
@ -24,7 +24,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
|
|||
memcluster 1, usage 0, start 392, end 16384
|
||||
freeing pages 1069:16384
|
||||
reserving pages 1069:1070
|
||||
4096K Bcache detected; load hit latency 30 cycles, load miss latency 140 cycles
|
||||
4096K Bcache detected; load hit latency 30 cycles, load miss latency 154 cycles
|
||||
SMP: 1 CPUs probed -- cpu_present_mask = 1
|
||||
Built 1 zonelists
|
||||
Kernel command line: root=/dev/hda1 console=ttyS0
|
||||
|
|
|
@ -15,19 +15,20 @@ boot_cpu_frequency=500
|
|||
boot_osflags=root=/dev/hda1 console=ttyS0
|
||||
cache_line_size=64
|
||||
clk_domain=system.clk_domain
|
||||
console=/dist/binaries/console
|
||||
console=/home/stever/m5/m5_system_2.0b3/binaries/console
|
||||
eventq_index=0
|
||||
init_param=0
|
||||
kernel=/dist/binaries/vmlinux
|
||||
kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux
|
||||
kernel_addr_check=true
|
||||
load_addr_mask=1099511627775
|
||||
load_offset=0
|
||||
mem_mode=atomic
|
||||
mem_ranges=0:134217727
|
||||
memories=system.physmem
|
||||
mmap_using_noreserve=false
|
||||
num_work_ids=16
|
||||
pal=/dist/binaries/ts_osfpal
|
||||
readfile=/work/gem5.latest/tests/halt.sh
|
||||
pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal
|
||||
readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
|
||||
symbolfile=
|
||||
system_rev=1024
|
||||
system_type=34
|
||||
|
@ -102,6 +103,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
|
@ -142,6 +144,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
|
@ -327,7 +330,7 @@ wbWidth=8
|
|||
workload=
|
||||
|
||||
[system.cpu2.branchPred]
|
||||
type=BranchPredictor
|
||||
type=TournamentBP
|
||||
BTBEntries=4096
|
||||
BTBTagSize=16
|
||||
RASSize=16
|
||||
|
@ -341,7 +344,6 @@ localCtrBits=2
|
|||
localHistoryTableSize=2048
|
||||
localPredictorSize=2048
|
||||
numThreads=1
|
||||
predType=tournament
|
||||
|
||||
[system.cpu2.dtb]
|
||||
type=AlphaTLB
|
||||
|
@ -697,7 +699,7 @@ table_size=65536
|
|||
[system.disk0.image.child]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-latest.img
|
||||
image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img
|
||||
read_only=true
|
||||
|
||||
[system.disk2]
|
||||
|
@ -720,7 +722,7 @@ table_size=65536
|
|||
[system.disk2.image.child]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-bigswap2.img
|
||||
image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img
|
||||
read_only=true
|
||||
|
||||
[system.dvfs_handler]
|
||||
|
@ -740,9 +742,11 @@ sys=system
|
|||
type=NoncoherentXBar
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=1
|
||||
frontend_latency=2
|
||||
response_latency=2
|
||||
use_default_range=true
|
||||
width=8
|
||||
width=16
|
||||
default=system.tsunami.pciconfig.pio
|
||||
master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
|
||||
slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
|
||||
|
@ -753,6 +757,7 @@ children=tags
|
|||
addr_ranges=0:134217727
|
||||
assoc=8
|
||||
clk_domain=system.clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=false
|
||||
hit_latency=50
|
||||
|
@ -788,6 +793,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=8
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=20
|
||||
|
@ -822,11 +828,14 @@ type=CoherentXBar
|
|||
children=badaddr_responder
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=4
|
||||
frontend_latency=3
|
||||
response_latency=2
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=4
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=8
|
||||
width=16
|
||||
default=system.membus.badaddr_responder.pio
|
||||
master=system.bridge.slave system.physmem.port
|
||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||
|
@ -876,7 +885,7 @@ IDD62=0.000000
|
|||
VDD=1.500000
|
||||
VDD2=0.000000
|
||||
activation_limit=4
|
||||
addr_mapping=RoRaBaChCo
|
||||
addr_mapping=RoRaBaCoCh
|
||||
bank_groups_per_rank=0
|
||||
banks_per_rank=8
|
||||
burst_length=8
|
||||
|
@ -936,7 +945,7 @@ system=system
|
|||
[system.simple_disk.disk]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-latest.img
|
||||
image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img
|
||||
read_only=true
|
||||
|
||||
[system.terminal]
|
||||
|
@ -951,11 +960,14 @@ port=3456
|
|||
type=CoherentXBar
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=0
|
||||
frontend_latency=1
|
||||
response_latency=1
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=8
|
||||
width=32
|
||||
master=system.l2c.cpu_side
|
||||
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side
|
||||
|
||||
|
|
|
@ -1,5 +1,53 @@
|
|||
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||
warn: Sockets disabled, not accepting terminal connections
|
||||
warn: Sockets disabled, not accepting gdb connections
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
warn: Prefetch instructions in Alpha do not do anything
|
||||
warn: Prefetch instructions in Alpha do not do anything
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: Bank is already active!
|
||||
Command: 0, Timestamp: 10136, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
WARNING: Bank is already active!
|
||||
Command: 0, Timestamp: 11138, Bank: 3
|
||||
WARNING: One or more banks are active! REF requires all banks to be precharged.
|
||||
Command: 4, Timestamp: 12458, Bank: 0
|
||||
|
|
|
@ -1,9 +1,10 @@
|
|||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Oct 29 2014 09:12:51
|
||||
gem5 started Oct 29 2014 09:24:03
|
||||
gem5 executing on u200540-lin
|
||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full
|
||||
gem5 compiled Apr 22 2015 07:55:25
|
||||
gem5 started Apr 22 2015 08:35:45
|
||||
gem5 executing on phenom
|
||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full
|
||||
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.841539 # Nu
|
|||
sim_ticks 1841538755500 # Number of ticks simulated
|
||||
final_tick 1841538755500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 221552 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 221552 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 5785089232 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 374344 # Number of bytes of host memory used
|
||||
host_seconds 318.33 # Real time elapsed on the host
|
||||
host_inst_rate 221247 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 221247 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 5777125497 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 308008 # Number of bytes of host memory used
|
||||
host_seconds 318.76 # Real time elapsed on the host
|
||||
sim_insts 70525499 # Number of instructions simulated
|
||||
sim_ops 70525499 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
|
@ -1109,7 +1109,7 @@ system.cpu2.iq.iqInstsAdded 32987424 # Nu
|
|||
system.cpu2.iq.iqNonSpecInstsAdded 681806 # Number of non-speculative instructions added to the IQ
|
||||
system.cpu2.iq.iqInstsIssued 32666998 # Number of instructions issued
|
||||
system.cpu2.iq.iqSquashedInstsIssued 16031 # Number of squashed instructions issued
|
||||
system.cpu2.iq.iqSquashedInstsExamined 2457717 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu2.iq.iqSquashedInstsExamined 2569271 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu2.iq.iqSquashedOperandsExamined 1151235 # Number of squashed operands that are examined and possibly removed from graph
|
||||
system.cpu2.iq.iqSquashedNonSpecRemoved 487594 # Number of squashed non-spec instructions that were removed
|
||||
system.cpu2.iq.issued_per_cycle::samples 29124256 # Number of insts issued each cycle
|
||||
|
@ -1202,10 +1202,10 @@ system.cpu2.iq.rate 1.063974 # In
|
|||
system.cpu2.iq.fu_busy_cnt 386915 # FU busy when requested
|
||||
system.cpu2.iq.fu_busy_rate 0.011844 # FU busy rate (busy events/executed inst)
|
||||
system.cpu2.iq.int_inst_queue_reads 94607462 # Number of integer instruction queue reads
|
||||
system.cpu2.iq.int_inst_queue_writes 36013478 # Number of integer instruction queue writes
|
||||
system.cpu2.iq.int_inst_queue_writes 36124516 # Number of integer instruction queue writes
|
||||
system.cpu2.iq.int_inst_queue_wakeup_accesses 32054290 # Number of integer instruction queue wakeup accesses
|
||||
system.cpu2.iq.fp_inst_queue_reads 253736 # Number of floating instruction queue reads
|
||||
system.cpu2.iq.fp_inst_queue_writes 119374 # Number of floating instruction queue writes
|
||||
system.cpu2.iq.fp_inst_queue_writes 119890 # Number of floating instruction queue writes
|
||||
system.cpu2.iq.fp_inst_queue_wakeup_accesses 117198 # Number of floating instruction queue wakeup accesses
|
||||
system.cpu2.iq.int_alu_accesses 32915380 # Number of integer alu accesses
|
||||
system.cpu2.iq.fp_alu_accesses 136083 # Number of floating point alu accesses
|
||||
|
|
|
@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000
|
|||
type=LinuxArmSystem
|
||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||
atags_addr=134217728
|
||||
boot_loader=/dist/binaries/boot_emm.arm
|
||||
boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
|
||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||
boot_release_addr=65528
|
||||
cache_line_size=64
|
||||
clk_domain=system.clk_domain
|
||||
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||
dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||
early_kernel_symbols=false
|
||||
enable_context_switch_stats_dump=false
|
||||
eventq_index=0
|
||||
|
@ -30,20 +30,21 @@ have_security=false
|
|||
have_virtualization=false
|
||||
highest_el_is_64=false
|
||||
init_param=0
|
||||
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
kernel_addr_check=true
|
||||
load_addr_mask=268435455
|
||||
load_offset=2147483648
|
||||
machine_type=VExpress_EMM
|
||||
mem_mode=timing
|
||||
mem_ranges=2147483648:2415919103
|
||||
memories=system.physmem system.realview.vram system.realview.nvmem
|
||||
memories=system.physmem system.realview.nvmem system.realview.vram
|
||||
mmap_using_noreserve=false
|
||||
multi_proc=true
|
||||
num_work_ids=16
|
||||
panic_on_oops=true
|
||||
panic_on_panic=true
|
||||
phys_addr_range_64=40
|
||||
readfile=/work/gem5.ext/tests/halt.sh
|
||||
readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
|
||||
reset_addr_64=0
|
||||
symbolfile=
|
||||
work_begin_ckpt_count=0
|
||||
|
@ -86,7 +87,7 @@ table_size=65536
|
|||
[system.cf0.image.child]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-aarch32-ael.img
|
||||
image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
|
||||
read_only=true
|
||||
|
||||
[system.clk_domain]
|
||||
|
@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side
|
|||
icache_port=system.cpu.icache.cpu_side
|
||||
|
||||
[system.cpu.branchPred]
|
||||
type=BranchPredictor
|
||||
type=BiModeBP
|
||||
BTBEntries=2048
|
||||
BTBTagSize=18
|
||||
RASSize=16
|
||||
|
@ -199,11 +200,7 @@ eventq_index=0
|
|||
globalCtrBits=2
|
||||
globalPredictorSize=8192
|
||||
instShiftAmt=2
|
||||
localCtrBits=2
|
||||
localHistoryTableSize=2048
|
||||
localPredictorSize=2048
|
||||
numThreads=1
|
||||
predType=bi-mode
|
||||
|
||||
[system.cpu.checker]
|
||||
type=O3Checker
|
||||
|
@ -245,6 +242,7 @@ type=ArmStage2MMU
|
|||
children=stage2_tlb
|
||||
eventq_index=0
|
||||
stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb
|
||||
sys=system
|
||||
tlb=system.cpu.checker.dtb
|
||||
|
||||
[system.cpu.checker.dstage2_mmu.stage2_tlb]
|
||||
|
@ -262,7 +260,6 @@ eventq_index=0
|
|||
is_stage2=true
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[9]
|
||||
|
||||
[system.cpu.checker.dtb]
|
||||
type=ArmTLB
|
||||
|
@ -279,7 +276,7 @@ eventq_index=0
|
|||
is_stage2=false
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[7]
|
||||
port=system.cpu.toL2Bus.slave[5]
|
||||
|
||||
[system.cpu.checker.isa]
|
||||
type=ArmISA
|
||||
|
@ -316,6 +313,7 @@ type=ArmStage2MMU
|
|||
children=stage2_tlb
|
||||
eventq_index=0
|
||||
stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb
|
||||
sys=system
|
||||
tlb=system.cpu.checker.itb
|
||||
|
||||
[system.cpu.checker.istage2_mmu.stage2_tlb]
|
||||
|
@ -333,7 +331,6 @@ eventq_index=0
|
|||
is_stage2=true
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[8]
|
||||
|
||||
[system.cpu.checker.itb]
|
||||
type=ArmTLB
|
||||
|
@ -350,7 +347,7 @@ eventq_index=0
|
|||
is_stage2=false
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[6]
|
||||
port=system.cpu.toL2Bus.slave[4]
|
||||
|
||||
[system.cpu.checker.tracer]
|
||||
type=ExeTracer
|
||||
|
@ -362,6 +359,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
|
@ -396,6 +394,7 @@ type=ArmStage2MMU
|
|||
children=stage2_tlb
|
||||
eventq_index=0
|
||||
stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
|
||||
sys=system
|
||||
tlb=system.cpu.dtb
|
||||
|
||||
[system.cpu.dstage2_mmu.stage2_tlb]
|
||||
|
@ -413,7 +412,6 @@ eventq_index=0
|
|||
is_stage2=true
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[5]
|
||||
|
||||
[system.cpu.dtb]
|
||||
type=ArmTLB
|
||||
|
@ -703,6 +701,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
|
@ -771,6 +770,7 @@ type=ArmStage2MMU
|
|||
children=stage2_tlb
|
||||
eventq_index=0
|
||||
stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
|
||||
sys=system
|
||||
tlb=system.cpu.itb
|
||||
|
||||
[system.cpu.istage2_mmu.stage2_tlb]
|
||||
|
@ -788,7 +788,6 @@ eventq_index=0
|
|||
is_stage2=true
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[4]
|
||||
|
||||
[system.cpu.itb]
|
||||
type=ArmTLB
|
||||
|
@ -813,6 +812,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=8
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=20
|
||||
|
@ -846,13 +846,16 @@ size=4194304
|
|||
type=CoherentXBar
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=0
|
||||
frontend_latency=1
|
||||
response_latency=1
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=32
|
||||
master=system.cpu.l2cache.cpu_side
|
||||
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port system.cpu.checker.istage2_mmu.stage2_tlb.walker.port system.cpu.checker.dstage2_mmu.stage2_tlb.walker.port
|
||||
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
|
||||
|
||||
[system.cpu.tracer]
|
||||
type=ExeTracer
|
||||
|
@ -883,9 +886,11 @@ sys=system
|
|||
type=NoncoherentXBar
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=1
|
||||
frontend_latency=2
|
||||
response_latency=2
|
||||
use_default_range=true
|
||||
width=8
|
||||
width=16
|
||||
default=system.realview.pciconfig.pio
|
||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||
|
@ -896,6 +901,7 @@ children=tags
|
|||
addr_ranges=2147483648:2415919103
|
||||
assoc=8
|
||||
clk_domain=system.clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=false
|
||||
hit_latency=50
|
||||
|
@ -930,13 +936,16 @@ type=CoherentXBar
|
|||
children=badaddr_responder
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=4
|
||||
frontend_latency=3
|
||||
response_latency=2
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=4
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=8
|
||||
width=16
|
||||
default=system.membus.badaddr_responder.pio
|
||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
|
||||
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||
|
||||
[system.membus.badaddr_responder]
|
||||
|
@ -984,7 +993,7 @@ IDD62=0.000000
|
|||
VDD=1.500000
|
||||
VDD2=0.000000
|
||||
activation_limit=4
|
||||
addr_mapping=RoRaBaChCo
|
||||
addr_mapping=RoRaBaCoCh
|
||||
bank_groups_per_rank=0
|
||||
banks_per_rank=8
|
||||
burst_length=8
|
||||
|
@ -1288,7 +1297,6 @@ dist_pio_delay=10000
|
|||
eventq_index=0
|
||||
int_latency=10000
|
||||
it_lines=128
|
||||
msix_addr=0
|
||||
platform=system.realview
|
||||
system=system
|
||||
pio=system.membus.master[2]
|
||||
|
@ -1475,7 +1483,7 @@ int_num_watchdog=30
|
|||
pio_addr=738721792
|
||||
pio_latency=100000
|
||||
system=system
|
||||
pio=system.membus.master[3]
|
||||
pio=system.membus.master[4]
|
||||
|
||||
[system.realview.mmc_fake]
|
||||
type=AmbaFake
|
||||
|
@ -1657,7 +1665,7 @@ platform=system.realview
|
|||
ppint=25
|
||||
system=system
|
||||
vcpu_addr=738222080
|
||||
pio=system.membus.master[4]
|
||||
pio=system.membus.master[3]
|
||||
|
||||
[system.realview.vram]
|
||||
type=SimpleMemory
|
||||
|
|
|
@ -16,7 +16,7 @@ warn: instruction 'mcr bpiallis' unimplemented
|
|||
warn: instruction 'mcr icialluis' unimplemented
|
||||
warn: instruction 'mcr dccimvac' unimplemented
|
||||
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||
warn: 8445832500: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0
|
||||
warn: 8779058000: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0
|
||||
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||
|
@ -32,7 +32,7 @@ warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
|||
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0]
|
||||
warn: 81667038500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000
|
||||
warn: 82000113500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000
|
||||
warn: Returning zero for read from miscreg pmcr
|
||||
warn: Returning zero for read from miscreg pmcr
|
||||
warn: Ignoring write to miscreg pmcntenclr
|
||||
|
@ -43,7 +43,6 @@ warn: Ignoring write to miscreg pmovsr
|
|||
warn: Ignoring write to miscreg pmovsr
|
||||
warn: Ignoring write to miscreg pmcr
|
||||
warn: Ignoring write to miscreg pmcr
|
||||
warn: CP14 unimplemented crn[12], opc1[5], crm[8], opc2[0]
|
||||
warn: 404836653500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000
|
||||
warn: instruction 'mcr bpiall' unimplemented
|
||||
warn: 405408467500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000
|
||||
warn: instruction 'mcr dcisw' unimplemented
|
||||
warn: instruction 'mcr bpiall' unimplemented
|
||||
|
|
|
@ -1,17 +1,18 @@
|
|||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Oct 31 2014 10:01:44
|
||||
gem5 started Oct 31 2014 11:29:21
|
||||
gem5 executing on u200540-lin
|
||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker
|
||||
gem5 compiled Apr 22 2015 10:58:25
|
||||
gem5 started Apr 22 2015 10:59:45
|
||||
gem5 executing on phenom
|
||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker
|
||||
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
0: system.cpu.checker.isa: ISA system set to: 0x4985680 0x4985680
|
||||
0: system.cpu.isa: ISA system set to: 0x4985680 0x4985680
|
||||
info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
0: system.cpu.checker.isa: ISA system set to: 0x2d2a120 0x2d2a120
|
||||
0: system.cpu.isa: ISA system set to: 0x2d2a120 0x2d2a120
|
||||
info: Using bootloader at address 0x10
|
||||
info: Using kernel entry physical address at 0x80008000
|
||||
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||
info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||
info: Entering event queue @ 0. Starting simulation...
|
||||
info: Read CNTFREQ_EL0 frequency
|
||||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
|
@ -44,4 +45,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
|||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
Exiting @ tick 2826844351500 because m5_exit instruction encountered
|
||||
Exiting @ tick 2827616186000 because m5_exit instruction encountered
|
||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.827616 # Nu
|
|||
sim_ticks 2827616186000 # Number of ticks simulated
|
||||
final_tick 2827616186000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 69501 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 84304 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 1736810486 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 620504 # Number of bytes of host memory used
|
||||
host_seconds 1628.05 # Real time elapsed on the host
|
||||
host_inst_rate 73888 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 89625 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 1846444734 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 556020 # Number of bytes of host memory used
|
||||
host_seconds 1531.38 # Real time elapsed on the host
|
||||
sim_insts 113151083 # Number of instructions simulated
|
||||
sim_ops 137250963 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
|
@ -756,7 +756,7 @@ system.cpu.iq.iqInstsAdded 143540852 # Nu
|
|||
system.cpu.iq.iqNonSpecInstsAdded 2119167 # Number of non-speculative instructions added to the IQ
|
||||
system.cpu.iq.iqInstsIssued 143328299 # Number of instructions issued
|
||||
system.cpu.iq.iqSquashedInstsIssued 272168 # Number of squashed instructions issued
|
||||
system.cpu.iq.iqSquashedInstsExamined 6274201 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu.iq.iqSquashedInstsExamined 8409052 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu.iq.iqSquashedOperandsExamined 14689564 # Number of squashed operands that are examined and possibly removed from graph
|
||||
system.cpu.iq.iqSquashedNonSpecRemoved 125312 # Number of squashed non-spec instructions that were removed
|
||||
system.cpu.iq.issued_per_cycle::samples 256876545 # Number of insts issued each cycle
|
||||
|
@ -849,10 +849,10 @@ system.cpu.iq.rate 0.544758 # In
|
|||
system.cpu.iq.fu_busy_cnt 22576275 # FU busy when requested
|
||||
system.cpu.iq.fu_busy_rate 0.157514 # FU busy rate (busy events/executed inst)
|
||||
system.cpu.iq.int_inst_queue_reads 566346239 # Number of integer instruction queue reads
|
||||
system.cpu.iq.int_inst_queue_writes 151939321 # Number of integer instruction queue writes
|
||||
system.cpu.iq.int_inst_queue_writes 154074171 # Number of integer instruction queue writes
|
||||
system.cpu.iq.int_inst_queue_wakeup_accesses 140211060 # Number of integer instruction queue wakeup accesses
|
||||
system.cpu.iq.fp_inst_queue_reads 35347 # Number of floating instruction queue reads
|
||||
system.cpu.iq.fp_inst_queue_writes 13215 # Number of floating instruction queue writes
|
||||
system.cpu.iq.fp_inst_queue_writes 13216 # Number of floating instruction queue writes
|
||||
system.cpu.iq.fp_inst_queue_wakeup_accesses 11430 # Number of floating instruction queue wakeup accesses
|
||||
system.cpu.iq.int_alu_accesses 165879209 # Number of integer alu accesses
|
||||
system.cpu.iq.fp_alu_accesses 23028 # Number of floating point alu accesses
|
||||
|
|
|
@ -1,15 +1,15 @@
|
|||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Apr 20 2015 13:24:23
|
||||
gem5 started Apr 20 2015 13:24:39
|
||||
gem5 compiled Apr 22 2015 10:58:25
|
||||
gem5 started Apr 22 2015 15:52:40
|
||||
gem5 executing on phenom
|
||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
|
||||
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
0: system.cpu0.isa: ISA system set to: 0x4157820 0x4157820
|
||||
0: system.cpu1.isa: ISA system set to: 0x4157820 0x4157820
|
||||
0: system.cpu0.isa: ISA system set to: 0x4163810 0x4163810
|
||||
0: system.cpu1.isa: ISA system set to: 0x4163810 0x4163810
|
||||
info: Using bootloader at address 0x10
|
||||
info: Using kernel entry physical address at 0x80008000
|
||||
info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
|
||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.625396 # Nu
|
|||
sim_ticks 2625395606000 # Number of ticks simulated
|
||||
final_tick 2625395606000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 105565 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 128079 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 2303070285 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 586092 # Number of bytes of host memory used
|
||||
host_seconds 1139.95 # Real time elapsed on the host
|
||||
host_inst_rate 91005 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 110413 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 1985416078 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 586088 # Number of bytes of host memory used
|
||||
host_seconds 1322.34 # Real time elapsed on the host
|
||||
sim_insts 120339436 # Number of instructions simulated
|
||||
sim_ops 146004136 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
|
@ -657,7 +657,7 @@ system.cpu0.iq.iqInstsAdded 129422072 # Nu
|
|||
system.cpu0.iq.iqNonSpecInstsAdded 1660998 # Number of non-speculative instructions added to the IQ
|
||||
system.cpu0.iq.iqInstsIssued 127592349 # Number of instructions issued
|
||||
system.cpu0.iq.iqSquashedInstsIssued 453825 # Number of squashed instructions issued
|
||||
system.cpu0.iq.iqSquashedInstsExamined 8506052 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu0.iq.iqSquashedInstsExamined 10488941 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu0.iq.iqSquashedOperandsExamined 21267672 # Number of squashed operands that are examined and possibly removed from graph
|
||||
system.cpu0.iq.iqSquashedNonSpecRemoved 117222 # Number of squashed non-spec instructions that were removed
|
||||
system.cpu0.iq.issued_per_cycle::samples 189611039 # Number of insts issued each cycle
|
||||
|
@ -750,7 +750,7 @@ system.cpu0.iq.rate 0.662094 # In
|
|||
system.cpu0.iq.fu_busy_cnt 23403648 # FU busy when requested
|
||||
system.cpu0.iq.fu_busy_rate 0.183425 # FU busy rate (busy events/executed inst)
|
||||
system.cpu0.iq.int_inst_queue_reads 468620138 # Number of integer instruction queue reads
|
||||
system.cpu0.iq.int_inst_queue_writes 139596675 # Number of integer instruction queue writes
|
||||
system.cpu0.iq.int_inst_queue_writes 141579564 # Number of integer instruction queue writes
|
||||
system.cpu0.iq.int_inst_queue_wakeup_accesses 124128658 # Number of integer instruction queue wakeup accesses
|
||||
system.cpu0.iq.fp_inst_queue_reads 33072 # Number of floating instruction queue reads
|
||||
system.cpu0.iq.fp_inst_queue_writes 11274 # Number of floating instruction queue writes
|
||||
|
@ -1868,7 +1868,7 @@ system.cpu1.iq.iqInstsAdded 27759685 # Nu
|
|||
system.cpu1.iq.iqNonSpecInstsAdded 627473 # Number of non-speculative instructions added to the IQ
|
||||
system.cpu1.iq.iqInstsIssued 27258527 # Number of instructions issued
|
||||
system.cpu1.iq.iqSquashedInstsIssued 145234 # Number of squashed instructions issued
|
||||
system.cpu1.iq.iqSquashedInstsExamined 2799528 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu1.iq.iqSquashedInstsExamined 2977146 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu1.iq.iqSquashedOperandsExamined 6943190 # Number of squashed operands that are examined and possibly removed from graph
|
||||
system.cpu1.iq.iqSquashedNonSpecRemoved 53970 # Number of squashed non-spec instructions that were removed
|
||||
system.cpu1.iq.issued_per_cycle::samples 42152917 # Number of insts issued each cycle
|
||||
|
@ -1961,10 +1961,10 @@ system.cpu1.iq.rate 0.631965 # In
|
|||
system.cpu1.iq.fu_busy_cnt 6164373 # FU busy when requested
|
||||
system.cpu1.iq.fu_busy_rate 0.226145 # FU busy rate (busy events/executed inst)
|
||||
system.cpu1.iq.int_inst_queue_reads 102973934 # Number of integer instruction queue reads
|
||||
system.cpu1.iq.int_inst_queue_writes 31195241 # Number of integer instruction queue writes
|
||||
system.cpu1.iq.int_inst_queue_writes 31372858 # Number of integer instruction queue writes
|
||||
system.cpu1.iq.int_inst_queue_wakeup_accesses 26623969 # Number of integer instruction queue wakeup accesses
|
||||
system.cpu1.iq.fp_inst_queue_reads 5644 # Number of floating instruction queue reads
|
||||
system.cpu1.iq.fp_inst_queue_writes 2049 # Number of floating instruction queue writes
|
||||
system.cpu1.iq.fp_inst_queue_writes 2050 # Number of floating instruction queue writes
|
||||
system.cpu1.iq.fp_inst_queue_wakeup_accesses 1785 # Number of floating instruction queue wakeup accesses
|
||||
system.cpu1.iq.int_alu_accesses 33419259 # Number of integer alu accesses
|
||||
system.cpu1.iq.fp_alu_accesses 3574 # Number of floating point alu accesses
|
||||
|
|
|
@ -12,12 +12,12 @@ time_sync_spin_threshold=100000000
|
|||
type=LinuxArmSystem
|
||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||
atags_addr=134217728
|
||||
boot_loader=/dist/binaries/boot_emm.arm
|
||||
boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
|
||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||
boot_release_addr=65528
|
||||
cache_line_size=64
|
||||
clk_domain=system.clk_domain
|
||||
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||
dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||
early_kernel_symbols=false
|
||||
enable_context_switch_stats_dump=false
|
||||
eventq_index=0
|
||||
|
@ -30,20 +30,21 @@ have_security=false
|
|||
have_virtualization=false
|
||||
highest_el_is_64=false
|
||||
init_param=0
|
||||
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
kernel_addr_check=true
|
||||
load_addr_mask=268435455
|
||||
load_offset=2147483648
|
||||
machine_type=VExpress_EMM
|
||||
mem_mode=timing
|
||||
mem_ranges=2147483648:2415919103
|
||||
memories=system.realview.nvmem system.physmem system.realview.vram
|
||||
memories=system.physmem system.realview.nvmem system.realview.vram
|
||||
mmap_using_noreserve=false
|
||||
multi_proc=true
|
||||
num_work_ids=16
|
||||
panic_on_oops=true
|
||||
panic_on_panic=true
|
||||
phys_addr_range_64=40
|
||||
readfile=/work/gem5.ext/tests/halt.sh
|
||||
readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
|
||||
reset_addr_64=0
|
||||
symbolfile=
|
||||
work_begin_ckpt_count=0
|
||||
|
@ -86,7 +87,7 @@ table_size=65536
|
|||
[system.cf0.image.child]
|
||||
type=RawDiskImage
|
||||
eventq_index=0
|
||||
image_file=/dist/disks/linux-aarch32-ael.img
|
||||
image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
|
||||
read_only=true
|
||||
|
||||
[system.clk_domain]
|
||||
|
@ -189,7 +190,7 @@ dcache_port=system.cpu.dcache.cpu_side
|
|||
icache_port=system.cpu.icache.cpu_side
|
||||
|
||||
[system.cpu.branchPred]
|
||||
type=BranchPredictor
|
||||
type=BiModeBP
|
||||
BTBEntries=2048
|
||||
BTBTagSize=18
|
||||
RASSize=16
|
||||
|
@ -199,11 +200,7 @@ eventq_index=0
|
|||
globalCtrBits=2
|
||||
globalPredictorSize=8192
|
||||
instShiftAmt=2
|
||||
localCtrBits=2
|
||||
localHistoryTableSize=2048
|
||||
localPredictorSize=2048
|
||||
numThreads=1
|
||||
predType=bi-mode
|
||||
|
||||
[system.cpu.dcache]
|
||||
type=BaseCache
|
||||
|
@ -211,6 +208,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=4
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
|
@ -245,6 +243,7 @@ type=ArmStage2MMU
|
|||
children=stage2_tlb
|
||||
eventq_index=0
|
||||
stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
|
||||
sys=system
|
||||
tlb=system.cpu.dtb
|
||||
|
||||
[system.cpu.dstage2_mmu.stage2_tlb]
|
||||
|
@ -262,7 +261,6 @@ eventq_index=0
|
|||
is_stage2=true
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[5]
|
||||
|
||||
[system.cpu.dtb]
|
||||
type=ArmTLB
|
||||
|
@ -552,6 +550,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=1
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=2
|
||||
|
@ -620,6 +619,7 @@ type=ArmStage2MMU
|
|||
children=stage2_tlb
|
||||
eventq_index=0
|
||||
stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
|
||||
sys=system
|
||||
tlb=system.cpu.itb
|
||||
|
||||
[system.cpu.istage2_mmu.stage2_tlb]
|
||||
|
@ -637,7 +637,6 @@ eventq_index=0
|
|||
is_stage2=true
|
||||
num_squash_per_cycle=2
|
||||
sys=system
|
||||
port=system.cpu.toL2Bus.slave[4]
|
||||
|
||||
[system.cpu.itb]
|
||||
type=ArmTLB
|
||||
|
@ -662,6 +661,7 @@ children=tags
|
|||
addr_ranges=0:18446744073709551615
|
||||
assoc=8
|
||||
clk_domain=system.cpu_clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=true
|
||||
hit_latency=20
|
||||
|
@ -695,13 +695,16 @@ size=4194304
|
|||
type=CoherentXBar
|
||||
clk_domain=system.cpu_clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=0
|
||||
frontend_latency=1
|
||||
response_latency=1
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=1
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=32
|
||||
master=system.cpu.l2cache.cpu_side
|
||||
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
|
||||
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
|
||||
|
||||
[system.cpu.tracer]
|
||||
type=ExeTracer
|
||||
|
@ -732,9 +735,11 @@ sys=system
|
|||
type=NoncoherentXBar
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=1
|
||||
frontend_latency=2
|
||||
response_latency=2
|
||||
use_default_range=true
|
||||
width=8
|
||||
width=16
|
||||
default=system.realview.pciconfig.pio
|
||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||
|
@ -745,6 +750,7 @@ children=tags
|
|||
addr_ranges=2147483648:2415919103
|
||||
assoc=8
|
||||
clk_domain=system.clk_domain
|
||||
demand_mshr_reserve=1
|
||||
eventq_index=0
|
||||
forward_snoops=false
|
||||
hit_latency=50
|
||||
|
@ -779,13 +785,16 @@ type=CoherentXBar
|
|||
children=badaddr_responder
|
||||
clk_domain=system.clk_domain
|
||||
eventq_index=0
|
||||
header_cycles=1
|
||||
forward_latency=4
|
||||
frontend_latency=3
|
||||
response_latency=2
|
||||
snoop_filter=Null
|
||||
snoop_response_latency=4
|
||||
system=system
|
||||
use_default_range=false
|
||||
width=8
|
||||
width=16
|
||||
default=system.membus.badaddr_responder.pio
|
||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
|
||||
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||
|
||||
[system.membus.badaddr_responder]
|
||||
|
@ -833,7 +842,7 @@ IDD62=0.000000
|
|||
VDD=1.500000
|
||||
VDD2=0.000000
|
||||
activation_limit=4
|
||||
addr_mapping=RoRaBaChCo
|
||||
addr_mapping=RoRaBaCoCh
|
||||
bank_groups_per_rank=0
|
||||
banks_per_rank=8
|
||||
burst_length=8
|
||||
|
@ -1137,7 +1146,6 @@ dist_pio_delay=10000
|
|||
eventq_index=0
|
||||
int_latency=10000
|
||||
it_lines=128
|
||||
msix_addr=0
|
||||
platform=system.realview
|
||||
system=system
|
||||
pio=system.membus.master[2]
|
||||
|
@ -1324,7 +1332,7 @@ int_num_watchdog=30
|
|||
pio_addr=738721792
|
||||
pio_latency=100000
|
||||
system=system
|
||||
pio=system.membus.master[3]
|
||||
pio=system.membus.master[4]
|
||||
|
||||
[system.realview.mmc_fake]
|
||||
type=AmbaFake
|
||||
|
@ -1506,7 +1514,7 @@ platform=system.realview
|
|||
ppint=25
|
||||
system=system
|
||||
vcpu_addr=738222080
|
||||
pio=system.membus.master[4]
|
||||
pio=system.membus.master[3]
|
||||
|
||||
[system.realview.vram]
|
||||
type=SimpleMemory
|
||||
|
|
|
@ -34,6 +34,5 @@ warn: Ignoring write to miscreg pmcntenclr
|
|||
warn: Ignoring write to miscreg pmintenclr
|
||||
warn: Ignoring write to miscreg pmovsr
|
||||
warn: Ignoring write to miscreg pmcr
|
||||
warn: CP14 unimplemented crn[12], opc1[5], crm[8], opc2[0]
|
||||
warn: instruction 'mcr bpiall' unimplemented
|
||||
warn: instruction 'mcr dcisw' unimplemented
|
||||
warn: instruction 'mcr bpiall' unimplemented
|
||||
|
|
|
@ -1,16 +1,17 @@
|
|||
gem5 Simulator System. http://gem5.org
|
||||
gem5 is copyrighted software; use the --copyright option for details.
|
||||
|
||||
gem5 compiled Oct 31 2014 10:01:44
|
||||
gem5 started Oct 31 2014 11:28:40
|
||||
gem5 executing on u200540-lin
|
||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
|
||||
gem5 compiled Apr 22 2015 10:58:25
|
||||
gem5 started Apr 22 2015 11:53:00
|
||||
gem5 executing on phenom
|
||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
|
||||
|
||||
Global frequency set at 1000000000000 ticks per second
|
||||
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
0: system.cpu.isa: ISA system set to: 0x443e680 0x443e680
|
||||
info: kernel located at: /home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||
0: system.cpu.isa: ISA system set to: 0x317f940 0x317f940
|
||||
info: Using bootloader at address 0x10
|
||||
info: Using kernel entry physical address at 0x80008000
|
||||
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||
info: Loading DTB file: /home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||
info: Entering event queue @ 0. Starting simulation...
|
||||
info: Read CNTFREQ_EL0 frequency
|
||||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
|
@ -28,4 +29,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
|||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||
Exiting @ tick 2826844351500 because m5_exit instruction encountered
|
||||
Exiting @ tick 2827616186000 because m5_exit instruction encountered
|
||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 2.827616 # Nu
|
|||
sim_ticks 2827616186000 # Number of ticks simulated
|
||||
final_tick 2827616186000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||
host_inst_rate 99248 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 120386 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 2480177298 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 619560 # Number of bytes of host memory used
|
||||
host_seconds 1140.09 # Real time elapsed on the host
|
||||
host_inst_rate 94820 # Simulator instruction rate (inst/s)
|
||||
host_op_rate 115016 # Simulator op (including micro ops) rate (op/s)
|
||||
host_tick_rate 2369528287 # Simulator tick rate (ticks/s)
|
||||
host_mem_usage 555256 # Number of bytes of host memory used
|
||||
host_seconds 1193.32 # Real time elapsed on the host
|
||||
sim_insts 113151083 # Number of instructions simulated
|
||||
sim_ops 137250963 # Number of ops (including micro ops) simulated
|
||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||
|
@ -617,7 +617,7 @@ system.cpu.iq.iqInstsAdded 143540852 # Nu
|
|||
system.cpu.iq.iqNonSpecInstsAdded 2119167 # Number of non-speculative instructions added to the IQ
|
||||
system.cpu.iq.iqInstsIssued 143328299 # Number of instructions issued
|
||||
system.cpu.iq.iqSquashedInstsIssued 272168 # Number of squashed instructions issued
|
||||
system.cpu.iq.iqSquashedInstsExamined 6274201 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu.iq.iqSquashedInstsExamined 8409052 # Number of squashed instructions iterated over during squash; mainly for profiling
|
||||
system.cpu.iq.iqSquashedOperandsExamined 14689564 # Number of squashed operands that are examined and possibly removed from graph
|
||||
system.cpu.iq.iqSquashedNonSpecRemoved 125312 # Number of squashed non-spec instructions that were removed
|
||||
system.cpu.iq.issued_per_cycle::samples 256876545 # Number of insts issued each cycle
|
||||
|
@ -710,10 +710,10 @@ system.cpu.iq.rate 0.544758 # In
|
|||
system.cpu.iq.fu_busy_cnt 22576275 # FU busy when requested
|
||||
system.cpu.iq.fu_busy_rate 0.157514 # FU busy rate (busy events/executed inst)
|
||||
system.cpu.iq.int_inst_queue_reads 566346239 # Number of integer instruction queue reads
|
||||
system.cpu.iq.int_inst_queue_writes 151939321 # Number of integer instruction queue writes
|
||||
system.cpu.iq.int_inst_queue_writes 154074171 # Number of integer instruction queue writes
|
||||
system.cpu.iq.int_inst_queue_wakeup_accesses 140211060 # Number of integer instruction queue wakeup accesses
|
||||
system.cpu.iq.fp_inst_queue_reads 35347 # Number of floating instruction queue reads
|
||||
system.cpu.iq.fp_inst_queue_writes 13215 # Number of floating instruction queue writes
|
||||
system.cpu.iq.fp_inst_queue_writes 13216 # Number of floating instruction queue writes
|
||||
system.cpu.iq.fp_inst_queue_wakeup_accesses 11430 # Number of floating instruction queue wakeup accesses
|
||||
system.cpu.iq.int_alu_accesses 165879209 # Number of integer alu accesses
|
||||
system.cpu.iq.fp_alu_accesses 23028 # Number of floating point alu accesses
|
||||
|
|
|
@ -193,7 +193,7 @@ oprofile: using timer interrupt.
|
|||
TCP: cubic registered
|
||||
NET: Registered protocol family 10
|
||||
NET: Registered protocol family 17
|
||||
rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 12:00:00 UTC (1230811200)
|
||||
rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 00:00:00 UTC (1230768000)
|
||||
ALSA device list:
|
||||
No soundcards found.
|
||||
|